hurricane2.h (6161B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: hurricane2.h 8 */ 9 10 #ifndef _SOC_HURRICANE2_H_ 11 #define _SOC_HURRICANE2_H_ 12 13 #include <soc/drv.h> 14 #include <soc/mem.h> 15 #include <shared/sram.h> 16 17 18 enum soc_hu2_port_mode_e { 19 /* WARNING: values given match hardware register; do not modify */ 20 SOC_HU2_PORT_MODE_QUAD = 0, 21 SOC_HU2_PORT_MODE_TRI_012 = 1, 22 SOC_HU2_PORT_MODE_TRI_023 = 2, 23 SOC_HU2_PORT_MODE_DUAL = 3, 24 SOC_HU2_PORT_MODE_SINGLE = 4 25 }; 26 27 enum HR2_VLXL_HASH_KEY_TYPE { 28 /* WARNING: values given match hardware register; do not modify */ 29 HR2_VLXLT_HASH_KEY_TYPE_IVID_OVID = 0, 30 HR2_VLXLT_HASH_KEY_TYPE_OTAG = 1, 31 HR2_VLXLT_HASH_KEY_TYPE_ITAG = 2, 32 HR2_VLXLT_HASH_KEY_TYPE_VLAN_MAC = 3, 33 HR2_VLXLT_HASH_KEY_TYPE_OVID = 4, 34 HR2_VLXLT_HASH_KEY_TYPE_IVID = 5, 35 HR2_VLXLT_HASH_KEY_TYPE_PRI_CFI = 6, 36 HR2_VLXLT_HASH_KEY_TYPE_HPAE = 7, 37 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_IVID_OVID = 8, 38 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_OTAG = 9, 39 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_ITAG = 10, 40 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_OVID = 11, 41 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_IVID = 12, 42 HR2_VLXLT_HASH_KEY_TYPE_PAYLOAD_COUNT 43 }; 44 45 typedef int (*soc_hurricane2_oam_handler_t)(int unit, soc_field_t fault_field); 46 typedef int (*soc_hurricane2_oam_ser_handler_t)(int unit, 47 soc_mem_t mem, int index); 48 extern int soc_hurricane2_misc_init(int); 49 extern int soc_hurricane2_mmu_init(int); 50 extern int soc_hu2_port_config_init(int unit, uint16 dev_id); 51 extern int soc_hurricane2_age_timer_get(int, int *, int *); 52 extern int soc_hurricane2_age_timer_max_get(int, int *); 53 extern int soc_hurricane2_age_timer_set(int, int, int); 54 extern void soc_hurricane2_oam_handler_register(int unit, 55 soc_hurricane2_oam_handler_t handler); 56 extern void soc_hurricane2_oam_ser_handler_register(int unit, 57 soc_hurricane2_oam_ser_handler_t handler); 58 extern int soc_hurricane2_oam_ser_process(int unit, 59 soc_mem_t mem, int index); 60 61 62 extern void soc_hurricane2_parity_error(void *unit_vp, void *d1, void *d2, 63 void *d3, void *d4); 64 extern int _soc_hurricane2_mem_parity_control(int unit, soc_mem_t mem, 65 int copyno, int enable); 66 extern int soc_hurricane2_ser_mem_clear(int unit, soc_mem_t mem); 67 extern int soc_hurricane2_port_lanes_set(int unit, soc_port_t port_base, 68 int lanes, int *cur_lanes, 69 int *phy_ports, int *phy_ports_len); 70 extern int soc_hurricane2_port_lanes_get(int unit, soc_port_t port_base, 71 int *cur_lanes); 72 extern int soc_hurricane2_tsc_reset(int unit); 73 extern int soc_hu2_mem_config(int unit, int dev_id); 74 75 extern int soc_hu2_temperature_monitor_get(int unit, 76 int temperature_max, 77 soc_switch_temperature_monitor_t *temperature_array, 78 int *temperature_count); 79 extern int soc_hu2_show_material_process(int unit); 80 extern int soc_hu2_show_ring_osc(int unit); 81 82 extern soc_functions_t soc_hurricane2_drv_funs; 83 84 extern int soc_hu2_xq_mem(int unit, soc_port_t port, soc_mem_t *xq); 85 86 #define SOC_HU2_LPM_INIT_CHECK(u) (soc_hu2_lpm_state[(u)] != NULL) 87 #define SOC_HU2_LPM_STATE(u) (soc_hu2_lpm_state[(u)]) 88 #define SOC_HU2_LPM_STATE_START(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].start) 89 #define SOC_HU2_LPM_STATE_END(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].end) 90 #define SOC_HU2_LPM_STATE_PREV(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].prev) 91 #define SOC_HU2_LPM_STATE_NEXT(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].next) 92 #define SOC_HU2_LPM_STATE_VENT(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].vent) 93 #define SOC_HU2_LPM_STATE_FENT(u, pfx) (soc_hu2_lpm_state[(u)][(pfx)].fent) 94 95 typedef struct soc_hu2_lpm_state_s { 96 int start; /* start index for this prefix length */ 97 int end; /* End index for this prefix length */ 98 int prev; /* Previous (Lo to Hi) prefix length with non zero entry count*/ 99 int next; /* Next (Hi to Lo) prefix length with non zero entry count */ 100 int vent; /* valid entries */ 101 int fent; /* free entries */ 102 } soc_hu2_lpm_state_t, *soc_hu2_lpm_state_p; 103 extern soc_hu2_lpm_state_p soc_hu2_lpm_state[SOC_MAX_NUM_DEVICES]; 104 105 extern int soc_hu2_lpm_init(int u); 106 extern int soc_hu2_lpm_deinit(int u); 107 extern int soc_hu2_lpm_insert(int unit, void *entry); 108 extern int soc_hu2_lpm_delete(int u, void *key_data); 109 extern int soc_hu2_lpm_match(int u, void *key_data, void *e, int *index_ptr); 110 #ifdef BCM_WARM_BOOT_SUPPORT 111 extern int soc_hu2_lpm_reinit(int unit, int idx, uint32 *lpm_entry); 112 extern int soc_hu2_lpm_reinit_done(int unit); 113 #else 114 #define soc_hu2_lpm_reinit(u, t, s, c) (SOC_E_UNAVAIL) 115 #endif /* BCM_WARM_BOOT_SUPPORT */ 116 117 #ifdef BCM_WARM_BOOT_SUPPORT_SW_DUMP 118 extern void soc_hu2_lpm_sw_dump(int unit); 119 #endif /* BCM_WARM_BOOT_SUPPORT_SW_DUMP */ 120 121 #if defined(BCM_HURRICANE2_SUPPORT) && defined(BCM_CMICM_SUPPORT) 122 extern int _soc_mem_hu2_fifo_dma_get_read_ptr(int unit, 123 int chan, 124 void **host_ptr, 125 int *count); 126 extern int _soc_mem_hu2_fifo_dma_advance_read_ptr (int unit, 127 int chan, 128 int count); 129 extern soc_reg_t _soc_hu2_fifo_reg_get(int unit, int cmc, int chan, int type); 130 #endif 131 132 #if defined(SER_TR_TEST_SUPPORT) 133 extern int soc_hu2_ser_inject_error(int unit, uint32 flags, soc_mem_t mem, 134 int pipeTarget, int block, int index); 135 extern int soc_hu2_ser_mem_test(int unit, soc_mem_t mem, 136 _soc_ser_test_t test_type, int cmd); 137 extern int soc_hu2_ser_test(int unit, _soc_ser_test_t test_type); 138 extern void soc_hu2_ser_test_register(int unit); 139 #endif 140 141 142 #endif /* !_SOC_HURRICANE2_H_ */ 143