cprimod.h (206072B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #ifndef _CPRIMOD_H__H_ 14 #define _CPRIMOD_H__H_ 15 16 #include <soc/types.h> 17 #include <bcm/types.h> 18 #include <shared/cpri.h> 19 #include <phymod/phymod.h> 20 #include <phymod/phymod_diagnostics.h> 21 22 /*! 23 * @enum cprimod_dispatch_type_e 24 * @brief Supported Drivers 25 */ 26 typedef enum cprimod_dispatch_type_e { 27 #ifdef CPRIMOD_CPRI_FALCON_SUPPORT 28 cprimodDispatchTypeCprif, 29 #endif /*CPRIMOD_CPRI_FALCON_SUPPORT */ 30 cprimodDispatchTypeCount 31 } cprimod_dispatch_type_t; 32 33 #ifdef CPRIMOD_DIAG 34 extern enum_mapping_t cprimod_dispatch_type_t_mapping[]; 35 #endif /*CPRIMOD_DIAG*/ 36 37 /* cprimod_dispatch_type_t validation */ 38 int cprimod_dispatch_type_t_validate(cprimod_dispatch_type_t cprimod_dispatch_type); 39 40 41 42 /*! 43 * cprimod_test_api_non_dispatch 44 * 45 * @brief test api non dispatch 46 * 47 * @param [in] unit - unit id 48 * @param [in] port - logical port 49 * @param [out] value - 50 */ 51 int cprimod_test_api_non_dispatch(int unit, int port, int* value); 52 53 /*! 54 * cprimod_test_api_dispatch 55 * 56 * @brief test api dispatch 57 * 58 * @param [in] unit - unit id 59 * @param [in] port - logical port 60 * @param [out] value - 61 */ 62 int cprimod_test_api_dispatch(int unit, int port, int* value); 63 64 #define CPRIMOD_MAX_LANES_PER_CORE 4 /**< Number of lanes per core. */ 65 66 #define CPRIMOD_BASIC_FRAME_MAX_NUM_ENTRY 176 /**< Max Number of Entries in Basic Frame. */ 67 #define CPRIMOD_BASIC_FRAME_MAX_BITS_PER_ENTRY 128 /**< Max Number of Bits in an entry. */ 68 69 #define CPRIMOD_AXC_ID_AGNOSTIC 0x00 /**< Control AxC ID. */ 70 #define CPRIMOD_AXC_ID_CONTROL 0xFF /**< Control AxC ID. */ 71 #define CPRIMOD_AXC_ID_ALL 0xFE /**< All AxCs. */ 72 73 #define CPRIMOD_DEBUG_BASIC_FRAME_USAGE 0x0 /**< Control AxC ID. */ 74 #define CPRIMOD_DEBUG_BASIC_FRAME_RAW 0x1 /**< All AxCs. */ 75 76 #define CPRIMOD_RSVD4_HEADER_SIZE 24 /**< RSVD4 HEADER SIZE */ 77 #define CPRIMOD_RSVD4_PAYLOAD_SIZE 128 /**< RSVD4 PAYLOAD SIZE */ 78 79 80 /*! 81 * @enum cprimod_basic_frame_table_id_e 82 * @brief Identify Basic Frame Parse and Framer Table. 83 */ 84 typedef enum cprimod_basic_frame_table_id_e { 85 cprimod_basic_frame_table_0, 86 cprimod_basic_frame_table_1, 87 cprimod_basic_frame_table_Count 88 } cprimod_basic_frame_table_id_t; 89 90 #ifdef CPRIMOD_DIAG 91 extern enum_mapping_t cprimod_basic_frame_table_id_t_mapping[]; 92 #endif /*CPRIMOD_DIAG*/ 93 94 /* cprimod_basic_frame_table_id_t validation */ 95 int cprimod_basic_frame_table_id_t_validate(cprimod_basic_frame_table_id_t cprimod_basic_frame_table_id); 96 97 /*! 98 * @struct cprimod_basic_frame_usage_entry_s 99 * @brief Basic Frame Usage Table Entry. Which has start bit location and num of bits. 100 */ 101 typedef struct cprimod_basic_frame_usage_entry_s { 102 uint32 axc_id; /**< AxC Id */ 103 uint32 start_bit; /**< start bit */ 104 uint32 num_bits; /**< Num Bit count */ 105 } cprimod_basic_frame_usage_entry_t; 106 107 /* cprimod_basic_frame_usage_entry_t initialization and validation */ 108 int cprimod_basic_frame_usage_entry_t_validate(const cprimod_basic_frame_usage_entry_t* cprimod_basic_frame_usage_entry); 109 int cprimod_basic_frame_usage_entry_t_init(cprimod_basic_frame_usage_entry_t* cprimod_basic_frame_usage_entry); 110 111 /*! 112 * cprimod_basic_frame_parser_active_table_set 113 * 114 * @brief Get/Set Basic Frame set active table number and number of valid entries. 115 * 116 * @param [in] unit - unit id 117 * @param [in] port - logical port 118 * @param [in] table - active table 119 * @param [in] sync_enable - Sync Between Active and Standby. 120 */ 121 int cprimod_basic_frame_parser_active_table_set(int unit, int port, cprimod_basic_frame_table_id_t table, int sync_enable); 122 /*! 123 * cprimod_basic_frame_parser_active_table_get 124 * 125 * @brief Get/Set Basic Frame set active table number and number of valid entries. 126 * 127 * @param [in] unit - unit id 128 * @param [in] port - logical port 129 * @param [out] table - active table 130 */ 131 int cprimod_basic_frame_parser_active_table_get(int unit, int port, cprimod_basic_frame_table_id_t* table); 132 133 /*! 134 * cprimod_basic_frame_parser_table_num_entries_set 135 * 136 * @brief Get/Set Basic Frame set active table number and number of valid entries. 137 * 138 * @param [in] unit - unit id 139 * @param [in] port - logical port 140 * @param [in] table - active table 141 * @param [in] num_entries - Num of valid entries. 142 */ 143 int cprimod_basic_frame_parser_table_num_entries_set(int unit, int port, cprimod_basic_frame_table_id_t table, uint32 num_entries); 144 /*! 145 * cprimod_basic_frame_parser_table_num_entries_get 146 * 147 * @brief Get/Set Basic Frame set active table number and number of valid entries. 148 * 149 * @param [in] unit - unit id 150 * @param [in] port - logical port 151 * @param [in] table - active table 152 * @param [out] num_entries - Num of valid entries. 153 */ 154 int cprimod_basic_frame_parser_table_num_entries_get(int unit, int port, cprimod_basic_frame_table_id_t table, uint32* num_entries); 155 156 /*! 157 * cprimod_basic_frame_assembly_active_table_set 158 * 159 * @brief Get/Set Basic Frame set active table number and number of valid entries. 160 * 161 * @param [in] unit - unit id 162 * @param [in] port - logical port 163 * @param [in] table - active table 164 * @param [in] sync_enable - Sync Between Active and Standby. 165 */ 166 int cprimod_basic_frame_assembly_active_table_set(int unit, int port, cprimod_basic_frame_table_id_t table, int sync_enable); 167 /*! 168 * cprimod_basic_frame_assembly_active_table_get 169 * 170 * @brief Get/Set Basic Frame set active table number and number of valid entries. 171 * 172 * @param [in] unit - unit id 173 * @param [in] port - logical port 174 * @param [out] table - active table 175 */ 176 int cprimod_basic_frame_assembly_active_table_get(int unit, int port, cprimod_basic_frame_table_id_t* table); 177 178 /*! 179 * cprimod_basic_frame_assembly_table_num_entries_set 180 * 181 * @brief Get/Set Basic Frame set active table number and number of valid entries. 182 * 183 * @param [in] unit - unit id 184 * @param [in] port - logical port 185 * @param [in] table - active table 186 * @param [in] num_entries - Num of valid entries. 187 */ 188 int cprimod_basic_frame_assembly_table_num_entries_set(int unit, int port, cprimod_basic_frame_table_id_t table, uint32 num_entries); 189 /*! 190 * cprimod_basic_frame_assembly_table_num_entries_get 191 * 192 * @brief Get/Set Basic Frame set active table number and number of valid entries. 193 * 194 * @param [in] unit - unit id 195 * @param [in] port - logical port 196 * @param [in] table - active table 197 * @param [out] num_entries - Num of valid entries. 198 */ 199 int cprimod_basic_frame_assembly_table_num_entries_get(int unit, int port, cprimod_basic_frame_table_id_t table, uint32* num_entries); 200 201 /*! 202 * cprimod_basic_frame_parser_switch_active_table 203 * 204 * @brief Switch Basic Frame Table between active and standby, without syncing. 205 * 206 * @param [in] unit - unit id 207 * @param [in] port - logical port 208 */ 209 int cprimod_basic_frame_parser_switch_active_table(int unit, int port); 210 211 /*! 212 * cprimod_basic_frame_assembly_switch_active_table 213 * 214 * @brief Switch Basic Frame Table between active and standby, without syncing. 215 * 216 * @param [in] unit - unit id 217 * @param [in] port - logical port 218 */ 219 int cprimod_basic_frame_assembly_switch_active_table(int unit, int port); 220 221 /*! 222 * cprimod_rx_axc_basic_frame_add 223 * 224 * @brief Add AxC Rx Basic Frame to Shadow Table 225 * 226 * @param [in] unit - unit id 227 * @param [in] port - logical port 228 * @param [in] axc_id - AxC Id 0-63 229 * @param [in] start_bit - Start Bit Postion 230 * @param [in] num_bit - Number of Bits 231 */ 232 int cprimod_rx_axc_basic_frame_add(int unit, int port, uint32 axc_id, uint32 start_bit, uint32 num_bit); 233 234 /*! 235 * cprimod_rx_axc_basic_frame_delete 236 * 237 * @brief Delete AxC Rx Basic Frame from Shadow Table 238 * 239 * @param [in] unit - unit id 240 * @param [in] port - logical port 241 * @param [in] axc_id - AxC Id 0-63 242 */ 243 int cprimod_rx_axc_basic_frame_delete(int unit, int port, uint32 axc_id); 244 245 /*! 246 * cprimod_rx_axc_basic_frame_clear 247 * 248 * @brief Clear all the AxC from the Basic Frame Parser Shadow Table. 249 * 250 * @param [in] unit - unit id 251 * @param [in] port - logical port 252 */ 253 int cprimod_rx_axc_basic_frame_clear(int unit, int port); 254 255 /*! 256 * cprimod_rx_axc_basic_frame_get 257 * 258 * @brief Retrieve AxC Rx Basic Frame from Table 259 * 260 * @param [in] unit - unit id 261 * @param [in] port - logical port 262 * @param [in] axc_id - AxC Id 263 * @param [in] table - table id active or standby 264 * @param [out] usage_table - usage table 265 * @param [out] num_entries - in: buffer size out:Num of valid entries. 266 */ 267 int cprimod_rx_axc_basic_frame_get(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t table, cprimod_basic_frame_usage_entry_t* usage_table, int* num_entries); 268 269 /*! 270 * cprimod_tx_axc_basic_frame_add 271 * 272 * @brief Add AxC Rx Basic Frame to Shadow Table 273 * 274 * @param [in] unit - unit id 275 * @param [in] port - logical port 276 * @param [in] axc_id - AxC Id 277 * @param [in] start_bit - Start Bit Postion 278 * @param [in] num_bit - Number of Bits 279 */ 280 int cprimod_tx_axc_basic_frame_add(int unit, int port, uint32 axc_id, uint32 start_bit, uint32 num_bit); 281 282 /*! 283 * cprimod_tx_axc_basic_frame_delete 284 * 285 * @brief Delete AxC Rx Basic Frame from Shadow Table 286 * 287 * @param [in] unit - unit id 288 * @param [in] port - logical port 289 * @param [in] axc_id - AxC Id 0-63 290 */ 291 int cprimod_tx_axc_basic_frame_delete(int unit, int port, uint32 axc_id); 292 293 /*! 294 * cprimod_tx_axc_basic_frame_clear 295 * 296 * @brief Clear all the AxC from the Basic Frame Assembly Shadow Table. 297 * 298 * @param [in] unit - unit id 299 * @param [in] port - logical port 300 */ 301 int cprimod_tx_axc_basic_frame_clear(int unit, int port); 302 303 /*! 304 * cprimod_tx_axc_basic_frame_get 305 * 306 * @brief Retrieve AxC Rx Basic Frame from Table 307 * 308 * @param [in] unit - unit id 309 * @param [in] port - logical port 310 * @param [in] axc_id - AxC Id 0-63 311 * @param [in] table - table id active or standby 312 * @param [out] usage_table - usage table 313 * @param [out] num_entries - in: buffer size out:Num of valid entries. 314 */ 315 int cprimod_tx_axc_basic_frame_get(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t table, cprimod_basic_frame_usage_entry_t* usage_table, int* num_entries); 316 317 /*! 318 * cprimod_basic_frame_debug 319 * 320 * @brief Debug API for Basic Frame. 321 * 322 * @param [in] unit - unit id 323 * @param [in] port - logical port 324 * @param [in] axc_id - AxC Id 325 * @param [in] rx_table - table_num 326 * @param [in] tx_table - table_num 327 * @param [in] flags - CPRIMOD_DEBUG_BASIC... flags 328 */ 329 int cprimod_basic_frame_debug(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t rx_table, cprimod_basic_frame_table_id_t tx_table, uint32 flags); 330 331 332 /*! 333 * @enum cprimod_cpri_frame_map_method_e 334 * @brief CPRI Frame Map Method. 335 */ 336 typedef enum cprimod_cpri_frame_map_method_e { 337 cprimod_cpri_frame_map_method_1, 338 cprimod_cpri_frame_map_method_2, 339 cprimod_cpri_frame_map_method_3, 340 cprimod_cpri_frame_map_method_Count 341 } cprimod_cpri_frame_map_method_t; 342 343 #ifdef CPRIMOD_DIAG 344 extern enum_mapping_t cprimod_cpri_frame_map_method_t_mapping[]; 345 #endif /*CPRIMOD_DIAG*/ 346 347 /* cprimod_cpri_frame_map_method_t validation */ 348 int cprimod_cpri_frame_map_method_t_validate(cprimod_cpri_frame_map_method_t cprimod_cpri_frame_map_method); 349 typedef _shr_cpri_frame_sync_mode_t cprimod_cpri_frame_sync_mode_t; 350 351 #define CPRIMOD_CPRI_FRAME_SYNC_MODE_HYPER _shrCpriFrameSyncModeHyper 352 #define CPRIMOD_CPRI_FRAME_SYNC_MODE_RADIO _shrCpriFrameSyncModeRadio 353 #define CPRIMOD_CPRI_FRAME_SYNC_MODE_BASIC _shrCpriFrameSyncModeBasic 354 #define CPRIMOD_CPRI_FRAME_SYNC_MODE_TUNNEL _shrCpriFrameSyncModeTunnel 355 356 typedef _shr_rsvd4_sync_mode_t cprimod_rsvd4_frame_sync_mode_t; 357 358 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_NO_SYNC _shrRsvd4SyncModeNoSync 359 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_MSG_OFFSET _shrRsvd4SyncModeMsgOffset 360 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_MSG_AND_MASTER_OFFSET _shrRsvd4SyncModeMsgAndMasterFrameOffset 361 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_TS_NO_SYNC _shrRsvd4SyncModeTsNoSync 362 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_TS_MSG_OFFSET _shrRsvd4SyncModeTsMsgOffset 363 #define CPRIMOD_RSVD4_FRAME_SYNC_MODE_TS_MSG_AND_MASTER_OFFSET _shrRsvd4SyncModeTsMsgAndMasterFrameOffset 364 365 typedef _shr_rsvd4_msg_ts_mode_t cprimod_rsvd4_msg_ts_mode_t; 366 367 #define CPRIMOD_RSVD4_MSG_TS_MODE_WCDMA _shrRsvd4MsgTsModeWCDMA 368 #define CPRIMOD_RSVD4_MSG_TS_MODE_LTE _shrRsvd4MsgTsModeLTE 369 #define CPRIMOD_RSVD4_MSG_TS_MODE_GSM_DL _shrRsvd4MsgTsModeGSMDL 370 #define CPRIMOD_RSVD4_MSG_TS_MODE_GSM_UL _shrRsvd4MsgTsModeGSMUL 371 372 373 /*! 374 * @struct cprimod_cpri_container_config_s 375 * @brief CPRI Container Parser Config Parameter. 376 */ 377 typedef struct cprimod_cpri_container_config_s { 378 cprimod_cpri_frame_map_method_t map_method; /**< Map Method 1,2or 3 */ 379 uint32 Naxc; /**< Container size in bits. If Method#3 has to be 2M */ 380 uint32 K; /**< Num of Basic Frames in Container Block. */ 381 uint32 Nst; /**< Num of stuffing bits in container block for Method 1.((K*Naxc)-(2MS)) */ 382 uint32 Na; /**< Number of AxC for Method 3. */ 383 uint32 Nc; /**< Number of contain in a basic frame for Method 3. */ 384 uint32 Nv; /**< Number of stuffing bits in container block for Method 3. */ 385 cprimod_cpri_frame_sync_mode_t frame_sync_mode; /**< Radio,Hyper or Basic */ 386 uint32 basic_frame_offset; /**< Basic Frame Offset. */ 387 uint32 radio_frame_offset; /**< Radio Frame Offset. */ 388 uint32 hyper_frame_offset; /**< Hyper Frame Offset. */ 389 uint32 cblk_cnt; /**< Internal use only to get container Block count */ 390 } cprimod_cpri_container_config_t; 391 392 /* cprimod_cpri_container_config_t initialization and validation */ 393 int cprimod_cpri_container_config_t_validate(const cprimod_cpri_container_config_t* cprimod_cpri_container_config); 394 int cprimod_cpri_container_config_t_init(cprimod_cpri_container_config_t* cprimod_cpri_container_config); 395 396 397 /*! 398 * @struct cprimod_rsvd4_container_config_s 399 * @brief RSVD4 Container Parser Config Parameter. 400 */ 401 typedef struct cprimod_rsvd4_container_config_s { 402 uint32 axc_id; /**< AxC/Queue ID. */ 403 uint32 stuffing_cnt; /**< Stuffing Count in bits. */ 404 cprimod_rsvd4_msg_ts_mode_t msg_ts_mode; /**< Msg TS sync mode */ 405 uint32 msg_ts_cnt; /**< Msg TS sync mode */ 406 cprimod_rsvd4_frame_sync_mode_t frame_sync_mode; /**< Frame Sync Mode */ 407 uint32 master_frame_offset; /**< Master Frame Offset (bfn_offset) . */ 408 uint32 message_number_offset; /**< Message Offset within Master Frame (rfrm_offset). */ 409 uint32 container_block_cnt; /**< Num of bit in container block. */ 410 uint32 use_ts_dbm; /**< Use TS DBM. */ 411 uint32 ts_dbm_prof_num; /**< TS DBM Profile Num. */ 412 uint32 num_active_slots; /**< TS DBM Num of Active Slots. */ 413 uint32 msg_addr; /**< RSVD4 Header Addr - Only for Tx */ 414 uint32 msg_type; /**< RSVD4 Header Type - Only for Tx */ 415 uint32 msg_ts_offset; /**< RSVD4 ts offset - Only for Tx */ 416 } cprimod_rsvd4_container_config_t; 417 418 /* cprimod_rsvd4_container_config_t initialization and validation */ 419 int cprimod_rsvd4_container_config_t_validate(const cprimod_rsvd4_container_config_t* cprimod_rsvd4_container_config); 420 int cprimod_rsvd4_container_config_t_init(cprimod_rsvd4_container_config_t* cprimod_rsvd4_container_config); 421 422 /*! 423 * cprimod_cpri_rx_axc_container_config_set 424 * 425 * @brief Debug API for Basic Frame. 426 * 427 * @param [in] unit - unit id 428 * @param [in] port - logical port 429 * @param [in] axc_id - AxC Id 430 * @param [in] config_info - container config info. 431 */ 432 int cprimod_cpri_rx_axc_container_config_set(int unit, int port, uint32 axc_id, const cprimod_cpri_container_config_t* config_info); 433 /*! 434 * cprimod_cpri_rx_axc_container_config_get 435 * 436 * @brief Debug API for Basic Frame. 437 * 438 * @param [in] unit - unit id 439 * @param [in] port - logical port 440 * @param [in] axc_id - AxC Id 441 * @param [out] config_info - container config info. 442 */ 443 int cprimod_cpri_rx_axc_container_config_get(int unit, int port, uint32 axc_id, cprimod_cpri_container_config_t* config_info); 444 445 /*! 446 * cprimod_cpri_tx_axc_container_config_set 447 * 448 * @brief Debug API for Basic Frame. 449 * 450 * @param [in] unit - unit id 451 * @param [in] port - logical port 452 * @param [in] axc_id - AxC Id 453 * @param [in] config_info - container config info. 454 */ 455 int cprimod_cpri_tx_axc_container_config_set(int unit, int port, uint32 axc_id, const cprimod_cpri_container_config_t* config_info); 456 /*! 457 * cprimod_cpri_tx_axc_container_config_get 458 * 459 * @brief Debug API for Basic Frame. 460 * 461 * @param [in] unit - unit id 462 * @param [in] port - logical port 463 * @param [in] axc_id - AxC Id 464 * @param [out] config_info - container config info. 465 */ 466 int cprimod_cpri_tx_axc_container_config_get(int unit, int port, uint32 axc_id, cprimod_cpri_container_config_t* config_info); 467 468 /*! 469 * cprimod_rsvd4_rx_axc_container_config_set 470 * 471 * @brief Debug API for Basic Frame. 472 * 473 * @param [in] unit - unit id 474 * @param [in] port - logical port 475 * @param [in] flow_id - Flow ID 476 * @param [in] config_info - container config info. 477 */ 478 int cprimod_rsvd4_rx_axc_container_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_container_config_t* config_info); 479 /*! 480 * cprimod_rsvd4_rx_axc_container_config_get 481 * 482 * @brief Debug API for Basic Frame. 483 * 484 * @param [in] unit - unit id 485 * @param [in] port - logical port 486 * @param [in] flow_id - Flow ID 487 * @param [out] config_info - container config info. 488 */ 489 int cprimod_rsvd4_rx_axc_container_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_container_config_t* config_info); 490 491 /*! 492 * cprimod_rsvd4_tx_axc_container_config_set 493 * 494 * @brief Debug API for Basic Frame. 495 * 496 * @param [in] unit - unit id 497 * @param [in] port - logical port 498 * @param [in] flow_id - Flow ID 499 * @param [in] config_info - container config info. 500 */ 501 int cprimod_rsvd4_tx_axc_container_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_container_config_t* config_info); 502 /*! 503 * cprimod_rsvd4_tx_axc_container_config_get 504 * 505 * @brief Debug API for Basic Frame. 506 * 507 * @param [in] unit - unit id 508 * @param [in] port - logical port 509 * @param [in] flow_id - Flow ID 510 * @param [out] config_info - container config info. 511 */ 512 int cprimod_rsvd4_tx_axc_container_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_container_config_t* config_info); 513 514 515 /*! 516 * @struct cprimod_payload_size_info_s 517 * @brief Config Parameter for ROE Payload Size . 518 */ 519 typedef struct cprimod_payload_size_info_s { 520 uint32 packet_size; /**< ROE Pay Load size in Bits.2*M*S */ 521 uint32 last_packet_num; /**< Set Packet Number if last packet has different size. */ 522 uint32 last_packet_size; /**< Size of last packet payload. */ 523 } cprimod_payload_size_info_t; 524 525 /* cprimod_payload_size_info_t initialization and validation */ 526 int cprimod_payload_size_info_t_validate(const cprimod_payload_size_info_t* cprimod_payload_size_info); 527 int cprimod_payload_size_info_t_init(cprimod_payload_size_info_t* cprimod_payload_size_info); 528 529 /*! 530 * cprimod_rx_roe_payload_size_set 531 * 532 * @brief Rx ROE payload size config. 533 * 534 * @param [in] unit - unit id 535 * @param [in] port - logical port 536 * @param [in] axc_id - AxC Id 537 * @param [in] config_info - ROE payload size info. 538 */ 539 int cprimod_rx_roe_payload_size_set(int unit, int port, uint32 axc_id, const cprimod_payload_size_info_t* config_info); 540 /*! 541 * cprimod_rx_roe_payload_size_get 542 * 543 * @brief Rx ROE payload size config. 544 * 545 * @param [in] unit - unit id 546 * @param [in] port - logical port 547 * @param [in] axc_id - AxC Id 548 * @param [out] config_info - ROE payload size info. 549 */ 550 int cprimod_rx_roe_payload_size_get(int unit, int port, uint32 axc_id, cprimod_payload_size_info_t* config_info); 551 552 /*! 553 * cprimod_tx_roe_payload_size_set 554 * 555 * @brief Tx ROE payload size config. 556 * 557 * @param [in] unit - unit id 558 * @param [in] port - logical port 559 * @param [in] axc_id - AxC Id 560 * @param [in] config_info - ROE payload size info. 561 */ 562 int cprimod_tx_roe_payload_size_set(int unit, int port, uint32 axc_id, const cprimod_payload_size_info_t* config_info); 563 /*! 564 * cprimod_tx_roe_payload_size_get 565 * 566 * @brief Tx ROE payload size config. 567 * 568 * @param [in] unit - unit id 569 * @param [in] port - logical port 570 * @param [in] axc_id - AxC Id 571 * @param [out] config_info - ROE payload size info. 572 */ 573 int cprimod_tx_roe_payload_size_get(int unit, int port, uint32 axc_id, cprimod_payload_size_info_t* config_info); 574 575 576 /*! 577 * @enum cprimod_compression_type_e 578 * @brief Identify Direction of Operation. 579 */ 580 typedef enum cprimod_compression_type_e { 581 cprimod_compress, 582 cprimod_decompress, 583 cprimod_no_compress, 584 cprimod_Count 585 } cprimod_compression_type_t; 586 587 #ifdef CPRIMOD_DIAG 588 extern enum_mapping_t cprimod_compression_type_t_mapping[]; 589 #endif /*CPRIMOD_DIAG*/ 590 591 /* cprimod_compression_type_t validation */ 592 int cprimod_compression_type_t_validate(cprimod_compression_type_t cprimod_compression_type); 593 594 /*! 595 * @enum cprimod_truncation_type_e 596 * @brief Data Truncation Type . 597 */ 598 typedef enum cprimod_truncation_type_e { 599 cprimod_truncation_type_15_to_16, 600 cprimod_truncation_type_add_0, 601 cprimod_truncation_type_16_to_15, 602 cprimod_truncation_type_add_1, 603 cprimod_truncation_type_Count 604 } cprimod_truncation_type_t; 605 606 #ifdef CPRIMOD_DIAG 607 extern enum_mapping_t cprimod_truncation_type_t_mapping[]; 608 #endif /*CPRIMOD_DIAG*/ 609 610 /* cprimod_truncation_type_t validation */ 611 int cprimod_truncation_type_t_validate(cprimod_truncation_type_t cprimod_truncation_type); 612 613 /*! 614 * @struct cprimod_encap_decap_data_config_s 615 * @brief Config Parameter for Encap Data Procession . 616 */ 617 typedef struct cprimod_encap_decap_data_config_s { 618 uint32 sample_size; /**< Sample Size */ 619 uint32 truncation_enable; /**< Trunccation Enable */ 620 cprimod_truncation_type_t truncation_type; /**< Trunccation Type */ 621 cprimod_compression_type_t compression_type; /**< Compression Type */ 622 uint32 mux_enable; /**< Mux/Demux Enable */ 623 uint32 bit_reversal; /**< Bit Reversal 0 or 1 */ 624 uint32 buffer_size; /**< Encap Queue Size in Bytes.Decap Buffer/Packet Size in bytes. */ 625 uint32 priority; /**< Priority 0-3 - Work Queue. */ 626 uint32 cycle_size; /**< Num of packet in buffer Queue */ 627 int is_agnostic; /**< Is it for Agnostic Mode. */ 628 } cprimod_encap_decap_data_config_t; 629 630 /* cprimod_encap_decap_data_config_t initialization and validation */ 631 int cprimod_encap_decap_data_config_t_validate(const cprimod_encap_decap_data_config_t* cprimod_encap_decap_data_config); 632 int cprimod_encap_decap_data_config_t_init(cprimod_encap_decap_data_config_t* cprimod_encap_decap_data_config); 633 634 /*! 635 * cprimod_cpri_encap_data_config_set 636 * 637 * @brief Encapsulation Data Manipulation Configuration. 638 * 639 * @param [in] unit - unit id 640 * @param [in] port - logical port 641 * @param [in] queue_num - Queue number 642 * @param [in] config_info - Encap Data Configuration info. 643 */ 644 int cprimod_cpri_encap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_decap_data_config_t* config_info); 645 /*! 646 * cprimod_cpri_encap_data_config_get 647 * 648 * @brief Encapsulation Data Manipulation Configuration. 649 * 650 * @param [in] unit - unit id 651 * @param [in] port - logical port 652 * @param [in] queue_num - Queue number 653 * @param [out] config_info - Encap Data Configuration info. 654 */ 655 int cprimod_cpri_encap_data_config_get(int unit, int port, uint32 queue_num, cprimod_encap_decap_data_config_t* config_info); 656 657 /*! 658 * cprimod_cpri_decap_data_config_set 659 * 660 * @brief Decapsulation Data Manipulation Configuration. 661 * 662 * @param [in] unit - unit id 663 * @param [in] port - logical port 664 * @param [in] queue_num - Queue number 665 * @param [in] config_info - Decap Data Configuration info. 666 */ 667 int cprimod_cpri_decap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_decap_data_config_t* config_info); 668 /*! 669 * cprimod_cpri_decap_data_config_get 670 * 671 * @brief Decapsulation Data Manipulation Configuration. 672 * 673 * @param [in] unit - unit id 674 * @param [in] port - logical port 675 * @param [in] queue_num - Queue number 676 * @param [out] config_info - Decap Data Configuration info. 677 */ 678 int cprimod_cpri_decap_data_config_get(int unit, int port, uint32 queue_num, cprimod_encap_decap_data_config_t* config_info); 679 680 681 /*! 682 * @struct cprimod_rsvd4_encap_data_config_s 683 * @brief Config Parameter for RSVD4 Encap Data Procession . 684 */ 685 typedef struct cprimod_rsvd4_encap_data_config_s { 686 uint32 buffer_size; /**< Encap Queue Size in Bytes. */ 687 uint32 priority; /**< Priority 0-3 - Work Queue. */ 688 uint32 gsm_pad_size; /**< GSM Pad Size */ 689 uint32 gsm_extra_pad_size; /**< GSM Exta Pad Enable */ 690 uint32 gsm_pad_enable; /**< GSM Pad Enable */ 691 uint32 gsm_control_location; /**< GSM Control Loc. */ 692 uint32 bit_reversal; /**< bit reversal Control. */ 693 } cprimod_rsvd4_encap_data_config_t; 694 695 /* cprimod_rsvd4_encap_data_config_t initialization and validation */ 696 int cprimod_rsvd4_encap_data_config_t_validate(const cprimod_rsvd4_encap_data_config_t* cprimod_rsvd4_encap_data_config); 697 int cprimod_rsvd4_encap_data_config_t_init(cprimod_rsvd4_encap_data_config_t* cprimod_rsvd4_encap_data_config); 698 699 700 /*! 701 * @struct cprimod_rsvd4_decap_data_config_s 702 * @brief Config Parameter for RSVD4 Decap Data Procession . 703 */ 704 typedef struct cprimod_rsvd4_decap_data_config_s { 705 uint32 buffer_size; /**< Encap Queue Size in Bytes. */ 706 uint32 cycle_size; /**< Num of Packet in Queue. */ 707 uint32 gsm_pad_size; /**< GSM Pad Size */ 708 uint32 gsm_extra_pad_size; /**< GSM Exta Pad Enable */ 709 uint32 gsm_pad_enable; /**< GSM Pad Enable */ 710 uint32 gsm_control_location; /**< GSM Control Loc. */ 711 uint32 bit_reversal; /**< bit reversal Control. */ 712 } cprimod_rsvd4_decap_data_config_t; 713 714 /* cprimod_rsvd4_decap_data_config_t initialization and validation */ 715 int cprimod_rsvd4_decap_data_config_t_validate(const cprimod_rsvd4_decap_data_config_t* cprimod_rsvd4_decap_data_config); 716 int cprimod_rsvd4_decap_data_config_t_init(cprimod_rsvd4_decap_data_config_t* cprimod_rsvd4_decap_data_config); 717 718 /*! 719 * cprimod_rsvd4_encap_data_config_set 720 * 721 * @brief Encapsulation Data Manipulation Configuration. 722 * 723 * @param [in] unit - unit id 724 * @param [in] port - logical port 725 * @param [in] queue_num - Queue number 726 * @param [in] config_info - Encap Data Configuration info. 727 */ 728 int cprimod_rsvd4_encap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_rsvd4_encap_data_config_t* config_info); 729 /*! 730 * cprimod_rsvd4_encap_data_config_get 731 * 732 * @brief Encapsulation Data Manipulation Configuration. 733 * 734 * @param [in] unit - unit id 735 * @param [in] port - logical port 736 * @param [in] queue_num - Queue number 737 * @param [out] config_info - Encap Data Configuration info. 738 */ 739 int cprimod_rsvd4_encap_data_config_get(int unit, int port, uint32 queue_num, cprimod_rsvd4_encap_data_config_t* config_info); 740 741 /*! 742 * cprimod_rsvd4_decap_data_config_set 743 * 744 * @brief Decapsulation Data Manipulation Configuration. 745 * 746 * @param [in] unit - unit id 747 * @param [in] port - logical port 748 * @param [in] queue_num - Queue number 749 * @param [in] config_info - Decap Data Configuration info. 750 */ 751 int cprimod_rsvd4_decap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_rsvd4_decap_data_config_t* config_info); 752 /*! 753 * cprimod_rsvd4_decap_data_config_get 754 * 755 * @brief Decapsulation Data Manipulation Configuration. 756 * 757 * @param [in] unit - unit id 758 * @param [in] port - logical port 759 * @param [in] queue_num - Queue number 760 * @param [out] config_info - Decap Data Configuration info. 761 */ 762 int cprimod_rsvd4_decap_data_config_get(int unit, int port, uint32 queue_num, cprimod_rsvd4_decap_data_config_t* config_info); 763 764 765 /*! 766 * @enum cprimod_hdr_encap_type_e 767 * @brief Encapsulation Header Type. 768 */ 769 typedef enum cprimod_hdr_encap_type_e { 770 cprimod_hdr_encap_type_roe, 771 cprimod_hdr_encap_type_encap_none, 772 cprimod_hdr_encap_type_Count 773 } cprimod_hdr_encap_type_t; 774 775 #ifdef CPRIMOD_DIAG 776 extern enum_mapping_t cprimod_hdr_encap_type_t_mapping[]; 777 #endif /*CPRIMOD_DIAG*/ 778 779 /* cprimod_hdr_encap_type_t validation */ 780 int cprimod_hdr_encap_type_t_validate(cprimod_hdr_encap_type_t cprimod_hdr_encap_type); 781 782 /*! 783 * @enum cprimod_hdr_vlan_type_e 784 * @brief Header VLAN Type. 785 */ 786 typedef enum cprimod_hdr_vlan_type_e { 787 cprimodHdrVlanTypeUntagged, 788 cprimodHdrVlanTypeTaggedVlan0, 789 cprimodHdrVlanTypeQinQ, 790 cprimodHdrVlanTypeTaggedVlan1, 791 cprimodHdrVlanTypeCount 792 } cprimod_hdr_vlan_type_t; 793 794 #ifdef CPRIMOD_DIAG 795 extern enum_mapping_t cprimod_hdr_vlan_type_t_mapping[]; 796 #endif /*CPRIMOD_DIAG*/ 797 798 /* cprimod_hdr_vlan_type_t validation */ 799 int cprimod_hdr_vlan_type_t_validate(cprimod_hdr_vlan_type_t cprimod_hdr_vlan_type); 800 typedef _shr_cpri_roe_frame_format_t cprimod_cpri_roe_frame_format_t; 801 802 #define CPRIMOD_CPRI_ROE_FRAME_FORMAT_IEEE1914 _shrCpriRoeFrameFormatIEEE1914 803 #define CPRIMOD_CPRI_ROE_FRAME_FORMAT_RSVD3 _shrCpriRoeFrameFormatRsvd3 804 #define CPRIMOD_CPRI_ROE_FRAME_FORMAT_ECPRI8 _shrCpriRoeFrameFormatEcpri8 805 #define CPRIMOD_CPRI_ROE_FRAME_FORMAT_ECPRI12 _shrCpriRoeFrameFormatEcpri12 806 807 808 /*! 809 * @struct cprimod_encap_header_config_s 810 * @brief Encapsulation Header Configuration. 811 */ 812 typedef struct cprimod_encap_header_config_s { 813 cprimod_hdr_encap_type_t header_type; /**< Encapsulation Header Type. ROE or ETH (no encap). */ 814 uint32 flow_id; /**< ROE flow ID. */ 815 uint32 roe_subtype; /**< ROE SubType (IEEE P1914). */ 816 uint32 ordering_info_index; /**< Ordering Info Profile number. */ 817 uint32 mac_da_index; /**< Index to Mac DA table. */ 818 uint32 mac_sa_index; /**< Index to Mac SA table. */ 819 cprimod_hdr_vlan_type_t vlan_type; /**< VLAN Type */ 820 uint32 vlan_id_0_index; /**< Index to VLAN ID 0 table. */ 821 uint32 vlan_id_1_index; /**< Index to VLAN ID 1 table. */ 822 uint32 vlan_0_priority; /**< VLAN 0 Priority. */ 823 uint32 vlan_1_priority; /**< VLAN 1 Priority. */ 824 uint32 vlan_eth_type_index; /**< Index to VLAN ETH Type. */ 825 uint32 use_tagid_for_vlan; /**< Use tag id to index vlan. */ 826 uint32 use_tagid_for_flowid; /**< Use tag id for flow id. */ 827 uint32 use_opcode; /**< Use opcode IEEE P1914. */ 828 uint32 roe_opcode; /**< ROE opcode IEEE P1914. */ 829 uint8 version; /**< version. */ 830 cprimod_cpri_roe_frame_format_t roe_frame_format; /**< Frame Format. */ 831 uint32 ecpri_pc_id; /**< PC_ID for ecpri used in eCPRI format . */ 832 uint32 ecpri_msg_type; /**< Message Type used in eCPRI format. */ 833 } cprimod_encap_header_config_t; 834 835 /* cprimod_encap_header_config_t initialization and validation */ 836 int cprimod_encap_header_config_t_validate(const cprimod_encap_header_config_t* cprimod_encap_header_config); 837 int cprimod_encap_header_config_t_init(cprimod_encap_header_config_t* cprimod_encap_header_config); 838 839 /*! 840 * cprimod_encap_header_config_set 841 * 842 * @brief Encapsulation Header Configuration. 843 * 844 * @param [in] unit - unit id 845 * @param [in] port - logical port 846 * @param [in] queue_num - Queue number 0-79 847 * @param [in] config_info - Encap Header Configuration info. 848 */ 849 int cprimod_encap_header_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_header_config_t* config_info); 850 /*! 851 * cprimod_encap_header_config_get 852 * 853 * @brief Encapsulation Header Configuration. 854 * 855 * @param [in] unit - unit id 856 * @param [in] port - logical port 857 * @param [in] queue_num - Queue number 0-79 858 * @param [out] config_info - Encap Header Configuration info. 859 */ 860 int cprimod_encap_header_config_get(int unit, int port, uint32 queue_num, cprimod_encap_header_config_t* config_info); 861 862 /*! 863 * cprimod_rx_rsvd4_gsm_tsn_bitmap_set 864 * 865 * @brief Encapsulation Header Configuration. 866 * 867 * @param [in] unit - unit id 868 * @param [in] port - logical port 869 * @param [in] queue_num - Queue number 0-79 870 * @param [in] tsn_bitmap - GSM TSN BitMap . 871 */ 872 int cprimod_rx_rsvd4_gsm_tsn_bitmap_set(int unit, int port, uint32 queue_num, uint32 tsn_bitmap); 873 /*! 874 * cprimod_rx_rsvd4_gsm_tsn_bitmap_get 875 * 876 * @brief Encapsulation Header Configuration. 877 * 878 * @param [in] unit - unit id 879 * @param [in] port - logical port 880 * @param [in] queue_num - Queue number 0-79 881 * @param [out] tsn_bitmap - GSM TSN BitMap. 882 */ 883 int cprimod_rx_rsvd4_gsm_tsn_bitmap_get(int unit, int port, uint32 queue_num, uint32* tsn_bitmap); 884 885 886 /*! 887 * @enum cprimod_ordering_info_type_e 888 * @brief Ordering info Types. 889 */ 890 typedef enum cprimod_ordering_info_type_e { 891 cprimod_ordering_info_type_roe_sequence, 892 cprimod_ordering_info_type_bfn_for_qcnt, 893 cprimod_ordering_info_type_use_pinfo, 894 cprimod_ordering_info_type_Count 895 } cprimod_ordering_info_type_t; 896 897 #ifdef CPRIMOD_DIAG 898 extern enum_mapping_t cprimod_ordering_info_type_t_mapping[]; 899 #endif /*CPRIMOD_DIAG*/ 900 901 /* cprimod_ordering_info_type_t validation */ 902 int cprimod_ordering_info_type_t_validate(cprimod_ordering_info_type_t cprimod_ordering_info_type); 903 904 /*! 905 * @enum cprimod_ordering_info_prop_e 906 * @brief Ordering info Types. 907 */ 908 typedef enum cprimod_ordering_info_prop_e { 909 cprimod_ordering_info_prop_no_increment, 910 cprimod_ordering_info_prop_increment_by_constant, 911 cprimod_ordering_info_prop_increment_by_payload, 912 cprimod_ordering_info_prop_Count 913 } cprimod_ordering_info_prop_t; 914 915 #ifdef CPRIMOD_DIAG 916 extern enum_mapping_t cprimod_ordering_info_prop_t_mapping[]; 917 #endif /*CPRIMOD_DIAG*/ 918 919 /* cprimod_ordering_info_prop_t validation */ 920 int cprimod_ordering_info_prop_t_validate(cprimod_ordering_info_prop_t cprimod_ordering_info_prop); 921 922 /*! 923 * @struct cprimod_encap_ordering_info_entry_s 924 * @brief Encap Ordering info Entry . 925 */ 926 typedef struct cprimod_encap_ordering_info_entry_s { 927 cprimod_ordering_info_type_t type; /**< Ordering info type. */ 928 cprimod_ordering_info_prop_t pcnt_prop; /**< seqNumPIncProp */ 929 uint32 pcnt_size; /**< P count size 1-32 bits. */ 930 uint32 pcnt_increment; /**< .seqNumPInc */ 931 uint32 pcnt_max; /**< .seqNumPMax */ 932 cprimod_ordering_info_prop_t qcnt_prop; /**< seqNumQIncProp */ 933 uint32 qcnt_size; /**< Q count size 0 - (32-pcnt_size) bits. */ 934 uint32 qcnt_increment; /**< .seqNumQInc */ 935 uint32 qcnt_max; /**< .seqNumQMax */ 936 uint32 seq_reserve_value; /**< .seqNumRsvd Value. */ 937 } cprimod_encap_ordering_info_entry_t; 938 939 /* cprimod_encap_ordering_info_entry_t initialization and validation */ 940 int cprimod_encap_ordering_info_entry_t_validate(const cprimod_encap_ordering_info_entry_t* cprimod_encap_ordering_info_entry); 941 int cprimod_encap_ordering_info_entry_t_init(cprimod_encap_ordering_info_entry_t* cprimod_encap_ordering_info_entry); 942 943 944 /*! 945 * @struct cprimod_decap_ordering_info_entry_s 946 * @brief Decap Ordering info , with TSN bit map Entry . 947 */ 948 typedef struct cprimod_decap_ordering_info_entry_s { 949 cprimod_ordering_info_type_t type; /**< Ordering info type. */ 950 uint32 pcnt_extended; /**< P counter combine with Q counter */ 951 uint32 pcnt_pkt_count; /**< Max packet describe by P counter. */ 952 uint32 pcnt_size; /**< P count size 1-32 bits. */ 953 uint32 pcnt_increment; /**< .seqNumPInc */ 954 uint32 pcnt_max; /**< .seqNumPMax */ 955 uint32 pcnt_bias; /**< P cnt bias */ 956 uint32 pcnt_increment_p2; /**< .seqNumPInc to be power of 2 */ 957 uint32 qcnt_size; /**< Q count size 0 - (32-pcnt_size) bits. */ 958 uint32 qcnt_increment; /**< .seqNumQInc */ 959 uint32 qcnt_max; /**< .seqNumQMax */ 960 uint32 qcnt_bias; /**< Q cnt bias */ 961 uint32 qcnt_increment_p2; /**< .seqNumQInc to be power of 2 */ 962 uint32 modulo_2; /**< Queue Cycle Size is modulo 2. */ 963 uint32 gsm_tsn_bitmap; /**< GSM TSN bit map. */ 964 uint32 seq_reserve_value; /**< .seqNumRsvd Value. */ 965 } cprimod_decap_ordering_info_entry_t; 966 967 /* cprimod_decap_ordering_info_entry_t initialization and validation */ 968 int cprimod_decap_ordering_info_entry_t_validate(const cprimod_decap_ordering_info_entry_t* cprimod_decap_ordering_info_entry); 969 int cprimod_decap_ordering_info_entry_t_init(cprimod_decap_ordering_info_entry_t* cprimod_decap_ordering_info_entry); 970 971 /*! 972 * cprimod_encap_ordering_info_entry_set 973 * 974 * @brief Encapsulation Header Configuration. 975 * 976 * @param [in] unit - unit id 977 * @param [in] port - logical port 978 * @param [in] index - Ordering info table index. 979 * @param [in] user_entry - Encap Ordering info Entry 980 */ 981 int cprimod_encap_ordering_info_entry_set(int unit, int port, uint32 index, const cprimod_encap_ordering_info_entry_t* user_entry); 982 /*! 983 * cprimod_encap_ordering_info_entry_get 984 * 985 * @brief Encapsulation Header Configuration. 986 * 987 * @param [in] unit - unit id 988 * @param [in] port - logical port 989 * @param [in] index - Ordering info table index. 990 * @param [out] user_entry - Encap Ordering info Entry 991 */ 992 int cprimod_encap_ordering_info_entry_get(int unit, int port, uint32 index, cprimod_encap_ordering_info_entry_t* user_entry); 993 994 /*! 995 * cprimod_decap_ordering_info_entry_set 996 * 997 * @brief Encapsulation Header Configuration. 998 * 999 * @param [in] unit - unit id 1000 * @param [in] port - logical port 1001 * @param [in] index - Ordering info table index. 1002 * @param [in] user_entry - Encap Ordering info Entry 1003 */ 1004 int cprimod_decap_ordering_info_entry_set(int unit, int port, uint32 index, const cprimod_decap_ordering_info_entry_t* user_entry); 1005 /*! 1006 * cprimod_decap_ordering_info_entry_get 1007 * 1008 * @brief Encapsulation Header Configuration. 1009 * 1010 * @param [in] unit - unit id 1011 * @param [in] port - logical port 1012 * @param [in] index - Ordering info table index. 1013 * @param [out] user_entry - Encap Ordering info Entry 1014 */ 1015 int cprimod_decap_ordering_info_entry_get(int unit, int port, uint32 index, cprimod_decap_ordering_info_entry_t* user_entry); 1016 1017 1018 /*! 1019 * @struct cprimod_cpri_ordering_info_offset_s 1020 * @brief Encap Ordering info offset Entry . 1021 */ 1022 typedef struct cprimod_cpri_ordering_info_offset_s { 1023 uint32 p_size; /**< P count size 1-32 bits. */ 1024 uint32 p_offset; /**< P counter offset. */ 1025 uint32 q_size; /**< Q count size 0-(32-p_size) bits. */ 1026 uint32 q_offset; /**< ! counter offset. */ 1027 } cprimod_cpri_ordering_info_offset_t; 1028 1029 /* cprimod_cpri_ordering_info_offset_t initialization and validation */ 1030 int cprimod_cpri_ordering_info_offset_t_validate(const cprimod_cpri_ordering_info_offset_t* cprimod_cpri_ordering_info_offset); 1031 int cprimod_cpri_ordering_info_offset_t_init(cprimod_cpri_ordering_info_offset_t* cprimod_cpri_ordering_info_offset); 1032 1033 /*! 1034 * cprimod_encap_ordering_info_sequence_offset_set 1035 * 1036 * @brief Encapsulation Order Info Offset, _get() user need to provide p_size and q_size. 1037 * 1038 * @param [in] unit - unit id 1039 * @param [in] port - logical port 1040 * @param [in] queue - Queue numer. 1041 * @param [in] control - Control/Data. 1042 * @param [in] offset_entry - Encap Ordering info Offset Entry 1043 */ 1044 int cprimod_encap_ordering_info_sequence_offset_set(int unit, int port, uint32 queue, uint32 control, const cprimod_cpri_ordering_info_offset_t* offset_entry); 1045 /*! 1046 * cprimod_encap_ordering_info_sequence_offset_get 1047 * 1048 * @brief Encapsulation Order Info Offset, _get() user need to provide p_size and q_size. 1049 * 1050 * @param [in] unit - unit id 1051 * @param [in] port - logical port 1052 * @param [in] queue - Queue numer. 1053 * @param [in] control - Control/Data. 1054 * @param [in] pcnt_size - p/q counter size 1055 * @param [in] qcnt_size - p/q counter size 1056 * @param [out] offset_entry - Encap Ordering info Offset Entry 1057 */ 1058 int cprimod_encap_ordering_info_sequence_offset_get(int unit, int port, uint32 queue, uint32 control, uint32 pcnt_size, uint32 qcnt_size, cprimod_cpri_ordering_info_offset_t* offset_entry); 1059 1060 /*! 1061 * cprimod_decap_ordering_info_sequence_offset_set 1062 * 1063 * @brief Decapsulation Order Info Offset, _get() user need to provide p_size and q_size. 1064 * 1065 * @param [in] unit - unit id 1066 * @param [in] port - logical port 1067 * @param [in] queue - Queue numer. 1068 * @param [in] offset_entry - Decap Ordering info Offset Entry 1069 */ 1070 int cprimod_decap_ordering_info_sequence_offset_set(int unit, int port, uint32 queue, const cprimod_cpri_ordering_info_offset_t* offset_entry); 1071 /*! 1072 * cprimod_decap_ordering_info_sequence_offset_get 1073 * 1074 * @brief Decapsulation Order Info Offset, _get() user need to provide p_size and q_size. 1075 * 1076 * @param [in] unit - unit id 1077 * @param [in] port - logical port 1078 * @param [in] queue - Queue numer. 1079 * @param [in] pcnt_size - p/q counter size 1080 * @param [in] qcnt_size - p/q counter size 1081 * @param [out] offset_entry - Decap Ordering info Offset Entry 1082 */ 1083 int cprimod_decap_ordering_info_sequence_offset_get(int unit, int port, uint32 queue, uint32 pcnt_size, uint32 qcnt_size, cprimod_cpri_ordering_info_offset_t* offset_entry); 1084 1085 typedef bcm_mac_t cprimod_mac_addr_t; 1086 1087 /*! 1088 * cprimod_encap_mac_da_entry_set 1089 * 1090 * @brief Destination MAC Addr. 1091 * 1092 * @param [in] unit - unit id 1093 * @param [in] port - logical port 1094 * @param [in] index - Index number. 1095 * @param [in] addr - MAC Address. 1096 */ 1097 int cprimod_encap_mac_da_entry_set(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 1098 /*! 1099 * cprimod_encap_mac_da_entry_get 1100 * 1101 * @brief Destination MAC Addr. 1102 * 1103 * @param [in] unit - unit id 1104 * @param [in] port - logical port 1105 * @param [in] index - Index number. 1106 * @param [out] addr - MAC Address. 1107 */ 1108 int cprimod_encap_mac_da_entry_get(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 1109 1110 /*! 1111 * cprimod_encap_mac_sa_entry_set 1112 * 1113 * @brief Source MAC Addr. 1114 * 1115 * @param [in] unit - unit id 1116 * @param [in] port - logical port 1117 * @param [in] index - Index number. 1118 * @param [in] addr - MAC Address. 1119 */ 1120 int cprimod_encap_mac_sa_entry_set(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 1121 /*! 1122 * cprimod_encap_mac_sa_entry_get 1123 * 1124 * @brief Source MAC Addr. 1125 * 1126 * @param [in] unit - unit id 1127 * @param [in] port - logical port 1128 * @param [in] index - Index number. 1129 * @param [out] addr - MAC Address. 1130 */ 1131 int cprimod_encap_mac_sa_entry_get(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 1132 1133 1134 /*! 1135 * @enum cprimod_vlan_table_id_e 1136 * @brief VLAN Table ID 1137 */ 1138 typedef enum cprimod_vlan_table_id_e { 1139 cprimodVlanTable0, 1140 cprimodVlanTable1, 1141 cprimodVlanTableCount 1142 } cprimod_vlan_table_id_t; 1143 1144 #ifdef CPRIMOD_DIAG 1145 extern enum_mapping_t cprimod_vlan_table_id_t_mapping[]; 1146 #endif /*CPRIMOD_DIAG*/ 1147 1148 /* cprimod_vlan_table_id_t validation */ 1149 int cprimod_vlan_table_id_t_validate(cprimod_vlan_table_id_t cprimod_vlan_table_id); 1150 /*! 1151 * cprimod_encap_vlan_id_entry_set 1152 * 1153 * @brief VLAN ID Entry. 1154 * 1155 * @param [in] unit - unit id 1156 * @param [in] port - logical port 1157 * @param [in] table_id - VLAN Table ID 0 or 1. 1158 * @param [in] index - Index to Vlan Id Table. 1159 * @param [in] vlan_id - VLAN_ID. 1160 */ 1161 int cprimod_encap_vlan_id_entry_set(int unit, int port, cprimod_vlan_table_id_t table_id, uint32 index, uint32 vlan_id); 1162 /*! 1163 * cprimod_encap_vlan_id_entry_get 1164 * 1165 * @brief VLAN ID Entry. 1166 * 1167 * @param [in] unit - unit id 1168 * @param [in] port - logical port 1169 * @param [in] table_id - VLAN Table ID 0 or 1. 1170 * @param [in] index - Index to Vlan Id Table. 1171 * @param [out] vlan_id - VLAN_ID. 1172 */ 1173 int cprimod_encap_vlan_id_entry_get(int unit, int port, cprimod_vlan_table_id_t table_id, uint32 index, uint32* vlan_id); 1174 1175 1176 /*! 1177 * @enum cprimod_ethertype_e 1178 * @brief ETHER TYPE 1179 */ 1180 typedef enum cprimod_ethertype_e { 1181 cprimodEthertypeRoe = 0, 1182 cprimodEthertypeFast = 1, 1183 cprimodEthertypeVlan = 2, 1184 cprimodEthertypeQinQ = 3, 1185 cprimodEthertypeRoe1 = 4, 1186 cprimodEthertypeCount 1187 } cprimod_ethertype_t; 1188 1189 #ifdef CPRIMOD_DIAG 1190 extern enum_mapping_t cprimod_ethertype_t_mapping[]; 1191 #endif /*CPRIMOD_DIAG*/ 1192 1193 /* cprimod_ethertype_t validation */ 1194 int cprimod_ethertype_t_validate(cprimod_ethertype_t cprimod_ethertype); 1195 /*! 1196 * cprimod_decap_ethertype_config_set 1197 * 1198 * @brief Decap Ethertype Set/Get. 1199 * 1200 * @param [in] unit - unit id 1201 * @param [in] port - logical port 1202 * @param [in] type_id - ETHER TYpe ID. 1203 * @param [in] ethertype - EtherType. 1204 */ 1205 int cprimod_decap_ethertype_config_set(int unit, int port, cprimod_ethertype_t type_id, uint16 ethertype); 1206 /*! 1207 * cprimod_decap_ethertype_config_get 1208 * 1209 * @brief Decap Ethertype Set/Get. 1210 * 1211 * @param [in] unit - unit id 1212 * @param [in] port - logical port 1213 * @param [in] type_id - ETHER TYpe ID. 1214 * @param [out] ethertype - EtherType. 1215 */ 1216 int cprimod_decap_ethertype_config_get(int unit, int port, cprimod_ethertype_t type_id, uint16* ethertype); 1217 1218 /*! 1219 * cprimod_encap_ethertype_config_set 1220 * 1221 * @brief Encap Ethtype Set/Get. 1222 * 1223 * @param [in] unit - unit id 1224 * @param [in] port - logical port 1225 * @param [in] type_id - ETHER TYpe ID. 1226 * @param [in] ethertype - EtherType. 1227 */ 1228 int cprimod_encap_ethertype_config_set(int unit, int port, cprimod_ethertype_t type_id, uint16 ethertype); 1229 /*! 1230 * cprimod_encap_ethertype_config_get 1231 * 1232 * @brief Encap Ethtype Set/Get. 1233 * 1234 * @param [in] unit - unit id 1235 * @param [in] port - logical port 1236 * @param [in] type_id - ETHER TYpe ID. 1237 * @param [out] ethertype - EtherType. 1238 */ 1239 int cprimod_encap_ethertype_config_get(int unit, int port, cprimod_ethertype_t type_id, uint16* ethertype); 1240 1241 /*! 1242 * cprimod_encap_memory_clear 1243 * 1244 * @brief Clear the internal queue and memory processing 1245 * 1246 * @param [in] unit - unit id 1247 * @param [in] port - logical port 1248 * @param [in] queue_num - QUEUE Number. 1249 */ 1250 int cprimod_encap_memory_clear(int unit, int port, int queue_num); 1251 1252 /*! 1253 * cprimod_cpri_rx_framer_state_clear 1254 * 1255 * @brief Clear the internal state of framer and container processing 1256 * 1257 * @param [in] unit - unit id 1258 * @param [in] port - logical port 1259 * @param [in] queue_num - QUEUE Number. 1260 */ 1261 int cprimod_cpri_rx_framer_state_clear(int unit, int port, int queue_num); 1262 1263 /*! 1264 * cprimod_decap_memory_clear 1265 * 1266 * @brief Clear the internal queue and memory processing 1267 * 1268 * @param [in] unit - unit id 1269 * @param [in] port - logical port 1270 * @param [in] queue_num - QUEUE Number. 1271 */ 1272 int cprimod_decap_memory_clear(int unit, int port, int queue_num); 1273 1274 /*! 1275 * cprimod_cpri_tx_framer_state_clear 1276 * 1277 * @brief Clear the internal state of framer and container processing 1278 * 1279 * @param [in] unit - unit id 1280 * @param [in] port - logical port 1281 * @param [in] queue_num - QUEUE Number. 1282 */ 1283 int cprimod_cpri_tx_framer_state_clear(int unit, int port, int queue_num); 1284 1285 1286 /*! 1287 * @enum cprimod_cls_option_e 1288 * @brief Decap Flow Classification Options. 1289 */ 1290 typedef enum cprimod_cls_option_e { 1291 cprimodClsOptionUseQueueNum, 1292 cprimodClsOptionUseFlowIdToQueue, 1293 cprimodClsOptionUseOpcodeToQueue, 1294 cprimodClsOptionCount 1295 } cprimod_cls_option_t; 1296 1297 #ifdef CPRIMOD_DIAG 1298 extern enum_mapping_t cprimod_cls_option_t_mapping[]; 1299 #endif /*CPRIMOD_DIAG*/ 1300 1301 /* cprimod_cls_option_t validation */ 1302 int cprimod_cls_option_t_validate(cprimod_cls_option_t cprimod_cls_option); 1303 1304 /*! 1305 * @enum cprimod_cls_flow_type_e 1306 * @brief Decap Flow Classification Options. 1307 */ 1308 typedef enum cprimod_cls_flow_type_e { 1309 cprimodClsFlowTypeData, 1310 cprimodClsFlowTypeDataWithExt, 1311 cprimodClsFlowTypeCtrlWithOpcode, 1312 cprimodClsFlowTypeCtrl, 1313 cprimodClsFlowTypeCount 1314 } cprimod_cls_flow_type_t; 1315 1316 #ifdef CPRIMOD_DIAG 1317 extern enum_mapping_t cprimod_cls_flow_type_t_mapping[]; 1318 #endif /*CPRIMOD_DIAG*/ 1319 1320 /* cprimod_cls_flow_type_t validation */ 1321 int cprimod_cls_flow_type_t_validate(cprimod_cls_flow_type_t cprimod_cls_flow_type); 1322 /*! 1323 * cprimod_decap_flow_classification_config_set 1324 * 1325 * @brief Set Flow Classification, Subtype to Queue Mapping. 1326 * 1327 * @param [in] unit - unit id 1328 * @param [in] port - logical port 1329 * @param [in] subtype - ROE Subtype - index. 1330 * @param [in] queue_num - Queue Num or Offset to Flow 1331 * @param [in] cls_option - Flow CLS Option. 1332 * @param [in] flow_type - CLS flow Type 1333 */ 1334 int cprimod_decap_flow_classification_config_set(int unit, int port, uint8 subtype, uint32 queue_num, cprimod_cls_option_t cls_option, cprimod_cls_flow_type_t flow_type); 1335 /*! 1336 * cprimod_decap_flow_classification_config_get 1337 * 1338 * @brief Set Flow Classification, Subtype to Queue Mapping. 1339 * 1340 * @param [in] unit - unit id 1341 * @param [in] port - logical port 1342 * @param [in] subtype - ROE Subtype - index. 1343 * @param [out] queue_num - Queue Num or Offset to Flow 1344 * @param [out] cls_option - Flow CLS Option. 1345 * @param [out] flow_type - CLS flow Type 1346 */ 1347 int cprimod_decap_flow_classification_config_get(int unit, int port, uint8 subtype, uint32* queue_num, cprimod_cls_option_t* cls_option, cprimod_cls_flow_type_t* flow_type); 1348 1349 /*! 1350 * cprimod_decap_flow_to_queue_mapping_set 1351 * 1352 * @brief Set/Get Flow to Queue Mapping. 1353 * 1354 * @param [in] unit - unit id 1355 * @param [in] port - logical port 1356 * @param [in] flow_id - Flow ID 1357 * @param [in] queue_num - Queue Num or Offset to Flow 1358 */ 1359 int cprimod_decap_flow_to_queue_mapping_set(int unit, int port, uint32 flow_id, uint32 queue_num); 1360 /*! 1361 * cprimod_decap_flow_to_queue_mapping_get 1362 * 1363 * @brief Set/Get Flow to Queue Mapping. 1364 * 1365 * @param [in] unit - unit id 1366 * @param [in] port - logical port 1367 * @param [in] flow_id - Flow ID 1368 * @param [out] queue_num - Queue Num or Offset to Flow 1369 */ 1370 int cprimod_decap_flow_to_queue_mapping_get(int unit, int port, uint32 flow_id, uint32* queue_num); 1371 1372 /*! 1373 * cprimod_decap_queue_to_ordering_info_index_mapping_set 1374 * 1375 * @brief Set/Get Queue to Ordering info Table Index Mapping. 1376 * 1377 * @param [in] unit - unit id 1378 * @param [in] port - logical port 1379 * @param [in] queue_num - Queue Num 1380 * @param [in] ordering_info_index - Index to Ordering info Table 1381 */ 1382 int cprimod_decap_queue_to_ordering_info_index_mapping_set(int unit, int port, uint32 queue_num, uint32 ordering_info_index); 1383 /*! 1384 * cprimod_decap_queue_to_ordering_info_index_mapping_get 1385 * 1386 * @brief Set/Get Queue to Ordering info Table Index Mapping. 1387 * 1388 * @param [in] unit - unit id 1389 * @param [in] port - logical port 1390 * @param [in] queue_num - Queue Num 1391 * @param [out] ordering_info_index - Index to Ordering info Table 1392 */ 1393 int cprimod_decap_queue_to_ordering_info_index_mapping_get(int unit, int port, uint32 queue_num, uint32* ordering_info_index); 1394 1395 /*! 1396 * cprimod_tx_framer_tgen_tick_set 1397 * 1398 * @brief Tx Framer TGEN tick configuration. 1399 * 1400 * @param [in] unit - unit id 1401 * @param [in] port - logical port 1402 * @param [in] divider - PMD clock divider. 1403 * @param [in] basic_frame_tick - Number of Ticks in a basic frame. 1404 * @param [in] tick_bitmap - Bit Map for the tick. 1405 * @param [in] tick_bitmap_size - Tick Bitmap size in number of bits. 1406 */ 1407 int cprimod_tx_framer_tgen_tick_set(int unit, int port, uint32 divider, uint32 basic_frame_tick, uint32 tick_bitmap, uint32 tick_bitmap_size); 1408 /*! 1409 * cprimod_tx_framer_tgen_tick_get 1410 * 1411 * @brief Tx Framer TGEN tick configuration. 1412 * 1413 * @param [in] unit - unit id 1414 * @param [in] port - logical port 1415 * @param [out] divider - PMD clock divider. 1416 * @param [out] basic_frame_tick - Number of Ticks in a basic frame. 1417 * @param [out] tick_bitmap - Bit Map for the tick. 1418 * @param [out] tick_bitmap_size - Tick Bitmap size in number of bits. 1419 */ 1420 int cprimod_tx_framer_tgen_tick_get(int unit, int port, uint32* divider, uint32* basic_frame_tick, uint32* tick_bitmap, uint32* tick_bitmap_size); 1421 1422 /*! 1423 * cprimod_tx_framer_tgen_enable 1424 * 1425 * @brief Tx Framer Tgen Enable/Disable set. 1426 * 1427 * @param [in] unit - unit id 1428 * @param [in] port - logical port 1429 * @param [in] enable - TGEN enable/disable. 1430 */ 1431 int cprimod_tx_framer_tgen_enable(int unit, int port, uint8 enable); 1432 1433 /*! 1434 * cprimod_tx_framer_tgen_offset_set 1435 * 1436 * @brief Tx Framer offset to start TGEN. 1437 * 1438 * @param [in] unit - unit id 1439 * @param [in] port - logical port 1440 * @param [in] timestamp_offset - Offset to start TGEN. 1441 */ 1442 int cprimod_tx_framer_tgen_offset_set(int unit, int port, uint64 timestamp_offset); 1443 /*! 1444 * cprimod_tx_framer_tgen_offset_get 1445 * 1446 * @brief Tx Framer offset to start TGEN. 1447 * 1448 * @param [in] unit - unit id 1449 * @param [in] port - logical port 1450 * @param [out] timestamp_offset - Offset to start TGEN. 1451 */ 1452 int cprimod_tx_framer_tgen_offset_get(int unit, int port, uint64* timestamp_offset); 1453 1454 /*! 1455 * cprimod_tx_framer_tgen_next_bfn_config_set 1456 * 1457 * @brief Tx Framer TGEN next Radio Frame Number/Master Frame number (bfn). 1458 * 1459 * @param [in] unit - unit id 1460 * @param [in] port - logical port 1461 * @param [in] tgen_bfn - Next Radio Frame Number. 1462 */ 1463 int cprimod_tx_framer_tgen_next_bfn_config_set(int unit, int port, uint32 tgen_bfn); 1464 /*! 1465 * cprimod_tx_framer_tgen_next_bfn_config_get 1466 * 1467 * @brief Tx Framer TGEN next Radio Frame Number/Master Frame number (bfn). 1468 * 1469 * @param [in] unit - unit id 1470 * @param [in] port - logical port 1471 * @param [out] tgen_bfn - Next Radio Frame Number. 1472 */ 1473 int cprimod_tx_framer_tgen_next_bfn_config_get(int unit, int port, uint32* tgen_bfn); 1474 1475 /*! 1476 * cprimod_tx_framer_tgen_next_hfn_config_set 1477 * 1478 * @brief Tx Framer TGEN next Hyper Frame Number(HFN). 1479 * 1480 * @param [in] unit - unit id 1481 * @param [in] port - logical port 1482 * @param [in] tgen_hfn - Next Hyper Frame Number. 1483 */ 1484 int cprimod_tx_framer_tgen_next_hfn_config_set(int unit, int port, uint32 tgen_hfn); 1485 /*! 1486 * cprimod_tx_framer_tgen_next_hfn_config_get 1487 * 1488 * @brief Tx Framer TGEN next Hyper Frame Number(HFN). 1489 * 1490 * @param [in] unit - unit id 1491 * @param [in] port - logical port 1492 * @param [out] tgen_hfn - Next Hyper Frame Number. 1493 */ 1494 int cprimod_tx_framer_tgen_next_hfn_config_get(int unit, int port, uint32* tgen_hfn); 1495 1496 /*! 1497 * cprimod_tx_framer_next_bfn_get 1498 * 1499 * @brief Tx Framer TGEN next Radio Frame Number/Master Frame (bfn). 1500 * 1501 * @param [in] unit - unit id 1502 * @param [in] port - logical port 1503 * @param [out] tgen_bfn - Next Radio Frame Number. 1504 */ 1505 int cprimod_tx_framer_next_bfn_get(int unit, int port, uint32* tgen_bfn); 1506 1507 /*! 1508 * cprimod_tx_framer_next_hfn_get 1509 * 1510 * @brief Tx Framer TGEN next Hyper Frame Number(HFN). 1511 * 1512 * @param [in] unit - unit id 1513 * @param [in] port - logical port 1514 * @param [out] tgen_hfn - Next Hyper Frame Number. 1515 */ 1516 int cprimod_tx_framer_next_hfn_get(int unit, int port, uint32* tgen_hfn); 1517 1518 1519 /*! 1520 * @enum cprimod_tgen_counter_select_e 1521 * @brief Tx Framer TGEN counter Selection. 1522 */ 1523 typedef enum cprimod_tgen_counter_select_e { 1524 cprimodTgenCounterSelectBfn, 1525 cprimodTgenCounterSelectHfn, 1526 cprimodTgenCounterSelectCount 1527 } cprimod_tgen_counter_select_t; 1528 1529 #ifdef CPRIMOD_DIAG 1530 extern enum_mapping_t cprimod_tgen_counter_select_t_mapping[]; 1531 #endif /*CPRIMOD_DIAG*/ 1532 1533 /* cprimod_tgen_counter_select_t validation */ 1534 int cprimod_tgen_counter_select_t_validate(cprimod_tgen_counter_select_t cprimod_tgen_counter_select); 1535 /*! 1536 * cprimod_tx_framer_tgen_select_counter_set 1537 * 1538 * @brief Tx Framer TGEN Select which counter to use. 1539 * 1540 * @param [in] unit - unit id 1541 * @param [in] port - logical port 1542 * @param [in] tgen_counter_select - Select BFN or HFN. 1543 */ 1544 int cprimod_tx_framer_tgen_select_counter_set(int unit, int port, cprimod_tgen_counter_select_t tgen_counter_select); 1545 /*! 1546 * cprimod_tx_framer_tgen_select_counter_get 1547 * 1548 * @brief Tx Framer TGEN Select which counter to use. 1549 * 1550 * @param [in] unit - unit id 1551 * @param [in] port - logical port 1552 * @param [out] tgen_counter_select - Select BFN or HFN. 1553 */ 1554 int cprimod_tx_framer_tgen_select_counter_get(int unit, int port, cprimod_tgen_counter_select_t* tgen_counter_select); 1555 1556 1557 /*! 1558 * @enum cprimod_flow_type_e 1559 * @brief Flow Type Data or Ctrl. 1560 */ 1561 typedef enum cprimod_flow_type_e { 1562 cprimodFlowTypeData, 1563 cprimodFlowTypeCtrl, 1564 cprimodFlowTypeCount 1565 } cprimod_flow_type_t; 1566 1567 #ifdef CPRIMOD_DIAG 1568 extern enum_mapping_t cprimod_flow_type_t_mapping[]; 1569 #endif /*CPRIMOD_DIAG*/ 1570 1571 /* cprimod_flow_type_t validation */ 1572 int cprimod_flow_type_t_validate(cprimod_flow_type_t cprimod_flow_type); 1573 1574 /*! 1575 * @struct cprimod_header_compare_entry_s 1576 * @brief Header Compare Entry . 1577 */ 1578 typedef struct cprimod_header_compare_entry_s { 1579 uint8 valid; /**< Entry is active. */ 1580 uint32 match_data; /**< Entry is active. */ 1581 uint32 mask; /**< Entry is active. */ 1582 uint8 flow_id; /**< Flow ID. */ 1583 cprimod_flow_type_t flow_type; /**< Flow Type Data or Ctrl. */ 1584 } cprimod_header_compare_entry_t; 1585 1586 /* cprimod_header_compare_entry_t initialization and validation */ 1587 int cprimod_header_compare_entry_t_validate(const cprimod_header_compare_entry_t* cprimod_header_compare_entry); 1588 int cprimod_header_compare_entry_t_init(cprimod_header_compare_entry_t* cprimod_header_compare_entry); 1589 1590 /*! 1591 * cprimod_header_compare_entry_add 1592 * 1593 * @brief Header Compare Entry Add. 1594 * 1595 * @param [in] unit - unit id 1596 * @param [in] port - logical port 1597 * @param [in] compare_entry - Header Compare Entry. 1598 */ 1599 int cprimod_header_compare_entry_add(int unit, int port, const cprimod_header_compare_entry_t* compare_entry); 1600 1601 /*! 1602 * cprimod_header_compare_entry_delete 1603 * 1604 * @brief Header Compare Entry Delete. 1605 * 1606 * @param [in] unit - unit id 1607 * @param [in] port - logical port 1608 * @param [in] compare_entry - Header Compare Entry. 1609 */ 1610 int cprimod_header_compare_entry_delete(int unit, int port, const cprimod_header_compare_entry_t* compare_entry); 1611 1612 /*! 1613 * cprimod_header_compare_entry_for_flow_delete 1614 * 1615 * @brief Header Compare Entry Delete by Flow ID only. 1616 * 1617 * @param [in] unit - unit id 1618 * @param [in] port - logical port 1619 * @param [in] flow_id - Flow ID. 1620 * @param [in] flow_type - Flow Type Data or Ctrl. 1621 */ 1622 int cprimod_header_compare_entry_for_flow_delete(int unit, int port, uint8 flow_id, cprimod_flow_type_t flow_type); 1623 1624 1625 /*! 1626 * @enum cprimod_transmission_rule_type_e 1627 * @brief Modulo Rule Type. 1628 */ 1629 typedef enum cprimod_transmission_rule_type_e { 1630 cprimodTxRuleTypeData, 1631 cprimodTxRuleTypeCtrl, 1632 cprimodTxRuleTypeCount 1633 } cprimod_transmission_rule_type_t; 1634 1635 #ifdef CPRIMOD_DIAG 1636 extern enum_mapping_t cprimod_transmission_rule_type_t_mapping[]; 1637 #endif /*CPRIMOD_DIAG*/ 1638 1639 /* cprimod_transmission_rule_type_t validation */ 1640 int cprimod_transmission_rule_type_t_validate(cprimod_transmission_rule_type_t cprimod_transmission_rule_type); 1641 1642 /*! 1643 * @enum cprimod_modulo_rule_mod_e 1644 * @brief Modulo Rule Type. 1645 */ 1646 typedef enum cprimod_modulo_rule_mod_e { 1647 cprimodModuloRuleMod1, 1648 cprimodModuloRuleMod2, 1649 cprimodModuloRuleMod4, 1650 cprimodModuloRuleMod8, 1651 cprimodModuloRuleMod16, 1652 cprimodModuloRuleMod32, 1653 cprimodModuloRuleMod64, 1654 cprimodModuloRuleModCount 1655 } cprimod_modulo_rule_mod_t; 1656 1657 #ifdef CPRIMOD_DIAG 1658 extern enum_mapping_t cprimod_modulo_rule_mod_t_mapping[]; 1659 #endif /*CPRIMOD_DIAG*/ 1660 1661 /* cprimod_modulo_rule_mod_t validation */ 1662 int cprimod_modulo_rule_mod_t_validate(cprimod_modulo_rule_mod_t cprimod_modulo_rule_mod); 1663 1664 /*! 1665 * @struct cprimod_modulo_rule_entry_s 1666 * @brief Modulo Rule Entry . 1667 */ 1668 typedef struct cprimod_modulo_rule_entry_s { 1669 uint8 active; /**< Entry is active. */ 1670 cprimod_modulo_rule_mod_t modulo_value; /**< Modulo Value. */ 1671 uint8 modulo_index; /**< Modulo Value. */ 1672 uint8 dbm_enable; /**< Dual Bitmap Rule is enable. */ 1673 uint8 flow_dbm_id; /**< Flow Id or DBM profile ID if dbm is enabled. */ 1674 cprimod_flow_type_t flow_type; /**< Flow Type Data or Ctrl. */ 1675 } cprimod_modulo_rule_entry_t; 1676 1677 /* cprimod_modulo_rule_entry_t initialization and validation */ 1678 int cprimod_modulo_rule_entry_t_validate(const cprimod_modulo_rule_entry_t* cprimod_modulo_rule_entry); 1679 int cprimod_modulo_rule_entry_t_init(cprimod_modulo_rule_entry_t* cprimod_modulo_rule_entry); 1680 1681 /*! 1682 * cprimod_modulo_rule_entry_set 1683 * 1684 * @brief Modulo Rule Entry Set/Get. 1685 * 1686 * @param [in] unit - unit id 1687 * @param [in] port - logical port 1688 * @param [in] modulo_rule_num - Modulo Rule Number 0-71 for data 0-15 for control. 1689 * @param [in] modulo_rule_type - Modulo Rule Type, Data or Ctrl. 1690 * @param [in] modulo_rule - Modulo Rule Entry. 1691 */ 1692 int cprimod_modulo_rule_entry_set(int unit, int port, uint8 modulo_rule_num, cprimod_transmission_rule_type_t modulo_rule_type, const cprimod_modulo_rule_entry_t* modulo_rule); 1693 /*! 1694 * cprimod_modulo_rule_entry_get 1695 * 1696 * @brief Modulo Rule Entry Set/Get. 1697 * 1698 * @param [in] unit - unit id 1699 * @param [in] port - logical port 1700 * @param [in] modulo_rule_num - Modulo Rule Number 0-71 for data 0-15 for control. 1701 * @param [in] modulo_rule_type - Modulo Rule Type, Data or Ctrl. 1702 * @param [out] modulo_rule - Modulo Rule Entry. 1703 */ 1704 int cprimod_modulo_rule_entry_get(int unit, int port, uint8 modulo_rule_num, cprimod_transmission_rule_type_t modulo_rule_type, cprimod_modulo_rule_entry_t* modulo_rule); 1705 1706 1707 /*! 1708 * @enum cprimod_dbm_rule_pos_index_e 1709 * @brief DBM Rule Position Index. 1710 */ 1711 typedef enum cprimod_dbm_rule_pos_index_e { 1712 cprimodDbmRulePosIndexStart0, 1713 cprimodDbmRulePosIndexStart10, 1714 cprimodDbmRulePosIndexStart20, 1715 cprimodDbmRulePosIndexStart30, 1716 cprimodDbmRulePosIndexStart40, 1717 cprimodDbmRulePosIndexStart50, 1718 cprimodDbmRulePosIndexStart60, 1719 cprimodDbmRulePosIndexStart70, 1720 cprimodDbmRulePosIndexCount 1721 } cprimod_dbm_rule_pos_index_t; 1722 1723 #ifdef CPRIMOD_DIAG 1724 extern enum_mapping_t cprimod_dbm_rule_pos_index_t_mapping[]; 1725 #endif /*CPRIMOD_DIAG*/ 1726 1727 /* cprimod_dbm_rule_pos_index_t validation */ 1728 int cprimod_dbm_rule_pos_index_t_validate(cprimod_dbm_rule_pos_index_t cprimod_dbm_rule_pos_index); 1729 1730 /*! 1731 * @enum cprimod_dbm_rule_pos_grp_size_e 1732 * @brief DBM Rule Group Size . 1733 */ 1734 typedef enum cprimod_dbm_rule_pos_grp_size_e { 1735 cprimodDbmRulePosGrpSize10, 1736 cprimodDbmRulePosGrpSize20, 1737 cprimodDbmRulePosGrpSize40, 1738 cprimodDbmRulePosGrpSize80, 1739 cprimodDbmRulePosGrpSizeCount 1740 } cprimod_dbm_rule_pos_grp_size_t; 1741 1742 #ifdef CPRIMOD_DIAG 1743 extern enum_mapping_t cprimod_dbm_rule_pos_grp_size_t_mapping[]; 1744 #endif /*CPRIMOD_DIAG*/ 1745 1746 /* cprimod_dbm_rule_pos_grp_size_t validation */ 1747 int cprimod_dbm_rule_pos_grp_size_t_validate(cprimod_dbm_rule_pos_grp_size_t cprimod_dbm_rule_pos_grp_size); 1748 1749 /*! 1750 * @struct cprimod_dbm_rule_entry_s 1751 * @brief DBM Rule Entry . 1752 */ 1753 typedef struct cprimod_dbm_rule_entry_s { 1754 uint8 bm1_mult; /**< Bitmap1 multiple. */ 1755 uint32 bm1[3]; /**< Bitmap1. */ 1756 uint8 bm1_size; /**< Bitmap1 size. */ 1757 uint32 bm2[2]; /**< Bitmap2. */ 1758 uint8 bm2_size; /**< Bitmap2 size. */ 1759 uint8 num_slots; /**< Num of Slots. */ 1760 cprimod_dbm_rule_pos_index_t pos_grp_index; /**< Index to start location of Position Table. */ 1761 cprimod_dbm_rule_pos_grp_size_t pos_grp_size; /**< Position Group Size. */ 1762 } cprimod_dbm_rule_entry_t; 1763 1764 /* cprimod_dbm_rule_entry_t initialization and validation */ 1765 int cprimod_dbm_rule_entry_t_validate(const cprimod_dbm_rule_entry_t* cprimod_dbm_rule_entry); 1766 int cprimod_dbm_rule_entry_t_init(cprimod_dbm_rule_entry_t* cprimod_dbm_rule_entry); 1767 1768 /*! 1769 * cprimod_dual_bitmap_rule_entry_set 1770 * 1771 * @brief Dual Bitmap Rule Entry Set/Get. 1772 * 1773 * @param [in] unit - unit id 1774 * @param [in] port - logical port 1775 * @param [in] dbm_rule_num - Dual Bitmap Rule Number. 1776 * @param [in] dbm_rule - Dual Bitmap Rule Entry. 1777 */ 1778 int cprimod_dual_bitmap_rule_entry_set(int unit, int port, uint8 dbm_rule_num, const cprimod_dbm_rule_entry_t* dbm_rule); 1779 /*! 1780 * cprimod_dual_bitmap_rule_entry_get 1781 * 1782 * @brief Dual Bitmap Rule Entry Set/Get. 1783 * 1784 * @param [in] unit - unit id 1785 * @param [in] port - logical port 1786 * @param [in] dbm_rule_num - Dual Bitmap Rule Number. 1787 * @param [out] dbm_rule - Dual Bitmap Rule Entry. 1788 */ 1789 int cprimod_dual_bitmap_rule_entry_get(int unit, int port, uint8 dbm_rule_num, cprimod_dbm_rule_entry_t* dbm_rule); 1790 1791 1792 /*! 1793 * @struct cprimod_secondary_dbm_rule_entry_s 1794 * @brief Secondary DBM Rule Entry . 1795 */ 1796 typedef struct cprimod_secondary_dbm_rule_entry_s { 1797 uint8 bm1_mult; /**< Bitmap1 multiple. */ 1798 uint8 bm1; /**< Bitmap1. */ 1799 uint8 bm1_size; /**< Bitmap1 size. */ 1800 uint8 bm2; /**< Bitmap2. */ 1801 uint8 bm2_size; /**< Bitmap2 size. */ 1802 uint8 num_slots; /**< Num of Slots. */ 1803 } cprimod_secondary_dbm_rule_entry_t; 1804 1805 /* cprimod_secondary_dbm_rule_entry_t initialization and validation */ 1806 int cprimod_secondary_dbm_rule_entry_t_validate(const cprimod_secondary_dbm_rule_entry_t* cprimod_secondary_dbm_rule_entry); 1807 int cprimod_secondary_dbm_rule_entry_t_init(cprimod_secondary_dbm_rule_entry_t* cprimod_secondary_dbm_rule_entry); 1808 1809 /*! 1810 * cprimod_secondary_dual_bitmap_rule_entry_set 1811 * 1812 * @brief Dual Bitmap Rule Entry Set/Get. 1813 * 1814 * @param [in] unit - unit id 1815 * @param [in] port - logical port 1816 * @param [in] dbm_rule_num - Secondary Dual Bit Map Rule Num. 1817 * @param [in] dbm_rule - Secondary Dual Bitmap Rule Entry. 1818 */ 1819 int cprimod_secondary_dual_bitmap_rule_entry_set(int unit, int port, uint8 dbm_rule_num, const cprimod_secondary_dbm_rule_entry_t* dbm_rule); 1820 /*! 1821 * cprimod_secondary_dual_bitmap_rule_entry_get 1822 * 1823 * @brief Dual Bitmap Rule Entry Set/Get. 1824 * 1825 * @param [in] unit - unit id 1826 * @param [in] port - logical port 1827 * @param [in] dbm_rule_num - Secondary Dual Bit Map Rule Num. 1828 * @param [out] dbm_rule - Secondary Dual Bitmap Rule Entry. 1829 */ 1830 int cprimod_secondary_dual_bitmap_rule_entry_get(int unit, int port, uint8 dbm_rule_num, cprimod_secondary_dbm_rule_entry_t* dbm_rule); 1831 1832 1833 /*! 1834 * @struct cprimod_dbm_pos_table_entry_s 1835 * @brief DBM Position Table Entry. 1836 */ 1837 typedef struct cprimod_dbm_pos_table_entry_s { 1838 uint8 valid; /**< Valid. */ 1839 uint8 flow_id; /**< Flow Id. */ 1840 cprimod_flow_type_t flow_type; /**< Flow Type Data or Ctrl. */ 1841 uint8 index; /**< X slot position , 0 to (Num_slot-1). */ 1842 } cprimod_dbm_pos_table_entry_t; 1843 1844 /* cprimod_dbm_pos_table_entry_t initialization and validation */ 1845 int cprimod_dbm_pos_table_entry_t_validate(const cprimod_dbm_pos_table_entry_t* cprimod_dbm_pos_table_entry); 1846 int cprimod_dbm_pos_table_entry_t_init(cprimod_dbm_pos_table_entry_t* cprimod_dbm_pos_table_entry); 1847 1848 /*! 1849 * cprimod_dbm_position_entry_set 1850 * 1851 * @brief Dual Bitmap Position Table Entry Set/Get. 1852 * 1853 * @param [in] unit - unit id 1854 * @param [in] port - logical port 1855 * @param [in] index - Index to Position Table Entry. 1856 * @param [in] pos_entry - DBM Position Table Entry. 1857 */ 1858 int cprimod_dbm_position_entry_set(int unit, int port, uint8 index, const cprimod_dbm_pos_table_entry_t* pos_entry); 1859 /*! 1860 * cprimod_dbm_position_entry_get 1861 * 1862 * @brief Dual Bitmap Position Table Entry Set/Get. 1863 * 1864 * @param [in] unit - unit id 1865 * @param [in] port - logical port 1866 * @param [in] index - Index to Position Table Entry. 1867 * @param [out] pos_entry - DBM Position Table Entry. 1868 */ 1869 int cprimod_dbm_position_entry_get(int unit, int port, uint8 index, cprimod_dbm_pos_table_entry_t* pos_entry); 1870 1871 1872 /*! 1873 * @enum cprimod_cpri_pcs_mode_e 1874 * @brief CPRI PCS mode 8b10b or 64/66b . 1875 */ 1876 typedef enum cprimod_cpri_pcs_mode_e { 1877 cprimodCpriPcsMode8b10b, 1878 cprimodCpriPcsMode64b66b, 1879 cprimodCpriPcsModeCount 1880 } cprimod_cpri_pcs_mode_t; 1881 1882 #ifdef CPRIMOD_DIAG 1883 extern enum_mapping_t cprimod_cpri_pcs_mode_t_mapping[]; 1884 #endif /*CPRIMOD_DIAG*/ 1885 1886 /* cprimod_cpri_pcs_mode_t validation */ 1887 int cprimod_cpri_pcs_mode_t_validate(cprimod_cpri_pcs_mode_t cprimod_cpri_pcs_mode); 1888 1889 /*! 1890 * @enum cprimod_port_speed_e 1891 * @brief CPRI speeds . 1892 */ 1893 typedef enum cprimod_port_speed_e { 1894 cprimodSpd614p4, 1895 cprimodSpd1228p8, 1896 cprimodSpd2457p6, 1897 cprimodSpd3072p0, 1898 cprimodSpd4915p2, 1899 cprimodSpd6144p0, 1900 cprimodSpd8110p08, 1901 cprimodSpd9830p4, 1902 cprimodSpd10137p6, 1903 cprimodSpd12165p12, 1904 cprimodSpd24330p24, 1905 cprimodSpdCount 1906 } cprimod_port_speed_t; 1907 1908 #ifdef CPRIMOD_DIAG 1909 extern enum_mapping_t cprimod_port_speed_t_mapping[]; 1910 #endif /*CPRIMOD_DIAG*/ 1911 1912 /* cprimod_port_speed_t validation */ 1913 int cprimod_port_speed_t_validate(cprimod_port_speed_t cprimod_port_speed); 1914 1915 /*! 1916 * @enum cprimod_supported_port_speed_e 1917 * @brief Supported CPRI speeds . 1918 */ 1919 typedef enum cprimod_supported_port_speed_e { 1920 cprimodSupportedSpd1228p8, 1921 cprimodSupportedSpd2457p6, 1922 cprimodSupportedSpd3072p0, 1923 cprimodSupportedSpd4915p2, 1924 cprimodSupportedSpd6144p0, 1925 cprimodSupportedSpd9830p4, 1926 cprimodSupportedSpd10137p6, 1927 cprimodSupportedSpd12165p12, 1928 cprimodSupportedSpd24330p24, 1929 cprimodSupportedSpdCount 1930 } cprimod_supported_port_speed_t; 1931 1932 #ifdef CPRIMOD_DIAG 1933 extern enum_mapping_t cprimod_supported_port_speed_t_mapping[]; 1934 #endif /*CPRIMOD_DIAG*/ 1935 1936 /* cprimod_supported_port_speed_t validation */ 1937 int cprimod_supported_port_speed_t_validate(cprimod_supported_port_speed_t cprimod_supported_port_speed); 1938 1939 /*! 1940 * @enum cprimod_pll_num_in_use_e 1941 * @brief Which PLL are in use 1942 */ 1943 typedef enum cprimod_pll_num_in_use_e { 1944 cprimodInUseDefault = 0, /**< Default */ 1945 cprimodInUsePll0 = 1, /**< Pll 0 is used */ 1946 cprimodInUsePll1 = 2, /**< Pll 1 is used */ 1947 cprimodInUsePll0_1 = 3, /**< Pll 0 and Pll 1 is used */ 1948 cprimodInUseCount 1949 } cprimod_pll_num_in_use_t; 1950 1951 #ifdef CPRIMOD_DIAG 1952 extern enum_mapping_t cprimod_pll_num_in_use_t_mapping[]; 1953 #endif /*CPRIMOD_DIAG*/ 1954 1955 /* cprimod_pll_num_in_use_t validation */ 1956 int cprimod_pll_num_in_use_t_validate(cprimod_pll_num_in_use_t cprimod_pll_num_in_use); 1957 1958 /*! 1959 * @enum cprimod_port_interface_type_e 1960 * @brief Port type CPRI/RSVD4 . 1961 */ 1962 typedef enum cprimod_port_interface_type_e { 1963 cprimodCpri, 1964 cprimodRsvd4, 1965 cprimodCount 1966 } cprimod_port_interface_type_t; 1967 1968 #ifdef CPRIMOD_DIAG 1969 extern enum_mapping_t cprimod_port_interface_type_t_mapping[]; 1970 #endif /*CPRIMOD_DIAG*/ 1971 1972 /* cprimod_port_interface_type_t validation */ 1973 int cprimod_port_interface_type_t_validate(cprimod_port_interface_type_t cprimod_port_interface_type); 1974 1975 /*! 1976 * @struct cprimod_port_interface_config_s 1977 * @brief Port speed and interface. 1978 */ 1979 typedef struct cprimod_port_interface_config_s { 1980 cprimod_port_speed_t speed; /**< Speed. */ 1981 cprimod_port_interface_type_t interface; /**< Cpri or other. */ 1982 } cprimod_port_interface_config_t; 1983 1984 /* cprimod_port_interface_config_t initialization and validation */ 1985 int cprimod_port_interface_config_t_validate(const cprimod_port_interface_config_t* cprimod_port_interface_config); 1986 int cprimod_port_interface_config_t_init(cprimod_port_interface_config_t* cprimod_port_interface_config); 1987 1988 1989 /*! 1990 * @enum cprimod_port_rsvd4_speed_mult_e 1991 * @brief Obsi speed . 1992 */ 1993 typedef enum cprimod_port_rsvd4_speed_mult_e { 1994 cprimodRsvd4SpdMult4X = 4, 1995 cprimodRsvd4SpdMult8X = 8, 1996 cprimodRsvd4SpdMultCount 1997 } cprimod_port_rsvd4_speed_mult_t; 1998 1999 #ifdef CPRIMOD_DIAG 2000 extern enum_mapping_t cprimod_port_rsvd4_speed_mult_t_mapping[]; 2001 #endif /*CPRIMOD_DIAG*/ 2002 2003 /* cprimod_port_rsvd4_speed_mult_t validation */ 2004 int cprimod_port_rsvd4_speed_mult_t_validate(cprimod_port_rsvd4_speed_mult_t cprimod_port_rsvd4_speed_mult); 2005 2006 /*! 2007 * @struct cprimod_port_rsvd4_config_s 2008 * @brief Port speed and interface. 2009 */ 2010 typedef struct cprimod_port_rsvd4_config_s { 2011 cprimod_port_rsvd4_speed_mult_t speed; /**< Speed Mult. */ 2012 cprimod_port_interface_type_t interface; /**< Cpri or other. */ 2013 } cprimod_port_rsvd4_config_t; 2014 2015 /* cprimod_port_rsvd4_config_t initialization and validation */ 2016 int cprimod_port_rsvd4_config_t_validate(const cprimod_port_rsvd4_config_t* cprimod_port_rsvd4_config); 2017 int cprimod_port_rsvd4_config_t_init(cprimod_port_rsvd4_config_t* cprimod_port_rsvd4_config); 2018 2019 /*! 2020 * cprimod_port_rx_interface_config_set 2021 * 2022 * @brief Speed and interface Set/Get. 2023 * 2024 * @param [in] unit - unit id 2025 * @param [in] port - logical port 2026 * @param [in] phy - phy access for PMD 2027 * @param [in] config - Speed and type. 2028 */ 2029 int cprimod_port_rx_interface_config_set(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_interface_config_t* config); 2030 /*! 2031 * cprimod_port_rx_interface_config_get 2032 * 2033 * @brief Speed and interface Set/Get. 2034 * 2035 * @param [in] unit - unit id 2036 * @param [in] port - logical port 2037 * @param [out] config - Speed and type. 2038 */ 2039 int cprimod_port_rx_interface_config_get(int unit, int port, cprimod_port_interface_config_t* config); 2040 2041 /*! 2042 * cprimod_port_tx_interface_config_set 2043 * 2044 * @brief Speed and interface Set/Get. 2045 * 2046 * @param [in] unit - unit id 2047 * @param [in] port - logical port 2048 * @param [in] phy - phy access for PMD 2049 * @param [in] config - Speed and type. 2050 */ 2051 int cprimod_port_tx_interface_config_set(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_interface_config_t* config); 2052 /*! 2053 * cprimod_port_tx_interface_config_get 2054 * 2055 * @brief Speed and interface Set/Get. 2056 * 2057 * @param [in] unit - unit id 2058 * @param [in] port - logical port 2059 * @param [out] config - Speed and type. 2060 */ 2061 int cprimod_port_tx_interface_config_get(int unit, int port, cprimod_port_interface_config_t* config); 2062 2063 /*! 2064 * cprimod_port_rsvd4_rx_config_set 2065 * 2066 * @brief Speed and interface Set/Get. 2067 * 2068 * @param [in] unit - unit id 2069 * @param [in] port - logical port 2070 * @param [in] config - Speed and type. 2071 */ 2072 int cprimod_port_rsvd4_rx_config_set(int unit, int port, const cprimod_port_rsvd4_config_t* config); 2073 /*! 2074 * cprimod_port_rsvd4_rx_config_get 2075 * 2076 * @brief Speed and interface Set/Get. 2077 * 2078 * @param [in] unit - unit id 2079 * @param [in] port - logical port 2080 * @param [out] config - Speed and type. 2081 */ 2082 int cprimod_port_rsvd4_rx_config_get(int unit, int port, cprimod_port_rsvd4_config_t* config); 2083 2084 /*! 2085 * cprimod_port_rsvd4_tx_config_set 2086 * 2087 * @brief Speed and interface Set/Get. 2088 * 2089 * @param [in] unit - unit id 2090 * @param [in] port - logical port 2091 * @param [in] config - Speed and type. 2092 */ 2093 int cprimod_port_rsvd4_tx_config_set(int unit, int port, const cprimod_port_rsvd4_config_t* config); 2094 /*! 2095 * cprimod_port_rsvd4_tx_config_get 2096 * 2097 * @brief Speed and interface Set/Get. 2098 * 2099 * @param [in] unit - unit id 2100 * @param [in] port - logical port 2101 * @param [out] config - Speed and type. 2102 */ 2103 int cprimod_port_rsvd4_tx_config_get(int unit, int port, cprimod_port_rsvd4_config_t* config); 2104 2105 2106 /*! 2107 * @enum cprimod_rsvd4_rx_config_field_e 2108 * @brief Rsvd4 Rx PCS config . 2109 */ 2110 typedef enum cprimod_rsvd4_rx_config_field_e { 2111 cprimodRsvd4RxConfigDescrambleEnable, 2112 cprimodRsvd4RxConfigSyncThreshold, 2113 cprimodRsvd4RxConfigUnsyncThreshold, 2114 cprimodRsvd4RxConfigFrameSyncThreshold, 2115 cprimodRsvd4RxConfigFrameUnsyncThreshold, 2116 cprimodRsvd4RxConfigBlockSize, 2117 cprimodRsvd4RxConfigFwdIdlesToFramer, 2118 cprimodRsvd4RxConfigCount 2119 } cprimod_rsvd4_rx_config_field_t; 2120 2121 #ifdef CPRIMOD_DIAG 2122 extern enum_mapping_t cprimod_rsvd4_rx_config_field_t_mapping[]; 2123 #endif /*CPRIMOD_DIAG*/ 2124 2125 /* cprimod_rsvd4_rx_config_field_t validation */ 2126 int cprimod_rsvd4_rx_config_field_t_validate(cprimod_rsvd4_rx_config_field_t cprimod_rsvd4_rx_config_field); 2127 2128 /*! 2129 * @enum cprimod_rx_config_field_e 2130 * @brief CPRI Rx PCS config . 2131 */ 2132 typedef enum cprimod_rx_config_field_e { 2133 cprimodRxConfig8b10bAllowSeedChange, 2134 cprimodRxConfig8b10bDescrHw, 2135 cprimodRxConfig8b10bDescrEn, 2136 cprimodRxConfiglinkAcqSwMode, 2137 cprimodRxConfig64b66bLosOption, 2138 cprimodRxConfig8b10bForceCommaAlignEn, 2139 cprimodRxConfig64b66bBerWindowLimit, 2140 cprimodRxConfig64b66bBerLimit, 2141 cprimodRxConfigtestMode, 2142 cprimodRxConfig64b66bInvalidShCnt, 2143 cprimodRxConfig64b66bValidShCnt, 2144 cprimodRxConfigCount 2145 } cprimod_rx_config_field_t; 2146 2147 #ifdef CPRIMOD_DIAG 2148 extern enum_mapping_t cprimod_rx_config_field_t_mapping[]; 2149 #endif /*CPRIMOD_DIAG*/ 2150 2151 /* cprimod_rx_config_field_t validation */ 2152 int cprimod_rx_config_field_t_validate(cprimod_rx_config_field_t cprimod_rx_config_field); 2153 2154 /*! 2155 * @enum cprimod_rsvd4_rx_fsm_state_e 2156 * @brief Rsvd4 Rx Pcs state . 2157 */ 2158 typedef enum cprimod_rsvd4_rx_fsm_state_e { 2159 cprimodRsvd4RxFsmStateUnsync, 2160 cprimodRsvd4RxFsmStateWaitForSeed, 2161 cprimodRsvd4RxFsmStateWaitForAck, 2162 cprimodRsvd4RxFsmStateWaitForK28p7Idles, 2163 cprimodRsvd4RxFsmStateWaitForFrameSync, 2164 cprimodRsvd4RxFsmStateFrameSync, 2165 cprimodRsvd4RxFsmStateCount 2166 } cprimod_rsvd4_rx_fsm_state_t; 2167 2168 #ifdef CPRIMOD_DIAG 2169 extern enum_mapping_t cprimod_rsvd4_rx_fsm_state_t_mapping[]; 2170 #endif /*CPRIMOD_DIAG*/ 2171 2172 /* cprimod_rsvd4_rx_fsm_state_t validation */ 2173 int cprimod_rsvd4_rx_fsm_state_t_validate(cprimod_rsvd4_rx_fsm_state_t cprimod_rsvd4_rx_fsm_state); 2174 2175 /*! 2176 * @enum cprimod_rsvd4_rx_overide_e 2177 * @brief Rsvd4 Rx overide HW . 2178 */ 2179 typedef enum cprimod_rsvd4_rx_overide_e { 2180 cprimodRsvd4RxOverideFrameUnsyncTInvldMgRecvd, 2181 cprimodRsvd4RxOverideFrameSyncTVldMgRecvd, 2182 cprimodRsvd4RxOverideKMgIdlesRecvd, 2183 cprimodRsvd4RxOverideIdleReqRecvd, 2184 cprimodRsvd4RxOverideIdleAckRecvd, 2185 cprimodRsvd4RxOverideSeedCapAndVerifyDone, 2186 cprimodRsvd4RxOverideCount 2187 } cprimod_rsvd4_rx_overide_t; 2188 2189 #ifdef CPRIMOD_DIAG 2190 extern enum_mapping_t cprimod_rsvd4_rx_overide_t_mapping[]; 2191 #endif /*CPRIMOD_DIAG*/ 2192 2193 /* cprimod_rsvd4_rx_overide_t validation */ 2194 int cprimod_rsvd4_rx_overide_t_validate(cprimod_rsvd4_rx_overide_t cprimod_rsvd4_rx_overide); 2195 2196 /*! 2197 * @enum cprimod_rsvd4_tx_config_field_e 2198 * @brief Rsvd4 Tx PCS config . 2199 */ 2200 typedef enum cprimod_rsvd4_tx_config_field_e { 2201 cprimodRsvd4TxConfigForceOffState, 2202 cprimodRsvd4TxConfigAckT, 2203 cprimodRsvd4TxConfigForceIdleAck, 2204 cprimodRsvd4TxConfigLosEnable, 2205 cprimodRsvd4TxConfigScrambleEnable, 2206 cprimodRsvd4TxConfigScramblerSeed, 2207 cprimodRsvd4TxConfigTransmitterEnable, 2208 cprimodRsvd4TxConfigCount 2209 } cprimod_rsvd4_tx_config_field_t; 2210 2211 #ifdef CPRIMOD_DIAG 2212 extern enum_mapping_t cprimod_rsvd4_tx_config_field_t_mapping[]; 2213 #endif /*CPRIMOD_DIAG*/ 2214 2215 /* cprimod_rsvd4_tx_config_field_t validation */ 2216 int cprimod_rsvd4_tx_config_field_t_validate(cprimod_rsvd4_tx_config_field_t cprimod_rsvd4_tx_config_field); 2217 2218 /*! 2219 * @enum cprimod_tx_config_field_e 2220 * @brief CPRI Tx PCS config . 2221 */ 2222 typedef enum cprimod_tx_config_field_e { 2223 cprimodTxConfigagnosticMode, 2224 cprimodTxConfigtxpmdDisableOverrideVal, 2225 cprimodTxConfigtxpmdDisableOverrideEn, 2226 cprimodTxConfigseed8B10B, 2227 cprimodTxConfigscrambleBypass, 2228 cprimodTxConfigseed8b10b, 2229 cprimodTxConfigcwaScrEn8b10b, 2230 cprimodTxConfigCount 2231 } cprimod_tx_config_field_t; 2232 2233 #ifdef CPRIMOD_DIAG 2234 extern enum_mapping_t cprimod_tx_config_field_t_mapping[]; 2235 #endif /*CPRIMOD_DIAG*/ 2236 2237 /* cprimod_tx_config_field_t validation */ 2238 int cprimod_tx_config_field_t_validate(cprimod_tx_config_field_t cprimod_tx_config_field); 2239 2240 /*! 2241 * @enum cprimod_rsvd4_tx_fsm_state_e 2242 * @brief Rsvd4 Tx Pcs state . 2243 */ 2244 typedef enum cprimod_rsvd4_tx_fsm_state_e { 2245 cprimodRsvd4TxFsmStateOff, 2246 cprimodRsvd4TxFsmStateIdle, 2247 cprimodRsvd4TxFsmStateIdleReq, 2248 cprimodRsvd4TxFsmStateIdleAck, 2249 cprimodRsvd4TxFsmStateFrameTx, 2250 cprimodRsvd4TxFsmStateCount 2251 } cprimod_rsvd4_tx_fsm_state_t; 2252 2253 #ifdef CPRIMOD_DIAG 2254 extern enum_mapping_t cprimod_rsvd4_tx_fsm_state_t_mapping[]; 2255 #endif /*CPRIMOD_DIAG*/ 2256 2257 /* cprimod_rsvd4_tx_fsm_state_t validation */ 2258 int cprimod_rsvd4_tx_fsm_state_t_validate(cprimod_rsvd4_tx_fsm_state_t cprimod_rsvd4_tx_fsm_state); 2259 2260 /*! 2261 * @enum cprimod_rsvd4_tx_overide_e 2262 * @brief Rsvd4 Tx overide HW . 2263 */ 2264 typedef enum cprimod_rsvd4_tx_overide_e { 2265 cprimodRsvd4TxOverideStartTx, 2266 cprimodRsvd4TxOverideRxPcsAckCap, 2267 cprimodRsvd4TxOverideRxPcsIdleReq, 2268 cprimodRsvd4TxOverideRxPcsScrLock, 2269 cprimodRsvd4TxOverideLosStauts, 2270 cprimodRsvd4TxOverideCount 2271 } cprimod_rsvd4_tx_overide_t; 2272 2273 #ifdef CPRIMOD_DIAG 2274 extern enum_mapping_t cprimod_rsvd4_tx_overide_t_mapping[]; 2275 #endif /*CPRIMOD_DIAG*/ 2276 2277 /* cprimod_rsvd4_tx_overide_t validation */ 2278 int cprimod_rsvd4_tx_overide_t_validate(cprimod_rsvd4_tx_overide_t cprimod_rsvd4_tx_overide); 2279 2280 /*! 2281 * @enum cprimod_rx_pcs_status_e 2282 * @brief Rx PCS status. 2283 */ 2284 typedef enum cprimod_rx_pcs_status_e { 2285 cprimodRxPcsStatusLinkStatusLive, 2286 cprimodRxPcsStatusSeedLocked, 2287 cprimodRxPcsStatusSeedVector, 2288 cprimodRxPcsStatusLosLive, 2289 cprimodRxPcsStatus64b66bHiBerLive, 2290 cprimodRxPcsStatus64b66bBlockLockLive, 2291 cprimodRxPcsStatusCount 2292 } cprimod_rx_pcs_status_t; 2293 2294 #ifdef CPRIMOD_DIAG 2295 extern enum_mapping_t cprimod_rx_pcs_status_t_mapping[]; 2296 #endif /*CPRIMOD_DIAG*/ 2297 2298 /* cprimod_rx_pcs_status_t validation */ 2299 int cprimod_rx_pcs_status_t_validate(cprimod_rx_pcs_status_t cprimod_rx_pcs_status); 2300 /*! 2301 * cprimod_port_rx_frame_optional_config_set 2302 * 2303 * @brief Rx optional config Set/Get. 2304 * 2305 * @param [in] unit - unit id 2306 * @param [in] port - logical port 2307 * @param [in] field - Optionbal config. 2308 * @param [in] value - CPRI PCS config. 2309 */ 2310 int cprimod_port_rx_frame_optional_config_set(int unit, int port, cprimod_rx_config_field_t field, int value); 2311 /*! 2312 * cprimod_port_rx_frame_optional_config_get 2313 * 2314 * @brief Rx optional config Set/Get. 2315 * 2316 * @param [in] unit - unit id 2317 * @param [in] port - logical port 2318 * @param [in] field - Optionbal config. 2319 * @param [out] value - CPRI PCS config. 2320 */ 2321 int cprimod_port_rx_frame_optional_config_get(int unit, int port, cprimod_rx_config_field_t field, int* value); 2322 2323 /*! 2324 * cprimod_port_tx_frame_optional_config_set 2325 * 2326 * @brief Rx optional config Set/Get. 2327 * 2328 * @param [in] unit - unit id 2329 * @param [in] port - logical port 2330 * @param [in] field - Optionbal config. 2331 * @param [in] value - CPRI PCS config. 2332 */ 2333 int cprimod_port_tx_frame_optional_config_set(int unit, int port, cprimod_tx_config_field_t field, uint32 value); 2334 /*! 2335 * cprimod_port_tx_frame_optional_config_get 2336 * 2337 * @brief Rx optional config Set/Get. 2338 * 2339 * @param [in] unit - unit id 2340 * @param [in] port - logical port 2341 * @param [in] field - Optionbal config. 2342 * @param [out] value - CPRI PCS config. 2343 */ 2344 int cprimod_port_tx_frame_optional_config_get(int unit, int port, cprimod_tx_config_field_t field, uint32* value); 2345 2346 /*! 2347 * cprimod_port_rsvd4_rx_frame_optional_config_set 2348 * 2349 * @brief Rx optional config Set/Get. 2350 * 2351 * @param [in] unit - unit id 2352 * @param [in] port - logical port 2353 * @param [in] field - Optionbal config. 2354 * @param [in] value - RSVD4 PCS config. 2355 */ 2356 int cprimod_port_rsvd4_rx_frame_optional_config_set(int unit, int port, cprimod_rsvd4_rx_config_field_t field, int value); 2357 /*! 2358 * cprimod_port_rsvd4_rx_frame_optional_config_get 2359 * 2360 * @brief Rx optional config Set/Get. 2361 * 2362 * @param [in] unit - unit id 2363 * @param [in] port - logical port 2364 * @param [in] field - Optionbal config. 2365 * @param [out] value - RSVD4 PCS config. 2366 */ 2367 int cprimod_port_rsvd4_rx_frame_optional_config_get(int unit, int port, cprimod_rsvd4_rx_config_field_t field, int* value); 2368 2369 /*! 2370 * cprimod_port_rsvd4_rx_speed_set 2371 * 2372 * @brief Rx optional config Set/Get. 2373 * 2374 * @param [in] unit - unit id 2375 * @param [in] port - logical port 2376 * @param [in] phy - phy access for PMD 2377 * @param [in] speed - RSVD4 PCS config. 2378 */ 2379 int cprimod_port_rsvd4_rx_speed_set(int unit, int port, const phymod_phy_access_t* phy, cprimod_port_rsvd4_speed_mult_t speed); 2380 /*! 2381 * cprimod_port_rsvd4_rx_speed_get 2382 * 2383 * @brief Rx optional config Set/Get. 2384 * 2385 * @param [in] unit - unit id 2386 * @param [in] port - logical port 2387 * @param [out] speed - RSVD4 PCS config. 2388 */ 2389 int cprimod_port_rsvd4_rx_speed_get(int unit, int port, cprimod_port_rsvd4_speed_mult_t* speed); 2390 2391 /*! 2392 * cprimod_port_rsvd4_tx_speed_set 2393 * 2394 * @brief Rx optional config Set/Get. 2395 * 2396 * @param [in] unit - unit id 2397 * @param [in] port - logical port 2398 * @param [in] phy - phy access for PMD 2399 * @param [in] speed - RSVD4 PCS config. 2400 */ 2401 int cprimod_port_rsvd4_tx_speed_set(int unit, int port, const phymod_phy_access_t* phy, cprimod_port_rsvd4_speed_mult_t speed); 2402 /*! 2403 * cprimod_port_rsvd4_tx_speed_get 2404 * 2405 * @brief Rx optional config Set/Get. 2406 * 2407 * @param [in] unit - unit id 2408 * @param [in] port - logical port 2409 * @param [out] speed - RSVD4 PCS config. 2410 */ 2411 int cprimod_port_rsvd4_tx_speed_get(int unit, int port, cprimod_port_rsvd4_speed_mult_t* speed); 2412 2413 /*! 2414 * cprimod_port_rsvd4_rx_fsm_state_set 2415 * 2416 * @brief Speed and interface Set. 2417 * 2418 * @param [in] unit - unit id 2419 * @param [in] port - logical port 2420 * @param [in] state - Optionbal config. 2421 */ 2422 int cprimod_port_rsvd4_rx_fsm_state_set(int unit, int port, cprimod_rsvd4_rx_fsm_state_t state); 2423 /*! 2424 * cprimod_port_rsvd4_rx_fsm_state_get 2425 * 2426 * @brief Speed and interface Set. 2427 * 2428 * @param [in] unit - unit id 2429 * @param [in] port - logical port 2430 * @param [out] state - Optionbal config. 2431 */ 2432 int cprimod_port_rsvd4_rx_fsm_state_get(int unit, int port, cprimod_rsvd4_rx_fsm_state_t* state); 2433 2434 /*! 2435 * cprimod_port_rsvd4_rx_overide_set 2436 * 2437 * @brief Speed and interface Set/Get. 2438 * 2439 * @param [in] unit - unit id 2440 * @param [in] port - logical port 2441 * @param [in] parameter - overide param. 2442 * @param [in] enable - overide enable. 2443 * @param [in] value - overide value. 2444 */ 2445 int cprimod_port_rsvd4_rx_overide_set(int unit, int port, cprimod_rsvd4_rx_overide_t parameter, int enable, int value); 2446 /*! 2447 * cprimod_port_rsvd4_rx_overide_get 2448 * 2449 * @brief Speed and interface Set/Get. 2450 * 2451 * @param [in] unit - unit id 2452 * @param [in] port - logical port 2453 * @param [in] parameter - overide param. 2454 * @param [out] enable - overide enable. 2455 * @param [out] value - overide value. 2456 */ 2457 int cprimod_port_rsvd4_rx_overide_get(int unit, int port, cprimod_rsvd4_rx_overide_t parameter, int* enable, int* value); 2458 2459 /*! 2460 * cprimod_port_rsvd4_tx_frame_optional_config_set 2461 * 2462 * @brief tx optional config Set/Get. 2463 * 2464 * @param [in] unit - unit id 2465 * @param [in] port - logical port 2466 * @param [in] field - Optionbal config. 2467 * @param [in] value - RSVD4 PCS config. 2468 */ 2469 int cprimod_port_rsvd4_tx_frame_optional_config_set(int unit, int port, cprimod_rsvd4_tx_config_field_t field, int value); 2470 /*! 2471 * cprimod_port_rsvd4_tx_frame_optional_config_get 2472 * 2473 * @brief tx optional config Set/Get. 2474 * 2475 * @param [in] unit - unit id 2476 * @param [in] port - logical port 2477 * @param [in] field - Optionbal config. 2478 * @param [out] value - RSVD4 PCS config. 2479 */ 2480 int cprimod_port_rsvd4_tx_frame_optional_config_get(int unit, int port, cprimod_rsvd4_tx_config_field_t field, int* value); 2481 2482 /*! 2483 * cprimod_port_rsvd4_tx_fsm_state_set 2484 * 2485 * @brief Speed and interface Set. 2486 * 2487 * @param [in] unit - unit id 2488 * @param [in] port - logical port 2489 * @param [in] state - Optionbal config. 2490 */ 2491 int cprimod_port_rsvd4_tx_fsm_state_set(int unit, int port, cprimod_rsvd4_tx_fsm_state_t state); 2492 /*! 2493 * cprimod_port_rsvd4_tx_fsm_state_get 2494 * 2495 * @brief Speed and interface Set. 2496 * 2497 * @param [in] unit - unit id 2498 * @param [in] port - logical port 2499 * @param [out] state - Optionbal config. 2500 */ 2501 int cprimod_port_rsvd4_tx_fsm_state_get(int unit, int port, cprimod_rsvd4_tx_fsm_state_t* state); 2502 2503 /*! 2504 * cprimod_port_rsvd4_tx_overide_set 2505 * 2506 * @brief Speed and interface Set/Get. 2507 * 2508 * @param [in] unit - unit id 2509 * @param [in] port - logical port 2510 * @param [in] parameter - overide param. 2511 * @param [in] enable - overide enable. 2512 * @param [in] value - overide value. 2513 */ 2514 int cprimod_port_rsvd4_tx_overide_set(int unit, int port, cprimod_rsvd4_tx_overide_t parameter, int enable, int value); 2515 /*! 2516 * cprimod_port_rsvd4_tx_overide_get 2517 * 2518 * @brief Speed and interface Set/Get. 2519 * 2520 * @param [in] unit - unit id 2521 * @param [in] port - logical port 2522 * @param [in] parameter - overide param. 2523 * @param [out] enable - overide enable. 2524 * @param [out] value - overide value. 2525 */ 2526 int cprimod_port_rsvd4_tx_overide_get(int unit, int port, cprimod_rsvd4_tx_overide_t parameter, int* enable, int* value); 2527 2528 /*! 2529 * cprimod_port_rx_pcs_status_get 2530 * 2531 * @brief Speed and interface Set. 2532 * 2533 * @param [in] unit - unit id 2534 * @param [in] port - logical port 2535 * @param [in] status - Optionbal config. 2536 * @param [out] value - Rx PCS status. 2537 */ 2538 int cprimod_port_rx_pcs_status_get(int unit, int port, cprimod_rx_pcs_status_t status, uint32* value); 2539 2540 2541 /*! 2542 * @struct cprimod_polarity_s 2543 * @brief Polarity bitmaps. The bitmap refers to number of lanes in access structure. 2544 For example if the structure contains 2 lanes (at any position), two first bits of these bitmaps are relevant. 2545 */ 2546 typedef struct cprimod_polarity_s { 2547 uint32_t rx_polarity; /**< TX polarity bitmap */ 2548 uint32_t tx_polarity; /**< RX polarity bitmap */ 2549 } cprimod_polarity_t; 2550 2551 /* cprimod_polarity_t initialization and validation */ 2552 int cprimod_polarity_t_validate(const cprimod_polarity_t* cprimod_polarity); 2553 int cprimod_polarity_t_init(cprimod_polarity_t* cprimod_polarity); 2554 2555 2556 /*! 2557 * @struct cprimod_lane_map_s 2558 * @brief Core information 2559 */ 2560 typedef struct cprimod_lane_map_s { 2561 uint32_t num_of_lanes; /**< Number of elements in lane_map_rx/tx arrays */ 2562 uint32_t lane_map_rx[CPRIMOD_MAX_LANES_PER_CORE]; /**< lane_map_rx[x]=y means that rx lane x is mapped to rx lane y */ 2563 uint32_t lane_map_tx[CPRIMOD_MAX_LANES_PER_CORE]; /**< lane_map_tx[x]=y means that tx lane x is mapped to tx lane y */ 2564 } cprimod_lane_map_t; 2565 2566 /* cprimod_lane_map_t initialization and validation */ 2567 int cprimod_lane_map_t_validate(const cprimod_lane_map_t* cprimod_lane_map); 2568 int cprimod_lane_map_t_init(cprimod_lane_map_t* cprimod_lane_map); 2569 2570 2571 /*! 2572 * @struct cprimod_firmware_core_config_s 2573 * @brief Firmware core config 2574 */ 2575 typedef struct cprimod_firmware_core_config_s { 2576 uint32_t CoreConfigFromPCS; 2577 uint32_t VcoRate; /**< vco rate */ 2578 uint32_t disable_write_pll_iqp; /**< When 1 ucode will not update pll_iqp */ 2579 } cprimod_firmware_core_config_t; 2580 2581 /* cprimod_firmware_core_config_t initialization and validation */ 2582 int cprimod_firmware_core_config_t_validate(const cprimod_firmware_core_config_t* cprimod_firmware_core_config); 2583 int cprimod_firmware_core_config_t_init(cprimod_firmware_core_config_t* cprimod_firmware_core_config); 2584 2585 /*! 2586 * cprimod_firmware_loader_f 2587 * 2588 * @brief function definition for firmware loading 2589 * 2590 * @param [in] core - core access 2591 * @param [in] length - Firmware length 2592 * @param [in] data - Frimware data 2593 */ 2594 typedef int (*cprimod_firmware_loader_f)(const phymod_core_access_t* core, uint32_t length, const uint8_t* data); 2595 2596 2597 /*! 2598 * @enum cprimod_firmware_load_force_e 2599 * @brief Firmware load force 2600 */ 2601 typedef enum cprimod_firmware_load_force_e { 2602 cprimodFirmwareLoadSkip = 0, /**< Skip load FW */ 2603 cprimodFirmwareLoadForce, /**< Force load FW */ 2604 cprimodFirmwareLoadAuto, /**< Auto load FW in case of firmware change */ 2605 cprimodFirmwareLoadCount 2606 } cprimod_firmware_load_force_t; 2607 2608 #ifdef CPRIMOD_DIAG 2609 extern enum_mapping_t cprimod_firmware_load_force_t_mapping[]; 2610 #endif /*CPRIMOD_DIAG*/ 2611 2612 /* cprimod_firmware_load_force_t validation */ 2613 int cprimod_firmware_load_force_t_validate(cprimod_firmware_load_force_t cprimod_firmware_load_force); 2614 2615 /*! 2616 * @enum cprimod_firmware_load_method_e 2617 * @brief Firmware load method 2618 */ 2619 typedef enum cprimod_firmware_load_method_e { 2620 cprimodFirmwareLoadMethodNone = 0, /**< Don't load FW */ 2621 cprimodFirmwareLoadMethodInternal, /**< Load FW internaly */ 2622 cprimodFirmwareLoadMethodExternal, /**< Load FW by a given function */ 2623 cprimodFirmwareLoadMethodProgEEPROM, /**< Program EEPROM */ 2624 cprimodFirmwareLoadMethodCount 2625 } cprimod_firmware_load_method_t; 2626 2627 #ifdef CPRIMOD_DIAG 2628 extern enum_mapping_t cprimod_firmware_load_method_t_mapping[]; 2629 #endif /*CPRIMOD_DIAG*/ 2630 2631 /* cprimod_firmware_load_method_t validation */ 2632 int cprimod_firmware_load_method_t_validate(cprimod_firmware_load_method_t cprimod_firmware_load_method); 2633 /*! 2634 * @brief Core init flags 2635 */ 2636 #define CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD 0x1 /**< Run init sequence until FW load stage (without loading FW) */ 2637 #define CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD 0x2 /**< Run init sequence from FW loading stage (without loading FW) */ 2638 #define CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY 0x4 /**< Verify FW loaded correctly */ 2639 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS1 0x8 /**< core init state pass1 */ 2640 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS2 0x10 /**< core init state pass2 */ 2641 #define CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK 0x20 /**< by pass crc check */ 2642 #define CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD 0x40 /**< force the FW download */ 2643 #define CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD 0x80 /**< Perform the firmware load */ 2644 #define CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD 0x100 /**< Reset Core for F/W Load */ 2645 #define CPRIMOD_CORE_INIT_F_FW_LOAD_END 0x200 /**< Firmware load end */ 2646 #define CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD 0x400 /**< force the FW download */ 2647 2648 #define CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD) 2649 #define CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD) 2650 #define CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY) 2651 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS1_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_EXECUTE_PASS1) 2652 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS2_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_EXECUTE_PASS2) 2653 #define CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK) 2654 #define CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD) 2655 #define CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD) 2656 #define CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD) 2657 #define CPRIMOD_CORE_INIT_F_FW_LOAD_END_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_FW_LOAD_END) 2658 #define CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD_SET(conf) ((conf)->flags |= CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD) 2659 2660 #define CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD) 2661 #define CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD) 2662 #define CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY) 2663 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS1_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_EXECUTE_PASS1) 2664 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS2_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_EXECUTE_PASS2) 2665 #define CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK) 2666 #define CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD) 2667 #define CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD) 2668 #define CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD) 2669 #define CPRIMOD_CORE_INIT_F_FW_LOAD_END_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_FW_LOAD_END) 2670 #define CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD_CLR(conf) ((conf)->flags &= ~CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD) 2671 2672 #define CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_UNTIL_FW_LOAD ? 1 : 0) 2673 #define CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_RESUME_AFTER_FW_LOAD ? 1 : 0) 2674 #define CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_FIRMWARE_LOAD_VERIFY ? 1 : 0) 2675 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS1_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_EXECUTE_PASS1 ? 1 : 0) 2676 #define CPRIMOD_CORE_INIT_F_EXECUTE_PASS2_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_EXECUTE_PASS2 ? 1 : 0) 2677 #define CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_BYPASS_CRC_CHECK ? 1 : 0) 2678 #define CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_FW_FORCE_DOWNLOAD ? 1 : 0) 2679 #define CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_EXECUTE_FW_LOAD ? 1 : 0) 2680 #define CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_RESET_CORE_FOR_FW_LOAD ? 1 : 0) 2681 #define CPRIMOD_CORE_INIT_F_FW_LOAD_END_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_FW_LOAD_END ? 1 : 0) 2682 #define CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD_GET(conf) ((conf)->flags & CPRIMOD_CORE_INIT_F_FW_AUTO_DOWNLOAD ? 1 : 0) 2683 2684 2685 /*! 2686 * @enum cprimod_tx_input_voltage_e 2687 * @brief Tx input voltage 2688 */ 2689 typedef enum cprimod_tx_input_voltage_e { 2690 cprimodTxInputVoltageDefault = 0, /**< Default */ 2691 cprimodTxInputVoltage1p00, /**< Tx input voltage as 1.00v */ 2692 cprimodTxInputVoltage1p25, /**< Tx input voltage as 1.25v */ 2693 cprimodTxInputVoltageCount 2694 } cprimod_tx_input_voltage_t; 2695 2696 #ifdef CPRIMOD_DIAG 2697 extern enum_mapping_t cprimod_tx_input_voltage_t_mapping[]; 2698 #endif /*CPRIMOD_DIAG*/ 2699 2700 /* cprimod_tx_input_voltage_t validation */ 2701 int cprimod_tx_input_voltage_t_validate(cprimod_tx_input_voltage_t cprimod_tx_input_voltage); 2702 2703 /*! 2704 * @struct cprimod_afe_pll_s 2705 * @brief AFE/PLL related parameter 2706 */ 2707 typedef struct cprimod_afe_pll_s { 2708 uint32_t afe_pll_change_default; /**< If 1 change AFE/PLL reg */ 2709 uint32_t ams_pll_iqp; 2710 uint32_t ams_pll_en_hrz; 2711 } cprimod_afe_pll_t; 2712 2713 /* cprimod_afe_pll_t initialization and validation */ 2714 int cprimod_afe_pll_t_validate(const cprimod_afe_pll_t* cprimod_afe_pll); 2715 int cprimod_afe_pll_t_init(cprimod_afe_pll_t* cprimod_afe_pll); 2716 2717 2718 /*! 2719 * @struct cprimod_pll_parm_s 2720 * @brief AFE/PLL related parameter 2721 */ 2722 typedef struct cprimod_pll_parm_s { 2723 uint32_t change_pll; 2724 uint32_t vcoRate; 2725 int div2; 2726 int div4; 2727 cprimod_afe_pll_t afe_pll; /**< PMD config for PLL */ 2728 } cprimod_pll_parm_t; 2729 2730 /* cprimod_pll_parm_t initialization and validation */ 2731 int cprimod_pll_parm_t_validate(const cprimod_pll_parm_t* cprimod_pll_parm); 2732 int cprimod_pll_parm_t_init(cprimod_pll_parm_t* cprimod_pll_parm); 2733 2734 typedef struct cprimod_core_init_config_s { 2735 cprimod_lane_map_t lane_map; 2736 cprimod_firmware_load_method_t firmware_load_method; 2737 cprimod_firmware_loader_f firmware_loader; 2738 cprimod_firmware_core_config_t firmware_core_config; 2739 uint32_t flags; /**< init flags */ 2740 cprimod_tx_input_voltage_t tx_input_voltage; /**< Tx input voltage */ 2741 cprimod_pll_parm_t pll0; /**< AFE/PLL register value */ 2742 cprimod_pll_parm_t pll1; /**< AFE/PLL register value */ 2743 uint8_t trcvr_host_managed; 2744 } cprimod_core_init_config_t; 2745 2746 /* cprimod_core_init_config_t initialization and validation */ 2747 int cprimod_core_init_config_t_validate(const cprimod_core_init_config_t* cprimod_core_init_config); 2748 int cprimod_core_init_config_t_init(cprimod_core_init_config_t* cprimod_core_init_config); 2749 2750 typedef struct cprimod_core_status_s { 2751 uint32_t pmd_active; 2752 } cprimod_core_status_t; 2753 2754 /* cprimod_core_status_t initialization and validation */ 2755 int cprimod_core_status_t_validate(const cprimod_core_status_t* cprimod_core_status); 2756 int cprimod_core_status_t_init(cprimod_core_status_t* cprimod_core_status); 2757 2758 /*! 2759 * cprimod_core_init 2760 * 2761 * @brief Core Initialization 2762 * 2763 * @param [in] unit - unit id 2764 * @param [in] port - logical port 2765 * @param [in] phy - phy access for PMD 2766 * @param [in] init_config - 2767 * @param [out] core_status - 2768 */ 2769 int cprimod_core_init(int unit, int port, const phymod_core_access_t* phy, const phymod_core_init_config_t* init_config, phymod_core_status_t* core_status); 2770 2771 2772 /*! 2773 * @struct cprimod_port_init_config_s 2774 * @brief port config information. 2775 */ 2776 typedef struct cprimod_port_init_config_s { 2777 int polarity_rx; 2778 int polarity_tx; 2779 cprimod_port_interface_type_t interface; 2780 cprimod_port_speed_t tx_cpri_speed; 2781 cprimod_port_speed_t rx_cpri_speed; 2782 cprimod_port_rsvd4_speed_mult_t tx_rsvd4_speed; 2783 cprimod_port_rsvd4_speed_mult_t rx_rsvd4_speed; 2784 int roe_stuffing_bit; /**< 1bit value for Stuffing bit */ 2785 int roe_reserved_bit; /**< 1bit value for Reserved bit */ 2786 uint32 serdes_scrambler_seed; /**< scramblar seed for CPRI and RSVD4 mode */ 2787 uint32 serdes_scrambler_enable; /**< 1bit value for scramblar enable for CPRI and RSVD4 mode */ 2788 int mix_cpri_enet; /**< 1bit value for if the core has both cpri and Enet */ 2789 int vco_for_lane; /**< vco_mode value for the lane */ 2790 cprimod_pll_num_in_use_t pll_in_use; /**< In dual pll all the pll in use */ 2791 phymod_tx_t tx_params[PHYMOD_MAX_LANES_PER_PORT]; /**< tx params from config */ 2792 int tx_params_user_config; /**< tx params from config variable */ 2793 int parity_enable; /**< parity enable */ 2794 } cprimod_port_init_config_t; 2795 2796 /* cprimod_port_init_config_t initialization and validation */ 2797 int cprimod_port_init_config_t_validate(const cprimod_port_init_config_t* cprimod_port_init_config); 2798 int cprimod_port_init_config_t_init(cprimod_port_init_config_t* cprimod_port_init_config); 2799 2800 /*! 2801 * cprimod_port_init 2802 * 2803 * @brief Core Initialization 2804 * 2805 * @param [in] unit - unit id 2806 * @param [in] port - logical port 2807 * @param [in] phy - phy access for PMD 2808 * @param [in] port_config - 2809 */ 2810 int cprimod_port_init(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_init_config_t* port_config); 2811 2812 /*! 2813 * cprimod_rsvd4_rx_master_frame_sync_config_set 2814 * 2815 * @brief Set/Get Rx Master Frame Synchronizaiton 2816 * 2817 * @param [in] unit - unit id 2818 * @param [in] port - logical port 2819 * @param [in] master_frame_number - Master Frame Number when start countng. 2820 * @param [in] master_frame_start_time - Maser Frame Time to start count. 2821 */ 2822 int cprimod_rsvd4_rx_master_frame_sync_config_set(int unit, int port, uint32 master_frame_number, uint64 master_frame_start_time); 2823 /*! 2824 * cprimod_rsvd4_rx_master_frame_sync_config_get 2825 * 2826 * @brief Set/Get Rx Master Frame Synchronizaiton 2827 * 2828 * @param [in] unit - unit id 2829 * @param [in] port - logical port 2830 * @param [out] master_frame_number - Master Frame Number when start countng. 2831 * @param [out] master_frame_start_time - Master Frame Time to start count. 2832 */ 2833 int cprimod_rsvd4_rx_master_frame_sync_config_get(int unit, int port, uint32* master_frame_number, uint64* master_frame_start_time); 2834 2835 /*! 2836 * cprimod_cpri_rx_control_word_sync_info_get 2837 * 2838 * @brief Get CPRI Frame Sync information from control. 2839 * 2840 * @param [in] unit - unit id 2841 * @param [in] port - logical port 2842 * @param [out] hyper_frame_num - Hyper Frame Number Z.64.0. 2843 * @param [out] radio_frame_num - Radio Frame Number Z.192.0 Z.128.0. 2844 */ 2845 int cprimod_cpri_rx_control_word_sync_info_get(int unit, int port, uint32* hyper_frame_num, uint32* radio_frame_num); 2846 2847 typedef _shr_cpri_cw_l1_protocol_info_t cprimod_cpri_cw_l1_protocol_info_t; 2848 2849 /*! 2850 * cprimod_cpri_rx_control_word_l1_signal_info_get 2851 * 2852 * @brief Get CPRI Control Word L1 Signal Information. 2853 * 2854 * @param [in] unit - unit id 2855 * @param [in] port - logical port 2856 * @param [out] l1_info - CPRI Control Word L1 Signal info. 2857 */ 2858 int cprimod_cpri_rx_control_word_l1_signal_info_get(int unit, int port, cprimod_cpri_cw_l1_protocol_info_t* l1_info); 2859 2860 /*! 2861 * @brief L1 Signal Map 2862 */ 2863 #define CPRIMOD_L1_SIGNAL_LOF 0x1 /**< Loss of Frame */ 2864 #define CPRIMOD_L1_SIGNAL_LOS 0x2 /**< Loss of Signal */ 2865 #define CPRIMOD_L1_SIGNAL_SDI 0x4 /**< SAP Defect Indication */ 2866 #define CPRIMOD_L1_SIGNAL_RAI 0x8 /**< Remote Alarm Indication */ 2867 #define CPRIMOD_L1_SIGNAL_RESET 0x10 /**< Reset Reqeust/Acknowledge */ 2868 #define CPRIMOD_L1_SIGNAL_ETH_PTR 0x20 /**< Fast Ethernet Pointer */ 2869 #define CPRIMOD_L1_SIGNAL_HDLC_RATE 0x40 /**< HDLC rate */ 2870 #define CPRIMOD_L1_SIGNAL_PROT_VER 0x80 /**< Protection Version */ 2871 2872 #define CPRIMOD_L1_SIGNAL_LOF_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_LOF) 2873 #define CPRIMOD_L1_SIGNAL_LOS_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_LOS) 2874 #define CPRIMOD_L1_SIGNAL_SDI_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_SDI) 2875 #define CPRIMOD_L1_SIGNAL_RAI_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_RAI) 2876 #define CPRIMOD_L1_SIGNAL_RESET_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_RESET) 2877 #define CPRIMOD_L1_SIGNAL_ETH_PTR_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_ETH_PTR) 2878 #define CPRIMOD_L1_SIGNAL_HDLC_RATE_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_HDLC_RATE) 2879 #define CPRIMOD_L1_SIGNAL_PROT_VER_SET(flags) (flags |= CPRIMOD_L1_SIGNAL_PROT_VER) 2880 2881 #define CPRIMOD_L1_SIGNAL_LOF_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_LOF) 2882 #define CPRIMOD_L1_SIGNAL_LOS_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_LOS) 2883 #define CPRIMOD_L1_SIGNAL_SDI_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_SDI) 2884 #define CPRIMOD_L1_SIGNAL_RAI_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_RAI) 2885 #define CPRIMOD_L1_SIGNAL_RESET_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_RESET) 2886 #define CPRIMOD_L1_SIGNAL_ETH_PTR_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_ETH_PTR) 2887 #define CPRIMOD_L1_SIGNAL_HDLC_RATE_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_HDLC_RATE) 2888 #define CPRIMOD_L1_SIGNAL_PROT_VER_CLR(flags) (flags &= ~CPRIMOD_L1_SIGNAL_PROT_VER) 2889 2890 #define CPRIMOD_L1_SIGNAL_LOF_GET(flags) (flags & CPRIMOD_L1_SIGNAL_LOF ? 1 : 0) 2891 #define CPRIMOD_L1_SIGNAL_LOS_GET(flags) (flags & CPRIMOD_L1_SIGNAL_LOS ? 1 : 0) 2892 #define CPRIMOD_L1_SIGNAL_SDI_GET(flags) (flags & CPRIMOD_L1_SIGNAL_SDI ? 1 : 0) 2893 #define CPRIMOD_L1_SIGNAL_RAI_GET(flags) (flags & CPRIMOD_L1_SIGNAL_RAI ? 1 : 0) 2894 #define CPRIMOD_L1_SIGNAL_RESET_GET(flags) (flags & CPRIMOD_L1_SIGNAL_RESET ? 1 : 0) 2895 #define CPRIMOD_L1_SIGNAL_ETH_PTR_GET(flags) (flags & CPRIMOD_L1_SIGNAL_ETH_PTR ? 1 : 0) 2896 #define CPRIMOD_L1_SIGNAL_HDLC_RATE_GET(flags) (flags & CPRIMOD_L1_SIGNAL_HDLC_RATE ? 1 : 0) 2897 #define CPRIMOD_L1_SIGNAL_PROT_VER_GET(flags) (flags & CPRIMOD_L1_SIGNAL_PROT_VER ? 1 : 0) 2898 2899 /*! 2900 * cprimod_cpri_rx_control_word_l1_signal_signal_protection_set 2901 * 2902 * @brief Get/Set CPRI Control Word L1 Signal Protection Enable. 2903 * 2904 * @param [in] unit - unit id 2905 * @param [in] port - logical port 2906 * @param [in] signal_map - Signal Map Flags, User CPRIMOD_L1_SIGNAL_.... 2907 * @param [in] enable - Enable or Disable. 2908 */ 2909 int cprimod_cpri_rx_control_word_l1_signal_signal_protection_set(int unit, int port, uint32 signal_map, uint32 enable); 2910 /*! 2911 * cprimod_cpri_rx_control_word_l1_signal_signal_protection_get 2912 * 2913 * @brief Get/Set CPRI Control Word L1 Signal Protection Enable. 2914 * 2915 * @param [in] unit - unit id 2916 * @param [in] port - logical port 2917 * @param [in] signal_map - Signal Map Flags, User CPRIMOD_L1_SIGNAL_.... 2918 * @param [out] enable - Enable/Disable Map. 2919 */ 2920 int cprimod_cpri_rx_control_word_l1_signal_signal_protection_get(int unit, int port, uint32 signal_map, uint32* enable); 2921 2922 2923 /*! 2924 * @enum cprimod_hdlc_crc_byte_order_e 2925 * @brief HDLC CRC Byte Order. 2926 */ 2927 typedef enum cprimod_hdlc_crc_byte_order_e { 2928 cprimodHdlcCrcByteOrderNone = 0, /**< Default 15 .. 0 */ 2929 cprimodHdlcCrcByteOrderSwap = 1, /**< Byte Order Swap [7:0][15:8] */ 2930 cprimodHdlcCrcByteOrderCount 2931 } cprimod_hdlc_crc_byte_order_t; 2932 2933 #ifdef CPRIMOD_DIAG 2934 extern enum_mapping_t cprimod_hdlc_crc_byte_order_t_mapping[]; 2935 #endif /*CPRIMOD_DIAG*/ 2936 2937 /* cprimod_hdlc_crc_byte_order_t validation */ 2938 int cprimod_hdlc_crc_byte_order_t_validate(cprimod_hdlc_crc_byte_order_t cprimod_hdlc_crc_byte_order); 2939 2940 /*! 2941 * @enum cprimod_hdlc_fcs_err_check_e 2942 * @brief HDLC FCS Error Check or no check. 2943 */ 2944 typedef enum cprimod_hdlc_fcs_err_check_e { 2945 cprimodHdlcFcsErrCheck = 0, /**< Check for FCS Error */ 2946 cprimodHdlcFcsErrNoCheck = 1, /**< No FCS Error Check. Ignore FCS. */ 2947 cprimodHdlcFcsErrCount 2948 } cprimod_hdlc_fcs_err_check_t; 2949 2950 #ifdef CPRIMOD_DIAG 2951 extern enum_mapping_t cprimod_hdlc_fcs_err_check_t_mapping[]; 2952 #endif /*CPRIMOD_DIAG*/ 2953 2954 /* cprimod_hdlc_fcs_err_check_t validation */ 2955 int cprimod_hdlc_fcs_err_check_t_validate(cprimod_hdlc_fcs_err_check_t cprimod_hdlc_fcs_err_check); 2956 typedef _shr_cpri_hdlc_fcs_size_t cprimod_cpri_hdlc_fcs_size_t; 2957 2958 #define CPRIMOD_CPRI_HDLC_FCS_SIZE_8_BITS _shrCpriHdlcFcsSize8Bits 2959 #define CPRIMOD_CPRI_HDLC_FCS_SIZE_16_BITS _shrCpriHdlcFcsSize16Bits 2960 #define CPRIMOD_CPRI_HDLC_FCS_SIZE_32_BITS _shrCpriHdlcFcsSize32Bits 2961 2962 typedef _shr_cpri_hdlc_filling_flag_pattern_t cprimod_cpri_hdlc_filling_flag_pattern_t; 2963 2964 #define CPRIMOD_CPRI_HDLC_FILLING_FLAG_PATTERN_7E _shrCpriHdlcFillingFlagPattern7E 2965 #define CPRIMOD_CPRI_HDLC_FILLING_FLAG_PATTERN_7F _shrCpriHdlcFillingFlagPattern7F 2966 #define CPRIMOD_CPRI_HDLC_FILLING_FLAG_PATTERN_FF _shrCpriHdlcFillingFlagPatternFF 2967 2968 typedef _shr_cpri_hdlc_flag_size_t cprimod_cpri_hdlc_num_flag_bytes_t; 2969 2970 #define CPRIMOD_HDLC_FLAG_SIZE_1_BYTE _shrCpriHdlcNumFlagSizeOneByte 2971 #define CPRIMOD_HDLC_FLAG_SIZE_2_BYTE _shrCpriHdlcNumFlagSizeTwoByte 2972 2973 typedef _shr_cpri_hdlc_crc_mode_t cprimod_cpri_crc_mode_t; 2974 2975 #define CPRIMOD_CPRI_CRC_MODE_APPEND _shrCpriHdlcCrcAppend 2976 #define CPRIMOD_CPRI_CRC_MODE_REPLACE _shrCpriHdlcCrcReplace 2977 #define CPRIMOD_CPRI_CRC_MODE_NO_UPDATE _shrCpriHdlcCrcNoUpdate 2978 2979 typedef _shr_cpri_hdlc_crc_init_val_t cprimod_cpri_hdlc_crc_init_val_t; 2980 2981 #define CPRIMOD_CPRI_HDLC_CRC_INIT_VAL_ALL_0 _shrCpriHdlcCrcInitValAll0 2982 #define CPRIMOD_CPRI_HDLC_CRC_INIT_VAL_ALL_1 _shrCpriHdlcCrcInitValAll1 2983 2984 2985 /*! 2986 * @struct cprimod_slow_hdlc_config_info_s 2987 * @brief CPRI Slow HDLC configuration information. 2988 */ 2989 typedef struct cprimod_slow_hdlc_config_info_s { 2990 cprimod_cpri_crc_mode_t tx_crc_mode; /**< Tx CRC Mode. Append/Replace/NoUpdate. */ 2991 cprimod_cpri_hdlc_num_flag_bytes_t tx_flag_size; /**< Tx Num of Flag Bytes 1 or 2. */ 2992 cprimod_cpri_hdlc_filling_flag_pattern_t tx_filling_flag_pattern; /**< Tx Filling Flag Pattern. */ 2993 cprimod_cpri_hdlc_crc_init_val_t crc_init_val; /**< CRC init Value, all 0s or 1s. */ 2994 int use_fe_mac; /**< Use FE Mac instead of HDLC. */ 2995 int crc_byte_swap; /**< 0 - 15..0 1- [7:0][15:8] */ 2996 int no_fcs_err_check; /**< Turn off FCS error check. */ 2997 uint32 cw_sel; /**< control word subchannel Xs */ 2998 uint32 cw_size; /**< control word size */ 2999 cprimod_cpri_hdlc_fcs_size_t fcs_size; /**< 8,16 or 16 bits FCS. */ 3000 int runt_frame_drop; /**< Indicate frame smaller than 16 bits (runt) be dropped. */ 3001 int long_frame_drop; /**< Indicate frame longer than max frame size be dropped. */ 3002 uint32 min_frame_size; /**< Min HDLC Frame Size in Bits (including FCS). */ 3003 uint32 max_frame_size; /**< Max HDLC Frame Size in Bits (including FCS). */ 3004 uint32 queue_num; /**< Queue Number */ 3005 } cprimod_slow_hdlc_config_info_t; 3006 3007 /* cprimod_slow_hdlc_config_info_t initialization and validation */ 3008 int cprimod_slow_hdlc_config_info_t_validate(const cprimod_slow_hdlc_config_info_t* cprimod_slow_hdlc_config_info); 3009 int cprimod_slow_hdlc_config_info_t_init(cprimod_slow_hdlc_config_info_t* cprimod_slow_hdlc_config_info); 3010 3011 /*! 3012 * cprimod_cpri_port_cw_slow_hdlc_config_set 3013 * 3014 * @brief Get/Set CPRI HDLC control Configuration. 3015 * 3016 * @param [in] unit - unit id 3017 * @param [in] port - logical port 3018 * @param [in] config_info - Configuration info. 3019 */ 3020 int cprimod_cpri_port_cw_slow_hdlc_config_set(int unit, int port, const cprimod_slow_hdlc_config_info_t* config_info); 3021 /*! 3022 * cprimod_cpri_port_cw_slow_hdlc_config_get 3023 * 3024 * @brief Get/Set CPRI HDLC control Configuration. 3025 * 3026 * @param [in] unit - unit id 3027 * @param [in] port - logical port 3028 * @param [out] config_info - Configuration info. 3029 */ 3030 int cprimod_cpri_port_cw_slow_hdlc_config_get(int unit, int port, cprimod_slow_hdlc_config_info_t* config_info); 3031 3032 3033 /*! 3034 * @struct cprimod_fast_eth_config_info_s 3035 * @brief CPRI Fast ETH configuration information. 3036 */ 3037 typedef struct cprimod_fast_eth_config_info_s { 3038 cprimod_cpri_crc_mode_t tx_crc_mode; /**< Tx CRC Mode. Append/Replace/NoUpdate. */ 3039 uint32 schan_start; /**< sub channel start location */ 3040 uint32 schan_size; /**< sub channel size. */ 3041 uint32 cw_sel; /**< control word subchannel Xs */ 3042 uint32 cw_size; /**< control word size */ 3043 uint32 min_packet_size; /**< Min Packet Size in Bytes. */ 3044 uint32 max_packet_size; /**< Max Packet Size in Bytes. */ 3045 int min_packet_drop; /**< Indicate frame smaller than min_packet_size be dropped. */ 3046 int max_packet_drop; /**< Indicate frame larger than max packet size be dropped. */ 3047 int strip_crc; /**< CRC bytes are drop and not forwarded to encap. */ 3048 uint32 min_ipg; /**< Min IPG Size in Bytes. */ 3049 uint32 queue_num; /**< Queue Number */ 3050 int no_fcs_err_check; /**< Turn off FCS error check. */ 3051 } cprimod_fast_eth_config_info_t; 3052 3053 /* cprimod_fast_eth_config_info_t initialization and validation */ 3054 int cprimod_fast_eth_config_info_t_validate(const cprimod_fast_eth_config_info_t* cprimod_fast_eth_config_info); 3055 int cprimod_fast_eth_config_info_t_init(cprimod_fast_eth_config_info_t* cprimod_fast_eth_config_info); 3056 3057 /*! 3058 * cprimod_cpri_port_cw_fast_eth_config_set 3059 * 3060 * @brief Get/Set CPRI Fast Ethernet control Configuration. 3061 * 3062 * @param [in] unit - unit id 3063 * @param [in] port - logical port 3064 * @param [in] config_info - Configuration info. 3065 */ 3066 int cprimod_cpri_port_cw_fast_eth_config_set(int unit, int port, const cprimod_fast_eth_config_info_t* config_info); 3067 /*! 3068 * cprimod_cpri_port_cw_fast_eth_config_get 3069 * 3070 * @brief Get/Set CPRI Fast Ethernet control Configuration. 3071 * 3072 * @param [in] unit - unit id 3073 * @param [in] port - logical port 3074 * @param [out] config_info - Configuration info. 3075 */ 3076 int cprimod_cpri_port_cw_fast_eth_config_get(int unit, int port, cprimod_fast_eth_config_info_t* config_info); 3077 3078 typedef _shr_cpri_vsd_control_subchan_num_bytes_t cprimod_cpri_vsd_control_subchan_num_bytes_t; 3079 3080 #define CPRIMOD_CPRI_VSD_CONTROL_SUBCHAN_NUM_BYTES_1 _shrVsdCtrlSubchanNumBytes1 3081 #define CPRIMOD_CPRI_VSD_CONTROL_SUBCHAN_NUM_BYTES_2 _shrVsdCtrlSubchanNumBytes2 3082 #define CPRIMOD_CPRI_VSD_CONTROL_SUBCHAN_NUM_BYTES_4 _shrVsdCtrlSubchanNumBytes4 3083 3084 typedef _shr_cpri_vsd_control_subchan_size_t cprimod_cpri_vsd_control_subchan_size_t; 3085 3086 #define CPRIMOD_CPRI_VSD_CONTROL_SUBCHAN_SIZE_2 _shrVsdCtrlSubchanSize2 3087 #define CPRIMOD_CPRI_VSD_CONTROL_SUBCHAN_SIZE_4 _shrVsdCtrlSubchanSize4 3088 3089 typedef _shr_cpri_vsd_control_flow_num_bytes_t cprimod_cpri_vsd_control_flow_num_bytes_t; 3090 3091 #define CPRIMOD_CPRI_VSD_CONTROL_FLOW_NUM_BYTES_2 _shrVsdCtrlFlowNumBytes2 3092 #define CPRIMOD_CPRI_VSD_CONTROL_FLOW_NUM_BYTES_4 _shrVsdCtrlFlowNumBytes4 3093 3094 3095 /*! 3096 * @struct cprimod_cpri_rx_vsd_config_info_s 3097 * @brief CPRI VSD configuration information. 3098 */ 3099 typedef struct cprimod_cpri_rx_vsd_config_info_s { 3100 uint32 subchan_start; /**< sub channel start location */ 3101 cprimod_cpri_vsd_control_subchan_size_t subchan_size; /**< sub channel size. */ 3102 cprimod_cpri_vsd_control_subchan_num_bytes_t subchan_bytes; /**< Number of bytes */ 3103 uint32 subchan_steps; /**< control word steps */ 3104 cprimod_cpri_vsd_control_flow_num_bytes_t flow_bytes; /**< Number of Bytes per flow. */ 3105 uint32 queue_num; /**< Queue Number */ 3106 uint32 rsvd_sector_mask[4]; /**< Reserved Sector Mask up to 128 bits total. */ 3107 } cprimod_cpri_rx_vsd_config_info_t; 3108 3109 /* cprimod_cpri_rx_vsd_config_info_t initialization and validation */ 3110 int cprimod_cpri_rx_vsd_config_info_t_validate(const cprimod_cpri_rx_vsd_config_info_t* cprimod_cpri_rx_vsd_config_info); 3111 int cprimod_cpri_rx_vsd_config_info_t_init(cprimod_cpri_rx_vsd_config_info_t* cprimod_cpri_rx_vsd_config_info); 3112 3113 /*! 3114 * cprimod_cpri_port_rx_vsd_cw_config_set 3115 * 3116 * @brief Get/Set CPRI Rx VSD Control Configuration. 3117 * 3118 * @param [in] unit - unit id 3119 * @param [in] port - logical port 3120 * @param [in] config_info - Configuration info. 3121 */ 3122 int cprimod_cpri_port_rx_vsd_cw_config_set(int unit, int port, const cprimod_cpri_rx_vsd_config_info_t* config_info); 3123 /*! 3124 * cprimod_cpri_port_rx_vsd_cw_config_get 3125 * 3126 * @brief Get/Set CPRI Rx VSD Control Configuration. 3127 * 3128 * @param [in] unit - unit id 3129 * @param [in] port - logical port 3130 * @param [out] config_info - Configuration info. 3131 */ 3132 int cprimod_cpri_port_rx_vsd_cw_config_get(int unit, int port, cprimod_cpri_rx_vsd_config_info_t* config_info); 3133 3134 typedef _shr_cpri_rx_vsd_flow_info_t cprimod_cpri_rx_vsd_flow_info_t; 3135 3136 3137 /*! 3138 * @struct cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_s 3139 * @brief CPRI VSD Rx Flow configuration information. 3140 */ 3141 typedef struct cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_s { 3142 uint32 hyper_frame_number; /**< Hyper Frame Number */ 3143 uint32 hyper_frame_modulo; /**< Hyper Frame Modulo */ 3144 int filter_zero_data; /**< Filer all 0's Data. */ 3145 uint32 section_num[4]; /**< VSD Section in this group in Order 0-127. */ 3146 uint32 num_sector; /**< Number of Sectors. */ 3147 uint32 tag_id; /**< Tag Id */ 3148 } cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t; 3149 3150 /* cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t initialization and validation */ 3151 int cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t_validate(const cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t* cprimod_cpri_rx_vsd_ctrl_flow_config_xxx); 3152 int cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t_init(cprimod_cpri_rx_vsd_ctrl_flow_config_xxx_t* cprimod_cpri_rx_vsd_ctrl_flow_config_xxx); 3153 3154 /*! 3155 * cprimod_cpri_port_rx_vsd_ctrl_flow_add 3156 * 3157 * @brief Add CPRI Rx VSD Group Flow. 3158 * 3159 * @param [in] unit - unit id 3160 * @param [in] port - logical port 3161 * @param [in] group_id - group id 3162 * @param [in] config_info - Group Flow Configuration info. 3163 */ 3164 int cprimod_cpri_port_rx_vsd_ctrl_flow_add(int unit, int port, uint32 group_id, const cprimod_cpri_rx_vsd_flow_info_t* config_info); 3165 3166 /*! 3167 * cprimod_cpri_port_rx_vsd_ctrl_flow_delete 3168 * 3169 * @brief Delete CPRI Rx VSD Group Flow. 3170 * 3171 * @param [in] unit - unit id 3172 * @param [in] port - logical port 3173 * @param [in] group_id - group id 3174 */ 3175 int cprimod_cpri_port_rx_vsd_ctrl_flow_delete(int unit, int port, uint32 group_id); 3176 3177 /*! 3178 * cprimod_cpri_port_rx_vsd_ctrl_flow_get 3179 * 3180 * @brief Add CPRI Rx VSD Group Flow Configuration Get. 3181 * 3182 * @param [in] unit - unit id 3183 * @param [in] port - logical port 3184 * @param [in] group_id - group id 3185 * @param [out] config_info - Group Flow Configuration info. 3186 */ 3187 int cprimod_cpri_port_rx_vsd_ctrl_flow_get(int unit, int port, uint32 group_id, cprimod_cpri_rx_vsd_flow_info_t* config_info); 3188 3189 /*! 3190 * cprimod_encap_control_queue_tag_to_flow_id_map_set 3191 * 3192 * @brief Get/Set Encap Tag Id to Flow Id Map. 3193 * 3194 * @param [in] unit - unit id 3195 * @param [in] port - logical port 3196 * @param [in] tag_id - Tag Id for this flow. 3197 * @param [in] flow_id - Flow Id. 3198 */ 3199 int cprimod_encap_control_queue_tag_to_flow_id_map_set(int unit, int port, uint32 tag_id, uint32 flow_id); 3200 /*! 3201 * cprimod_encap_control_queue_tag_to_flow_id_map_get 3202 * 3203 * @brief Get/Set Encap Tag Id to Flow Id Map. 3204 * 3205 * @param [in] unit - unit id 3206 * @param [in] port - logical port 3207 * @param [in] tag_id - Tag Id for this flow. 3208 * @param [out] flow_id - Flow_Id. 3209 */ 3210 int cprimod_encap_control_queue_tag_to_flow_id_map_get(int unit, int port, uint32 tag_id, uint32* flow_id); 3211 3212 3213 /*! 3214 * @struct cprimod_cpri_tx_vsd_config_info_s 3215 * @brief CPRI Tx VSD configuration information. 3216 */ 3217 typedef struct cprimod_cpri_tx_vsd_config_info_s { 3218 uint32 subchan_start; /**< sub channel start location */ 3219 cprimod_cpri_vsd_control_subchan_size_t subchan_size; /**< sub channel size. */ 3220 cprimod_cpri_vsd_control_subchan_num_bytes_t subchan_bytes; /**< Number of bytes */ 3221 uint32 subchan_steps; /**< control word steps */ 3222 cprimod_cpri_vsd_control_flow_num_bytes_t flow_bytes; /**< Number of Bytes per flow. */ 3223 uint32 queue_num; /**< Queue Number */ 3224 uint32 rsvd_sector_mask[4]; /**< Reserved Sector Mask up to 128 bits total. */ 3225 int byte_order_swap; /**< Byte Order Swap. */ 3226 } cprimod_cpri_tx_vsd_config_info_t; 3227 3228 /* cprimod_cpri_tx_vsd_config_info_t initialization and validation */ 3229 int cprimod_cpri_tx_vsd_config_info_t_validate(const cprimod_cpri_tx_vsd_config_info_t* cprimod_cpri_tx_vsd_config_info); 3230 int cprimod_cpri_tx_vsd_config_info_t_init(cprimod_cpri_tx_vsd_config_info_t* cprimod_cpri_tx_vsd_config_info); 3231 3232 /*! 3233 * cprimod_cpri_port_tx_vsd_cw_config_set 3234 * 3235 * @brief Get/Set CPRI Tx VSD control Configuration. 3236 * 3237 * @param [in] unit - unit id 3238 * @param [in] port - logical port 3239 * @param [in] config_info - Configuration info. 3240 */ 3241 int cprimod_cpri_port_tx_vsd_cw_config_set(int unit, int port, const cprimod_cpri_tx_vsd_config_info_t* config_info); 3242 /*! 3243 * cprimod_cpri_port_tx_vsd_cw_config_get 3244 * 3245 * @brief Get/Set CPRI Tx VSD control Configuration. 3246 * 3247 * @param [in] unit - unit id 3248 * @param [in] port - logical port 3249 * @param [out] config_info - Configuration info. 3250 */ 3251 int cprimod_cpri_port_tx_vsd_cw_config_get(int unit, int port, cprimod_cpri_tx_vsd_config_info_t* config_info); 3252 3253 typedef _shr_cpri_tx_vsd_flow_info_t cprimod_cpri_tx_vsd_flow_info_t; 3254 3255 3256 /*! 3257 * @struct cprimod_cpri_tx_vsd_flow_config_info_s 3258 * @brief CPRI VSD Tx Flow configuration information. 3259 */ 3260 typedef struct cprimod_cpri_tx_vsd_flow_config_info_s { 3261 uint32 hyper_frame_number; /**< Hyper Frame Number */ 3262 uint32 hyper_frame_modulo; /**< Hyper Frame Number */ 3263 int repeat_mode; /**< Filer all 0's Data. */ 3264 uint32 section_num[4]; /**< VSD Sector in this group in Order. */ 3265 uint32 num_sector; /**< Number of Sectors. */ 3266 } cprimod_cpri_tx_vsd_flow_config_info_t; 3267 3268 /* cprimod_cpri_tx_vsd_flow_config_info_t initialization and validation */ 3269 int cprimod_cpri_tx_vsd_flow_config_info_t_validate(const cprimod_cpri_tx_vsd_flow_config_info_t* cprimod_cpri_tx_vsd_flow_config_info); 3270 int cprimod_cpri_tx_vsd_flow_config_info_t_init(cprimod_cpri_tx_vsd_flow_config_info_t* cprimod_cpri_tx_vsd_flow_config_info); 3271 3272 /*! 3273 * cprimod_cpri_port_tx_vsd_ctrl_flow_add 3274 * 3275 * @brief Add CPRI Tx VSD Group Flow Configuration. 3276 * 3277 * @param [in] unit - unit id 3278 * @param [in] port - logical port 3279 * @param [in] group_id - group id 3280 * @param [out] group_list - active group list 3281 * @param [in] config_info - Group Flow Configuration info. 3282 */ 3283 int cprimod_cpri_port_tx_vsd_ctrl_flow_add(int unit, int port, uint32 group_id, uint32* group_list, const cprimod_cpri_tx_vsd_flow_info_t* config_info); 3284 3285 /*! 3286 * cprimod_cpri_port_tx_vsd_ctrl_flow_delete 3287 * 3288 * @brief Delete CPRI Tx VSD Control Flow. 3289 * 3290 * @param [in] unit - unit id 3291 * @param [in] port - logical port 3292 * @param [in] group_id - group id 3293 * @param [out] group_list - active group list 3294 */ 3295 int cprimod_cpri_port_tx_vsd_ctrl_flow_delete(int unit, int port, uint32 group_id, uint32* group_list); 3296 3297 /*! 3298 * cprimod_cpri_port_tx_vsd_ctrl_flow_get 3299 * 3300 * @brief Get CPRI Tx VSD Group Flow Configuration. 3301 * 3302 * @param [in] unit - unit id 3303 * @param [in] port - logical port 3304 * @param [in] group_id - group id 3305 * @param [out] group_list - active group list 3306 * @param [out] config_info - Group Flow Configuration info. 3307 */ 3308 int cprimod_cpri_port_tx_vsd_ctrl_flow_get(int unit, int port, uint32 group_id, uint32* group_list, cprimod_cpri_tx_vsd_flow_info_t* config_info); 3309 3310 typedef _shr_cpri_cw_filter_mode_t cprimod_cpri_cw_filter_mode_t; 3311 3312 #define CPRIMOD_CPRI_CW_FILTER_DISABLE _shrCpriFilterDisable 3313 #define CPRIMOD_CPRI_CW_FILTER_NON_ZERO _shrCpriFilterNonZero 3314 #define CPRIMOD_CPRI_CW_FILTER_PERIODIC _shrCpriFilterPeriodic 3315 #define CPRIMOD_CPRI_CW_FILTER_CHANGE _shrCpriFilterChange 3316 #define CPRIMOD_CPRI_CW_FILTER_PATTERN_MATCH _shrCpriFilterPatternMatch 3317 3318 3319 /*! 3320 * @enum cprimod_cw_filter_mode_e 3321 * @brief VSD Raw Filter Modes. 3322 */ 3323 typedef enum cprimod_cw_filter_mode_e { 3324 cprimodCwFilterDisable = 0, /**< Disable Filter */ 3325 cprimodCwFilterNonZero = 1, /**< Non-Zero Data only */ 3326 cprimodCwFilterPeriodic = 2, /**< Periodic Generation */ 3327 cprimodCwFilterChange = 3, /**< Content Change Only */ 3328 cprimodCwFilterPatternMatch = 4, /**< Pattern Match */ 3329 cprimodCwFilterCount 3330 } cprimod_cw_filter_mode_t; 3331 3332 #ifdef CPRIMOD_DIAG 3333 extern enum_mapping_t cprimod_cw_filter_mode_t_mapping[]; 3334 #endif /*CPRIMOD_DIAG*/ 3335 3336 /* cprimod_cw_filter_mode_t validation */ 3337 int cprimod_cw_filter_mode_t_validate(cprimod_cw_filter_mode_t cprimod_cw_filter_mode); 3338 3339 /*! 3340 * @struct cprimod_cpri_rx_vsd_raw_config_s 3341 * @brief CPRI Rx VSD Raw Configuration Information. 3342 */ 3343 typedef struct cprimod_cpri_rx_vsd_raw_config_s { 3344 uint32 schan_start; /**< Sub Channel Start */ 3345 uint32 schan_size; /**< Sub Channel Size */ 3346 uint32 cw_sel; /**< Control Word Select Bit Map */ 3347 uint32 cw_size; /**< Control Word Size, number of bytes */ 3348 cprimod_cpri_cw_filter_mode_t filter_mode; /**< Filter Mode */ 3349 uint32 hyper_frame_index; /**< Hyper Frame Index */ 3350 uint32 hyper_frame_modulo; /**< Hyper Frame Modulo */ 3351 uint32 match_offset; /**< Match Offset */ 3352 uint32 match_value; /**< Match Value */ 3353 uint32 match_mask; /**< Match Mask */ 3354 uint32 queue_num; /**< Queue Number. */ 3355 } cprimod_cpri_rx_vsd_raw_config_t; 3356 3357 /* cprimod_cpri_rx_vsd_raw_config_t initialization and validation */ 3358 int cprimod_cpri_rx_vsd_raw_config_t_validate(const cprimod_cpri_rx_vsd_raw_config_t* cprimod_cpri_rx_vsd_raw_config); 3359 int cprimod_cpri_rx_vsd_raw_config_t_init(cprimod_cpri_rx_vsd_raw_config_t* cprimod_cpri_rx_vsd_raw_config); 3360 3361 /*! 3362 * cprimod_cpri_port_rx_vsd_raw_config_set 3363 * 3364 * @brief Get/Set VSD Raw Configuration. 3365 * 3366 * @param [in] unit - unit id 3367 * @param [in] port - logical port 3368 * @param [in] index - VSD Raw Group Index. 0-7 3369 * @param [in] config_info - VSD Raw Configuration info. 3370 */ 3371 int cprimod_cpri_port_rx_vsd_raw_config_set(int unit, int port, uint32 index, const cprimod_cpri_rx_vsd_raw_config_t* config_info); 3372 /*! 3373 * cprimod_cpri_port_rx_vsd_raw_config_get 3374 * 3375 * @brief Get/Set VSD Raw Configuration. 3376 * 3377 * @param [in] unit - unit id 3378 * @param [in] port - logical port 3379 * @param [in] index - VSD Raw Group Index. 0-7 3380 * @param [out] config_info - VSD Raw Configuration info. 3381 */ 3382 int cprimod_cpri_port_rx_vsd_raw_config_get(int unit, int port, uint32 index, cprimod_cpri_rx_vsd_raw_config_t* config_info); 3383 3384 typedef _shr_vsd_raw_map_mode_t cprimod_cpri_vsd_raw_map_mode_t; 3385 3386 #define CPRIMOD_CPRI_CW_MAP_MODE_PERIODIC _shrVsdRawMapModePeriodic 3387 #define CPRIMOD_CPRI_CW_MAP_MODE_ROE_FRAME _shrVsdRawMapModeRoeFrame 3388 3389 3390 /*! 3391 * @enum cprimod_vsd_raw_map_mode_e 3392 * @brief VSD Raw Map Modes. 3393 */ 3394 typedef enum cprimod_vsd_raw_map_mode_e { 3395 cprimodVsdRawMapModePeriodic = 0, /**< Peridic insert data using Modulo */ 3396 cprimodVsdRawMapModeRoeFrame = 1, /**< Use Frame Number from ROE frame. */ 3397 cprimodVsdRawMapModeCount 3398 } cprimod_vsd_raw_map_mode_t; 3399 3400 #ifdef CPRIMOD_DIAG 3401 extern enum_mapping_t cprimod_vsd_raw_map_mode_t_mapping[]; 3402 #endif /*CPRIMOD_DIAG*/ 3403 3404 /* cprimod_vsd_raw_map_mode_t validation */ 3405 int cprimod_vsd_raw_map_mode_t_validate(cprimod_vsd_raw_map_mode_t cprimod_vsd_raw_map_mode); 3406 3407 /*! 3408 * @struct cprimod_cpri_tx_vsd_raw_config_s 3409 * @brief CPRI Tx VSD Raw Configuration Information. 3410 */ 3411 typedef struct cprimod_cpri_tx_vsd_raw_config_s { 3412 uint32 schan_start; /**< Sub Channel Start */ 3413 uint32 schan_size; /**< Sub Channel Size */ 3414 uint32 cw_sel; /**< Control Word Select Bit Map */ 3415 uint32 cw_size; /**< Control Word Size, number of bytes */ 3416 uint32 hyper_frame_index; /**< Hyper Frame Index */ 3417 uint32 hyper_frame_modulo; /**< Hyper Frame Modulo */ 3418 uint32 queue_num; /**< Queue Number. */ 3419 cprimod_cpri_vsd_raw_map_mode_t map_mode; /**< Map Mode. */ 3420 int repeat_enable; /**< Repeat until new data.. */ 3421 int bfn0_filter_enable; /**< Enable Filter BFN0. */ 3422 int bfn1_filter_enable; /**< Enable Filter BFN1. */ 3423 uint32 idle_value; /**< Value to be insert when data is not available. */ 3424 } cprimod_cpri_tx_vsd_raw_config_t; 3425 3426 /* cprimod_cpri_tx_vsd_raw_config_t initialization and validation */ 3427 int cprimod_cpri_tx_vsd_raw_config_t_validate(const cprimod_cpri_tx_vsd_raw_config_t* cprimod_cpri_tx_vsd_raw_config); 3428 int cprimod_cpri_tx_vsd_raw_config_t_init(cprimod_cpri_tx_vsd_raw_config_t* cprimod_cpri_tx_vsd_raw_config); 3429 3430 /*! 3431 * cprimod_cpri_port_tx_vsd_raw_config_set 3432 * 3433 * @brief Get/Set Tx VSD Raw Configuration. 3434 * 3435 * @param [in] unit - unit id 3436 * @param [in] port - logical port 3437 * @param [in] index - VSD Raw Group Index. 0-7 3438 * @param [in] config_info - VSD Raw Configuration info. 3439 */ 3440 int cprimod_cpri_port_tx_vsd_raw_config_set(int unit, int port, uint32 index, const cprimod_cpri_tx_vsd_raw_config_t* config_info); 3441 /*! 3442 * cprimod_cpri_port_tx_vsd_raw_config_get 3443 * 3444 * @brief Get/Set Tx VSD Raw Configuration. 3445 * 3446 * @param [in] unit - unit id 3447 * @param [in] port - logical port 3448 * @param [in] index - VSD Raw Group Index. 0-7 3449 * @param [out] config_info - VSD Raw Configuration info. 3450 */ 3451 int cprimod_cpri_port_tx_vsd_raw_config_get(int unit, int port, uint32 index, cprimod_cpri_tx_vsd_raw_config_t* config_info); 3452 3453 /*! 3454 * cprimod_cpri_port_tx_vsd_raw_filter_set 3455 * 3456 * @brief VSD Raw Radio Frame Filter Set/Get. 3457 * 3458 * @param [in] unit - unit id 3459 * @param [in] port - logical port 3460 * @param [in] bfn0_value - BFN0 Radio Frame Number. 3461 * @param [in] bfn0_mask - BFN0 Radio Frame Mask. 3462 * @param [in] bfn1_value - BFN1 Radio Frame Number. 3463 * @param [in] bfn1_mask - BFN1 Radio Frame Mask. 3464 */ 3465 int cprimod_cpri_port_tx_vsd_raw_filter_set(int unit, int port, uint32 bfn0_value, uint32 bfn0_mask, uint32 bfn1_value, uint32 bfn1_mask); 3466 /*! 3467 * cprimod_cpri_port_tx_vsd_raw_filter_get 3468 * 3469 * @brief VSD Raw Radio Frame Filter Set/Get. 3470 * 3471 * @param [in] unit - unit id 3472 * @param [in] port - logical port 3473 * @param [out] bfn0_value - BFN0 Radio Frame Number. 3474 * @param [out] bfn0_mask - BFN0 Radio Frame Mask. 3475 * @param [out] bfn1_value - BFN1 Radio Frame Number. 3476 * @param [out] bfn1_mask - BFN1 Radio Frame Mask. 3477 */ 3478 int cprimod_cpri_port_tx_vsd_raw_filter_get(int unit, int port, uint32* bfn0_value, uint32* bfn0_mask, uint32* bfn1_value, uint32* bfn1_mask); 3479 3480 /*! 3481 * cprimod_cpri_port_rx_brcm_rsvd5_control_config_set 3482 * 3483 * @brief Get/Set Rx S D V M. 3484 * 3485 * @param [in] unit - unit id 3486 * @param [in] port - logical port 3487 * @param [in] schan_start - BRCM_RSVD5 sub channel start. 3488 * @param [in] schan_size - BRCM_RSVD5 sub channel size. 3489 * @param [in] queue_num - BRCM_RSVD5 Queue Number. 3490 * @param [in] parity_disable - BRCM_RSVD5 parity disable. 3491 */ 3492 int cprimod_cpri_port_rx_brcm_rsvd5_control_config_set(int unit, int port, uint32 schan_start, uint32 schan_size, uint32 queue_num, int parity_disable); 3493 /*! 3494 * cprimod_cpri_port_rx_brcm_rsvd5_control_config_get 3495 * 3496 * @brief Get/Set Rx S D V M. 3497 * 3498 * @param [in] unit - unit id 3499 * @param [in] port - logical port 3500 * @param [out] schan_start - BRCM_RSVD5 sub channel start. 3501 * @param [out] schan_size - BRCM_RSVD5 sub channel size. 3502 * @param [out] queue_num - BRCM_RSVD5 Queue Number. 3503 * @param [out] parity_disable - BRCM_RSVD5 parity disab;e. 3504 */ 3505 int cprimod_cpri_port_rx_brcm_rsvd5_control_config_get(int unit, int port, uint32* schan_start, uint32* schan_size, uint32* queue_num, int* parity_disable); 3506 3507 /*! 3508 * cprimod_cpri_port_tx_brcm_rsvd5_control_config_set 3509 * 3510 * @brief Get/Set TX S D V M. 3511 * 3512 * @param [in] unit - unit id 3513 * @param [in] port - logical port 3514 * @param [in] schan_start - BRCM_RSVD5 sub channel start. 3515 * @param [in] schan_size - BRCM_RSVD5 sub channel size. 3516 * @param [in] queue_num - BRCM_RSVD5 Queue Number. 3517 * @param [in] crc_enable - BRCM_RSVD5 parity disable. 3518 */ 3519 int cprimod_cpri_port_tx_brcm_rsvd5_control_config_set(int unit, int port, uint32 schan_start, uint32 schan_size, uint32 queue_num, int crc_enable); 3520 /*! 3521 * cprimod_cpri_port_tx_brcm_rsvd5_control_config_get 3522 * 3523 * @brief Get/Set TX S D V M. 3524 * 3525 * @param [in] unit - unit id 3526 * @param [in] port - logical port 3527 * @param [out] schan_start - BRCM_RSVD5 sub channel start. 3528 * @param [out] schan_size - BRCM_RSVD5 sub channel size. 3529 * @param [out] queue_num - BRCM_RSVD5 Queue Number. 3530 * @param [out] crc_enable - BRCM_RSVD5 parity disab;e. 3531 */ 3532 int cprimod_cpri_port_tx_brcm_rsvd5_control_config_get(int unit, int port, uint32* schan_start, uint32* schan_size, uint32* queue_num, int* crc_enable); 3533 3534 typedef _shr_cpri_gcw_mask_t cprimod_cpri_gcw_mask_t; 3535 3536 #define CPRIMOD_CPRI_GCW_MASK_NONE _shrCpriGcwMaskNone 3537 #define CPRIMOD_CPRI_GCW_MASK_LSB _shrCpriGcwMaskLSB 3538 #define CPRIMOD_CPRI_GCW_MASK_MSB _shrCpriGcwMaskMSB 3539 #define CPRIMOD_CPRI_GCW_MASK_BOTH _shrCpriGcwMaskBOTH 3540 3541 3542 /*! 3543 * @enum cprimod_gcw_mask_e 3544 * @brief GCW Mask. 3545 */ 3546 typedef enum cprimod_gcw_mask_e { 3547 cprimodGcwMaskNone = 0, /**< None of the Byte are extracted. */ 3548 cprimodGcwMaskLSB = 1, /**< LSB Byte is extracted. */ 3549 cprimodGcwMaskMSB = 2, /**< MSB Byte is extracted. */ 3550 cprimodGcwMaskBOTH = 3, /**< Both Byte are extracted. */ 3551 cprimodGcwMaskCount 3552 } cprimod_gcw_mask_t; 3553 3554 #ifdef CPRIMOD_DIAG 3555 extern enum_mapping_t cprimod_gcw_mask_t_mapping[]; 3556 #endif /*CPRIMOD_DIAG*/ 3557 3558 /* cprimod_gcw_mask_t validation */ 3559 int cprimod_gcw_mask_t_validate(cprimod_gcw_mask_t cprimod_gcw_mask); 3560 3561 /*! 3562 * @struct cprimod_cpri_rx_gcw_config_s 3563 * @brief CPRI Rx GCW Configuration Information. 3564 */ 3565 typedef struct cprimod_cpri_rx_gcw_config_s { 3566 uint32 Ns; /**< Sub Channel Number 0-63 */ 3567 uint32 Xs; /**< Sub Channel Word 0-3. */ 3568 uint32 Y; /**< Sub Channel First Byte Location . */ 3569 cprimod_cpri_gcw_mask_t mask; /**< Mask */ 3570 cprimod_cpri_cw_filter_mode_t filter_mode; /**< Filter Mode */ 3571 uint32 hyper_frame_index; /**< Hyper Frame Index */ 3572 uint32 hyper_frame_modulo; /**< Hyper Frame Modulo */ 3573 uint32 match_mask; /**< Match Mask */ 3574 uint32 match_value; /**< Match Value */ 3575 } cprimod_cpri_rx_gcw_config_t; 3576 3577 /* cprimod_cpri_rx_gcw_config_t initialization and validation */ 3578 int cprimod_cpri_rx_gcw_config_t_validate(const cprimod_cpri_rx_gcw_config_t* cprimod_cpri_rx_gcw_config); 3579 int cprimod_cpri_rx_gcw_config_t_init(cprimod_cpri_rx_gcw_config_t* cprimod_cpri_rx_gcw_config); 3580 3581 3582 /*! 3583 * @struct cprimod_cpri_tx_gcw_config_s 3584 * @brief CPRI Tx GCW Configuration Information. 3585 */ 3586 typedef struct cprimod_cpri_tx_gcw_config_s { 3587 uint32 Ns; /**< Sub Channel Number 0-63 */ 3588 uint32 Xs; /**< Sub Channel Word 0-3. */ 3589 uint32 Y; /**< Sub Channel First Byte Location . */ 3590 cprimod_cpri_gcw_mask_t mask; /**< Mask */ 3591 uint32 hyper_frame_index; /**< Hyper Frame Index */ 3592 uint32 hyper_frame_modulo; /**< Hyper Frame Modulo */ 3593 int repeat_enable; /**< Repeat until new data.. */ 3594 int bfn0_filter_enable; /**< Enable Filter BFN0. */ 3595 int bfn1_filter_enable; /**< Enable Filter BFN1. */ 3596 } cprimod_cpri_tx_gcw_config_t; 3597 3598 /* cprimod_cpri_tx_gcw_config_t initialization and validation */ 3599 int cprimod_cpri_tx_gcw_config_t_validate(const cprimod_cpri_tx_gcw_config_t* cprimod_cpri_tx_gcw_config); 3600 int cprimod_cpri_tx_gcw_config_t_init(cprimod_cpri_tx_gcw_config_t* cprimod_cpri_tx_gcw_config); 3601 3602 /*! 3603 * cprimod_cpri_port_rx_gcw_config_set 3604 * 3605 * @brief Get/Set Rx GCW Configuration. 3606 * 3607 * @param [in] unit - unit id 3608 * @param [in] port - logical port 3609 * @param [in] index - GCW Index. 0-15 3610 * @param [in] config_info - GCW Configuration info. 3611 */ 3612 int cprimod_cpri_port_rx_gcw_config_set(int unit, int port, uint32 index, const cprimod_cpri_rx_gcw_config_t* config_info); 3613 /*! 3614 * cprimod_cpri_port_rx_gcw_config_get 3615 * 3616 * @brief Get/Set Rx GCW Configuration. 3617 * 3618 * @param [in] unit - unit id 3619 * @param [in] port - logical port 3620 * @param [in] index - GCW Index. 0-15 3621 * @param [out] config_info - GCW Configuration info. 3622 */ 3623 int cprimod_cpri_port_rx_gcw_config_get(int unit, int port, uint32 index, cprimod_cpri_rx_gcw_config_t* config_info); 3624 3625 /*! 3626 * cprimod_cpri_port_tx_gcw_config_set 3627 * 3628 * @brief Get/Set Tx GCW Configuration. 3629 * 3630 * @param [in] unit - unit id 3631 * @param [in] port - logical port 3632 * @param [in] index - GCW Index. 0-15 3633 * @param [in] config_info - GCW Configuration info. 3634 */ 3635 int cprimod_cpri_port_tx_gcw_config_set(int unit, int port, uint32 index, const cprimod_cpri_tx_gcw_config_t* config_info); 3636 /*! 3637 * cprimod_cpri_port_tx_gcw_config_get 3638 * 3639 * @brief Get/Set Tx GCW Configuration. 3640 * 3641 * @param [in] unit - unit id 3642 * @param [in] port - logical port 3643 * @param [in] index - GCW Index. 0-15 3644 * @param [out] config_info - GCW Configuration info. 3645 */ 3646 int cprimod_cpri_port_tx_gcw_config_get(int unit, int port, uint32 index, cprimod_cpri_tx_gcw_config_t* config_info); 3647 3648 typedef _shr_cpri_cw_l1_config_info_t cprimod_cpri_cw_l1_config_info_t; 3649 3650 /*! 3651 * cprimod_cpri_port_tx_gcw_filter_set 3652 * 3653 * @brief GCW Radio Frame Filter Set/Get. 3654 * 3655 * @param [in] unit - unit id 3656 * @param [in] port - logical port 3657 * @param [in] bfn0_value - BFN0 Radio Frame Number. 3658 * @param [in] bfn0_mask - BFN0 Radio Frame Mask. 3659 * @param [in] bfn1_value - BFN1 Radio Frame Number. 3660 * @param [in] bfn1_mask - BFN1 Radio Frame Mask. 3661 */ 3662 int cprimod_cpri_port_tx_gcw_filter_set(int unit, int port, uint32 bfn0_value, uint32 bfn0_mask, uint32 bfn1_value, uint32 bfn1_mask); 3663 /*! 3664 * cprimod_cpri_port_tx_gcw_filter_get 3665 * 3666 * @brief GCW Radio Frame Filter Set/Get. 3667 * 3668 * @param [in] unit - unit id 3669 * @param [in] port - logical port 3670 * @param [out] bfn0_value - BFN0 Radio Frame Number. 3671 * @param [out] bfn0_mask - BFN0 Radio Frame Mask. 3672 * @param [out] bfn1_value - BFN1 Radio Frame Number. 3673 * @param [out] bfn1_mask - BFN1 Radio Frame Mask. 3674 */ 3675 int cprimod_cpri_port_tx_gcw_filter_get(int unit, int port, uint32* bfn0_value, uint32* bfn0_mask, uint32* bfn1_value, uint32* bfn1_mask); 3676 3677 3678 /*! 3679 * @struct cprimod_cpri_tx_control_word_s 3680 * @brief CPRI Tx Control Word information. 3681 */ 3682 typedef struct cprimod_cpri_tx_control_word_s { 3683 uint32 enet_ptr; /**< Pointer to Fast Ethernet. */ 3684 uint32 l1_fun; /**< L1 functions . */ 3685 uint32 hdlc_rate; /**< HDLC rate */ 3686 uint32 protocol_ver; /**< Protocol Version */ 3687 } cprimod_cpri_tx_control_word_t; 3688 3689 /* cprimod_cpri_tx_control_word_t initialization and validation */ 3690 int cprimod_cpri_tx_control_word_t_validate(const cprimod_cpri_tx_control_word_t* cprimod_cpri_tx_control_word); 3691 int cprimod_cpri_tx_control_word_t_init(cprimod_cpri_tx_control_word_t* cprimod_cpri_tx_control_word); 3692 3693 /*! 3694 * cprimod_cpri_port_tx_control_word_set 3695 * 3696 * @brief Set CRPI control word information. 3697 * 3698 * @param [in] unit - unit id 3699 * @param [in] port - logical port 3700 * @param [in] control_info - CPRI control word. 3701 */ 3702 int cprimod_cpri_port_tx_control_word_set(int unit, int port, const cprimod_cpri_cw_l1_config_info_t* control_info); 3703 3704 /*! 3705 * cprimod_rsvd4_rx_control_message_config_set 3706 * 3707 * @brief Set Control Message Configuration.. 3708 * 3709 * @param [in] unit - unit id 3710 * @param [in] port - logical port 3711 * @param [in] queue_num - Single Message Queue Numer. 3712 * @param [in] default_tag - Default Tag. 3713 * @param [in] no_match_tag - No Match Tag. 3714 */ 3715 int cprimod_rsvd4_rx_control_message_config_set(int unit, int port, uint32 queue_num, uint32 default_tag, uint32 no_match_tag); 3716 3717 typedef _shr_rsvd4_control_msg_proc_type_t cprimod_control_msg_proc_type_t; 3718 3719 #define CPRIMOD_CONTROL_MSG_PROC_TYPE_FE _shrRsvd4CtrlMsgProcFE 3720 #define CPRIMOD_CONTROL_MSG_PROC_TYPE_FCB _shrRsvd4CtrlMsgProcFCB 3721 #define CPRIMOD_CONTROL_MSG_PROC_TYPE_PAYLOAD _shrRsvd4CtrlMsgProcPayload 3722 #define CPRIMOD_CONTROL_MSG_PROC_TYPE_FULL_MESSAGE _shrRsvd4CtrlMsgProcFull 3723 #define CPRIMOD_CONTROL_MSG_PROC_TYPE_FULL_MESSAGE_W_TAG _shrRsvd4CtrlMsgProcFullWithTag 3724 3725 3726 /*! 3727 * @struct cprimod_control_flow_config_s 3728 * @brief Control Flow Configuration Information. 3729 */ 3730 typedef struct cprimod_control_flow_config_s { 3731 cprimod_control_msg_proc_type_t proc_type; /**< . */ 3732 uint32 queue_num; /**< Queue Number . */ 3733 uint32 sync_profile; /**< Sync Profile Number */ 3734 int sync_enable; /**< Sync Profile Enable. */ 3735 } cprimod_control_flow_config_t; 3736 3737 /* cprimod_control_flow_config_t initialization and validation */ 3738 int cprimod_control_flow_config_t_validate(const cprimod_control_flow_config_t* cprimod_control_flow_config); 3739 int cprimod_control_flow_config_t_init(cprimod_control_flow_config_t* cprimod_control_flow_config); 3740 3741 /*! 3742 * cprimod_rsvd4_rx_control_flow_config_set 3743 * 3744 * @brief Set Control Message Configuration.. 3745 * 3746 * @param [in] unit - unit id 3747 * @param [in] port - logical port 3748 * @param [in] flow_id - Control Flow ID. 3749 * @param [in] config - Control Flow Configuration. 3750 */ 3751 int cprimod_rsvd4_rx_control_flow_config_set(int unit, int port, uint32 flow_id, const cprimod_control_flow_config_t* config); 3752 /*! 3753 * cprimod_rsvd4_rx_control_flow_config_get 3754 * 3755 * @brief Set Control Message Configuration.. 3756 * 3757 * @param [in] unit - unit id 3758 * @param [in] port - logical port 3759 * @param [in] flow_id - Control Flow ID. 3760 * @param [out] config - Control Flow Configuration. 3761 */ 3762 int cprimod_rsvd4_rx_control_flow_config_get(int unit, int port, uint32 flow_id, cprimod_control_flow_config_t* config); 3763 3764 typedef _shr_rsvd4_sync_count_cycle_t cprimod_sync_count_cycle_t; 3765 3766 #define CPRIMOD_SYNC_COUNT_CYCLE_EVERY_MF _shrRsvd4SyncCountCycleEveryMF 3767 #define CPRIMOD_SYNC_COUNT_CYCLE_UP_TO_6MF _shrRsvd4SyncCountCycleUpToSixMF 3768 3769 3770 /*! 3771 * @struct cprimod_sync_profile_entry_s 3772 * @brief Control Flow Configuration Information. 3773 */ 3774 typedef struct cprimod_sync_profile_entry_s { 3775 cprimod_sync_count_cycle_t count_cycle; /**< Count Cycle */ 3776 uint32 message_offset; /**< Message offset within Master Frame . */ 3777 uint32 master_frame_offset; /**< Master Frame Offset. bfn_offset */ 3778 } cprimod_sync_profile_entry_t; 3779 3780 /* cprimod_sync_profile_entry_t initialization and validation */ 3781 int cprimod_sync_profile_entry_t_validate(const cprimod_sync_profile_entry_t* cprimod_sync_profile_entry); 3782 int cprimod_sync_profile_entry_t_init(cprimod_sync_profile_entry_t* cprimod_sync_profile_entry); 3783 3784 /*! 3785 * cprimod_rsvd4_rx_sync_profile_entry_set 3786 * 3787 * @brief Sync Profile Entry.. 3788 * 3789 * @param [in] unit - unit id 3790 * @param [in] port - logical port 3791 * @param [in] profile_id - Control Flow ID. 3792 * @param [in] entry - Sync Profile Entry. 3793 */ 3794 int cprimod_rsvd4_rx_sync_profile_entry_set(int unit, int port, uint32 profile_id, const cprimod_sync_profile_entry_t* entry); 3795 /*! 3796 * cprimod_rsvd4_rx_sync_profile_entry_get 3797 * 3798 * @brief Sync Profile Entry.. 3799 * 3800 * @param [in] unit - unit id 3801 * @param [in] port - logical port 3802 * @param [in] profile_id - Control Flow ID. 3803 * @param [out] entry - Sync Profile Entry. 3804 */ 3805 int cprimod_rsvd4_rx_sync_profile_entry_get(int unit, int port, uint32 profile_id, cprimod_sync_profile_entry_t* entry); 3806 3807 /*! 3808 * cprimod_rx_tag_config_set 3809 * 3810 * @brief Tag Generation Entry.. 3811 * 3812 * @param [in] unit - unit id 3813 * @param [in] port - logical port 3814 * @param [in] default_tag - Default Tag . 3815 * @param [in] no_match_tag - No Match Tag . 3816 */ 3817 int cprimod_rx_tag_config_set(int unit, int port, uint32 default_tag, uint32 no_match_tag); 3818 3819 typedef _shr_cpri_tag_gen_entry_t cprimod_tag_gen_entry_t; 3820 3821 /*! 3822 * cprimod_rx_tag_gen_entry_add 3823 * 3824 * @brief Tag Generation Entry.. 3825 * 3826 * @param [in] unit - unit id 3827 * @param [in] port - logical port 3828 * @param [in] entry - Tag Generation Entry Info. 3829 */ 3830 int cprimod_rx_tag_gen_entry_add(int unit, int port, const cprimod_tag_gen_entry_t* entry); 3831 3832 /*! 3833 * cprimod_rx_tag_gen_entry_delete 3834 * 3835 * @brief Tag Generation Entry.. 3836 * 3837 * @param [in] unit - unit id 3838 * @param [in] port - logical port 3839 * @param [in] entry - Tag Generation Entry Info. 3840 */ 3841 int cprimod_rx_tag_gen_entry_delete(int unit, int port, const cprimod_tag_gen_entry_t* entry); 3842 3843 typedef _shr_cpri_tag_option_t cprimod_cpri_tag_option_t; 3844 3845 #define CPRIMOD_CPRI_TAG_DEFAULT _shrCpriTagUseDefault 3846 #define CPRIMOD_CPRI_TAG_LOOKUP _shrCpriTagUseLookup 3847 3848 /*! 3849 * cprimod_rx_control_flow_tag_option_set 3850 * 3851 * @brief Set tag option for control Flow.. 3852 * 3853 * @param [in] unit - unit id 3854 * @param [in] port - logical port 3855 * @param [in] flow_id - Control Flow ID. 3856 * @param [in] tag_option - Tag Option. 3857 */ 3858 int cprimod_rx_control_flow_tag_option_set(int unit, int port, uint32 flow_id, cprimod_cpri_tag_option_t tag_option); 3859 3860 /*! 3861 * cprimod_rsvd4_tx_control_flow_group_member_add 3862 * 3863 * @brief Add member to the Tx Control Flow Group.. 3864 * 3865 * @param [in] unit - unit id 3866 * @param [in] port - logical port 3867 * @param [in] group_id - Group Number 0 or 1. 3868 * @param [in] priority - Prioirty within the group 0-3. 3869 * @param [in] queue_num - Queue Numer. 3870 * @param [in] proc_type - Processing Type. 3871 */ 3872 int cprimod_rsvd4_tx_control_flow_group_member_add(int unit, int port, uint32 group_id, uint32 priority, uint32 queue_num, cprimod_control_msg_proc_type_t proc_type); 3873 3874 /*! 3875 * cprimod_rsvd4_tx_control_flow_group_member_delete 3876 * 3877 * @brief Delete member to the Tx Control Flow Group.. 3878 * 3879 * @param [in] unit - unit id 3880 * @param [in] port - logical port 3881 * @param [in] group_id - Group Number 0 or 1. 3882 * @param [in] priority - Prioirty within the group 0-3. 3883 */ 3884 int cprimod_rsvd4_tx_control_flow_group_member_delete(int unit, int port, uint32 group_id, uint32 priority); 3885 3886 /*! 3887 * cprimod_rsvd4_tx_eth_message_config_set 3888 * 3889 * @brief Setting RSVD4 Fast Ethernet Control Message Configuration.. 3890 * 3891 * @param [in] unit - unit id 3892 * @param [in] port - logical port 3893 * @param [in] msg_node - Message Node. 3894 * @param [in] msg_subnode - Message SubNode. 3895 * @param [in] msg_type - Message Type. 3896 * @param [in] msg_padding - Padding Bit 0 or 1. 3897 */ 3898 int cprimod_rsvd4_tx_eth_message_config_set(int unit, int port, uint32 msg_node, uint32 msg_subnode, uint32 msg_type, uint32 msg_padding); 3899 3900 /*! 3901 * cprimod_rsvd4_tx_single_raw_message_config_set 3902 * 3903 * @brief Setting RSVD4 Single Raw Control Message Configuration.. 3904 * 3905 * @param [in] unit - unit id 3906 * @param [in] port - logical port 3907 * @param [in] msg_id - Message ID. 3908 * @param [in] msg_type - Message Type. 3909 */ 3910 int cprimod_rsvd4_tx_single_raw_message_config_set(int unit, int port, uint32 msg_id, uint32 msg_type); 3911 3912 typedef _shr_rsvd4_crc_option_t cprimod_cpri_crc_option_t; 3913 3914 #define CPRIMOD_CPRI_CRC_USE_ROE _shrRsvd4CrcOptionUseRoe 3915 #define CPRIMOD_CPRI_CRC_REGENERATE _shrRsvd4CrcOptionRegenerate 3916 3917 /*! 3918 * cprimod_rsvd4_tx_single_tunnel_message_config_set 3919 * 3920 * @brief Setting RSVD4 Single Raw Control Message Configuration.. 3921 * 3922 * @param [in] unit - unit id 3923 * @param [in] port - logical port 3924 * @param [in] crc_option - CRC option. 3925 */ 3926 int cprimod_rsvd4_tx_single_tunnel_message_config_set(int unit, int port, cprimod_cpri_crc_option_t crc_option); 3927 3928 3929 /*! 3930 * @struct cprimod_rsvd4_tx_config_info_s 3931 * @brief CPRI Fast ETH configuration information. 3932 */ 3933 typedef struct cprimod_rsvd4_tx_config_info_s { 3934 cprimod_control_msg_proc_type_t proc_type; /**< Control message process type. */ 3935 uint8 queue_num; /**< Queue Number */ 3936 uint8 crc_mode; /**< crc mode */ 3937 } cprimod_rsvd4_tx_config_info_t; 3938 3939 /* cprimod_rsvd4_tx_config_info_t initialization and validation */ 3940 int cprimod_rsvd4_tx_config_info_t_validate(const cprimod_rsvd4_tx_config_info_t* cprimod_rsvd4_tx_config_info); 3941 int cprimod_rsvd4_tx_config_info_t_init(cprimod_rsvd4_tx_config_info_t* cprimod_rsvd4_tx_config_info); 3942 3943 /*! 3944 * cprimod_rsvd4_tx_control_flow_config_set 3945 * 3946 * @brief Set Control Message Configuration.. 3947 * 3948 * @param [in] unit - unit id 3949 * @param [in] port - logical port 3950 * @param [in] flow_id - Control Flow ID. 3951 * @param [in] config_info - Configuration info. 3952 */ 3953 int cprimod_rsvd4_tx_control_flow_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_tx_config_info_t* config_info); 3954 /*! 3955 * cprimod_rsvd4_tx_control_flow_config_get 3956 * 3957 * @brief Set Control Message Configuration.. 3958 * 3959 * @param [in] unit - unit id 3960 * @param [in] port - logical port 3961 * @param [in] flow_id - Control Flow ID. 3962 * @param [out] config_info - Configuration info. 3963 */ 3964 int cprimod_rsvd4_tx_control_flow_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_tx_config_info_t* config_info); 3965 3966 /*! 3967 * cprimod_rsvd4_tx_control_flow_header_index_set 3968 * 3969 * @brief Set Index to header config table for a particular flow.. 3970 * 3971 * @param [in] unit - unit id 3972 * @param [in] port - logical port 3973 * @param [in] roe_flow_id - Flow ID from ROE header. 3974 * @param [in] index - Index to header config table. 3975 */ 3976 int cprimod_rsvd4_tx_control_flow_header_index_set(int unit, int port, uint32 roe_flow_id, uint32 index); 3977 /*! 3978 * cprimod_rsvd4_tx_control_flow_header_index_get 3979 * 3980 * @brief Set Index to header config table for a particular flow.. 3981 * 3982 * @param [in] unit - unit id 3983 * @param [in] port - logical port 3984 * @param [in] roe_flow_id - Flow ID from ROE header. 3985 * @param [out] index - Index to header config table. 3986 */ 3987 int cprimod_rsvd4_tx_control_flow_header_index_get(int unit, int port, uint32 roe_flow_id, uint32* index); 3988 3989 /*! 3990 * cprimod_rsvd4_tx_control_header_entry_set 3991 * 3992 * @brief Header Look up Entry.. 3993 * 3994 * @param [in] unit - unit id 3995 * @param [in] port - logical port 3996 * @param [in] index - Index to the table. 3997 * @param [in] header_node - rsvd4 header node. 3998 * @param [in] header_subnode - rsvd4 header subnode. 3999 * @param [in] payload_node - rsvd4 payload node. 4000 */ 4001 int cprimod_rsvd4_tx_control_header_entry_set(int unit, int port, uint32 index, uint32 header_node, uint32 header_subnode, uint32 payload_node); 4002 /*! 4003 * cprimod_rsvd4_tx_control_header_entry_get 4004 * 4005 * @brief Header Look up Entry.. 4006 * 4007 * @param [in] unit - unit id 4008 * @param [in] port - logical port 4009 * @param [in] index - Index to the table. 4010 * @param [out] header_node - rsvd4 header node. 4011 * @param [out] header_subnode - rsvd4 header subnode. 4012 * @param [out] payload_node - rsvd4 payload node. 4013 */ 4014 int cprimod_rsvd4_tx_control_header_entry_get(int unit, int port, uint32 index, uint32* header_node, uint32* header_subnode, uint32* payload_node); 4015 4016 typedef _shr_cpri_fast_eth_config_t cprimod_cpri_fast_eth_config_t; 4017 4018 /*! 4019 * cprimod_rsvd4_fast_eth_config_set 4020 * 4021 * @brief Set Fast Ethernet configuration.. 4022 * 4023 * @param [in] unit - unit id 4024 * @param [in] port - logical port 4025 * @param [in] config_info - Fast Eth Configuration. 4026 */ 4027 int cprimod_rsvd4_fast_eth_config_set(int unit, int port, const cprimod_cpri_fast_eth_config_t* config_info); 4028 4029 /*! 4030 * cprimod_cpri_or_enet_port_set 4031 * 4032 * @brief Set Get if the port is cpri or Ethernet 4033 * 4034 * @param [in] unit - unit id 4035 * @param [in] port - logical port 4036 * @param [in] val - If 1 CPRI I/F 0 Ethernet I/F. 4037 */ 4038 int cprimod_cpri_or_enet_port_set(int unit, int port, int val); 4039 /*! 4040 * cprimod_cpri_or_enet_port_get 4041 * 4042 * @brief Set Get if the port is cpri or Ethernet 4043 * 4044 * @param [in] unit - unit id 4045 * @param [in] port - logical port 4046 * @param [out] val - If 1 CPRI I/F 0 Ethernet I/F. 4047 */ 4048 int cprimod_cpri_or_enet_port_get(int unit, int port, int* val); 4049 4050 /*! 4051 * cprimod_cpri_port_rx_enable_set 4052 * 4053 * @brief Set Get if Rx enabled 4054 * 4055 * @param [in] unit - unit id 4056 * @param [in] port - logical port 4057 * @param [in] val - If 1 CPRI I/F 0 Ethernet I/F. 4058 */ 4059 int cprimod_cpri_port_rx_enable_set(int unit, int port, int val); 4060 /*! 4061 * cprimod_cpri_port_rx_enable_get 4062 * 4063 * @brief Set Get if Rx enabled 4064 * 4065 * @param [in] unit - unit id 4066 * @param [in] port - logical port 4067 * @param [out] val - If 1 CPRI I/F 0 Ethernet I/F. 4068 */ 4069 int cprimod_cpri_port_rx_enable_get(int unit, int port, int* val); 4070 4071 /*! 4072 * cprimod_cpri_port_tx_enable_set 4073 * 4074 * @brief Set Get if Tx enabled 4075 * 4076 * @param [in] unit - unit id 4077 * @param [in] port - logical port 4078 * @param [in] val - If 1 CPRI I/F 0 Ethernet I/F. 4079 */ 4080 int cprimod_cpri_port_tx_enable_set(int unit, int port, int val); 4081 /*! 4082 * cprimod_cpri_port_tx_enable_get 4083 * 4084 * @brief Set Get if Tx enabled 4085 * 4086 * @param [in] unit - unit id 4087 * @param [in] port - logical port 4088 * @param [out] val - If 1 CPRI I/F 0 Ethernet I/F. 4089 */ 4090 int cprimod_cpri_port_tx_enable_get(int unit, int port, int* val); 4091 4092 /*! 4093 * cprimod_cpri_port_interrupt_link_status_get 4094 * 4095 * @brief Get Interrupt status 4096 * 4097 * @param [in] unit - unit id 4098 * @param [in] port - logical port 4099 * @param [in] is_link_intr_status - indicates if link event interrupt status set 4100 */ 4101 int cprimod_cpri_port_interrupt_link_status_get(int unit, int port, const int* is_link_intr_status); 4102 4103 #define CPRIMOD_INTR_DATA_NUM_OF_DATA64 _shrIntrDataNumOfData64 4104 4105 typedef _shr_cpri_port_interrupt_callback_t cprimod_cpri_port_interrupt_callback_t; 4106 4107 typedef _shr_cpri_interrupt_type_t cprimod_cpri_port_intr_type_t; 4108 4109 typedef _shr_cpri_intr_info_t cprimod_cpri_intr_info_t; 4110 4111 4112 /*! 4113 * @struct cprimod_interrupt_callback_entry_s 4114 * @brief Interrupt callback function registration entry.. 4115 */ 4116 typedef struct cprimod_interrupt_callback_entry_s { 4117 cprimod_cpri_port_interrupt_callback_t cb_func; /**< Interrupt callback function */ 4118 void* cb_data; /**< Callback function data. */ 4119 } cprimod_interrupt_callback_entry_t; 4120 4121 /* cprimod_interrupt_callback_entry_t initialization and validation */ 4122 int cprimod_interrupt_callback_entry_t_validate(const cprimod_interrupt_callback_entry_t* cprimod_interrupt_callback_entry); 4123 int cprimod_interrupt_callback_entry_t_init(cprimod_interrupt_callback_entry_t* cprimod_interrupt_callback_entry); 4124 4125 /*! 4126 * cprimod_cpri_port_interrupt_callback_register 4127 * 4128 * @brief Register callback for CPRI interrupt. 4129 * 4130 * @param [in] unit - unit id 4131 * @param [in] cpri_intr_type - 4132 * @param [in] callback - 4133 * @param [out] cb_data - 4134 */ 4135 int cprimod_cpri_port_interrupt_callback_register(int unit, cprimod_cpri_port_intr_type_t cpri_intr_type, cprimod_cpri_port_interrupt_callback_t callback, void* cb_data); 4136 4137 /*! 4138 * cprimod_cpri_port_interrupt_callback_unregister 4139 * 4140 * @brief Unregister callback for CPRI interrupt. 4141 * 4142 * @param [in] unit - unit id 4143 * @param [in] cpri_intr_type - 4144 * @param [in] callback - 4145 */ 4146 int cprimod_cpri_port_interrupt_callback_unregister(int unit, cprimod_cpri_port_intr_type_t cpri_intr_type, cprimod_cpri_port_interrupt_callback_t callback); 4147 4148 /*! 4149 * cprimod_cpri_port_interrupt_enable_set 4150 * 4151 * @brief Get the CPRI Port interrupt status. 4152 * 4153 * @param [in] unit - unit id 4154 * @param [in] port - logical port 4155 * @param [in] cpri_intr_type - 4156 * @param [in] data - 4157 * @param [in] enable - 4158 */ 4159 int cprimod_cpri_port_interrupt_enable_set(int unit, int port, cprimod_cpri_port_intr_type_t cpri_intr_type, int data, int enable); 4160 4161 /*! 4162 * cprimod_cpri_cpm_interrupt_data_init 4163 * 4164 * @brief Initialize the CPM interrupt related Data. 4165 * 4166 * @param [in] unit - unit id 4167 */ 4168 int cprimod_cpri_cpm_interrupt_data_init(int unit); 4169 4170 /*! 4171 * cprimod_cpri_port_interrupt_process 4172 * 4173 * @brief Get the CPRI Port interrupt status. 4174 * 4175 * @param [in] unit - unit id 4176 * @param [in] port - logical port 4177 */ 4178 int cprimod_cpri_port_interrupt_process(int unit, int port); 4179 4180 typedef _shr_cpri_1588_ts_type_t cprimod_1588_ts_type_t; 4181 4182 #define CPRIMOD_1588_TS_TYPE_FIFO _shrCpri1588TsTypeFifo 4183 #define CPRIMOD_1588_TS_TYPE_CMIC _shrCpri1588TsTypeCMIC 4184 #define CPRIMOD_1588_TS_TYPE_SW_CAP _shrCpri1588TsTypeSw 4185 4186 4187 /*! 4188 * @enum cprimod_1588_capture_mode_e 4189 * @brief Capture type. 4190 */ 4191 typedef enum cprimod_1588_capture_mode_e { 4192 cprimod_1588_MATCH_BFN_AND_HFN = 0, /**< capture bfn and hfn. */ 4193 cprimod_1588_MATCH_HFN_ONLY = 1, /**< capture hfn. */ 4194 cprimod_1588_MATCH_Count 4195 } cprimod_1588_capture_mode_t; 4196 4197 #ifdef CPRIMOD_DIAG 4198 extern enum_mapping_t cprimod_1588_capture_mode_t_mapping[]; 4199 #endif /*CPRIMOD_DIAG*/ 4200 4201 /* cprimod_1588_capture_mode_t validation */ 4202 int cprimod_1588_capture_mode_t_validate(cprimod_1588_capture_mode_t cprimod_1588_capture_mode); 4203 4204 /*! 4205 * @struct cprimod_1588_capture_config_s 4206 * @brief Capture based on bfn and hfn. 4207 */ 4208 typedef struct cprimod_1588_capture_config_s { 4209 cprimod_1588_capture_mode_t mode; /**< Capture type. */ 4210 uint16 capture_bfn_num; /**< bfn number to capture */ 4211 uint8 capture_hfn_num; /**< hfn number to capture */ 4212 } cprimod_1588_capture_config_t; 4213 4214 /* cprimod_1588_capture_config_t initialization and validation */ 4215 int cprimod_1588_capture_config_t_validate(const cprimod_1588_capture_config_t* cprimod_1588_capture_config); 4216 int cprimod_1588_capture_config_t_init(cprimod_1588_capture_config_t* cprimod_1588_capture_config); 4217 4218 4219 /*! 4220 * @struct cprimod_1588_time_s 4221 * @brief Captured time. 4222 */ 4223 typedef struct cprimod_1588_time_s { 4224 uint64 nano_sec; /**< full ns timme */ 4225 uint8 sub_nano_sec; /**< Frection on ns time */ 4226 uint8 sign_bit; /**< Signed bit for time */ 4227 } cprimod_1588_time_t; 4228 4229 /* cprimod_1588_time_t initialization and validation */ 4230 int cprimod_1588_time_t_validate(const cprimod_1588_time_t* cprimod_1588_time); 4231 int cprimod_1588_time_t_init(cprimod_1588_time_t* cprimod_1588_time); 4232 4233 /*! 4234 * cprimod_fast_clk_bit_time_period_set 4235 * 4236 * @brief set/get fast clk bit period 4237 * 4238 * @param [in] unit - unit id 4239 * @param [in] port - logical port 4240 * @param [in] bit_time_period - bit time 4241 */ 4242 int cprimod_fast_clk_bit_time_period_set(int unit, int port, uint32 bit_time_period); 4243 /*! 4244 * cprimod_fast_clk_bit_time_period_get 4245 * 4246 * @brief set/get fast clk bit period 4247 * 4248 * @param [in] unit - unit id 4249 * @param [in] port - logical port 4250 * @param [out] bit_time_period - bit time 4251 */ 4252 int cprimod_fast_clk_bit_time_period_get(int unit, int port, uint32* bit_time_period); 4253 4254 typedef _shr_cpri_dir_t cprimod_direction_t; 4255 4256 #define CPRIMOD_DIR_TX _shrCpriDirTx 4257 #define CPRIMOD_DIR_RX _shrCpriDirRx 4258 4259 /*! 4260 * cprimod_1588_bit_time_period_set 4261 * 4262 * @brief set/get time stamp bit period 4263 * 4264 * @param [in] unit - unit id 4265 * @param [in] port - logical port 4266 * @param [in] direction - TX/RX 4267 * @param [in] speed - speed 4268 */ 4269 int cprimod_1588_bit_time_period_set(int unit, int port, cprimod_direction_t direction, cprimod_port_speed_t speed); 4270 /*! 4271 * cprimod_1588_bit_time_period_get 4272 * 4273 * @brief set/get time stamp bit period 4274 * 4275 * @param [in] unit - unit id 4276 * @param [in] port - logical port 4277 * @param [in] direction - TX/RX 4278 * @param [out] bit_time_period - bit time 4279 */ 4280 int cprimod_1588_bit_time_period_get(int unit, int port, cprimod_direction_t direction, uint32* bit_time_period); 4281 4282 /*! 4283 * cprimod_1588_timestamp_capture_config_set 4284 * 4285 * @brief set/get time stamp config 4286 * 4287 * @param [in] unit - unit id 4288 * @param [in] port - logical port 4289 * @param [in] direction - TX/RX 4290 * @param [in] config - Config 4291 */ 4292 int cprimod_1588_timestamp_capture_config_set(int unit, int port, cprimod_direction_t direction, const cprimod_1588_capture_config_t* config); 4293 /*! 4294 * cprimod_1588_timestamp_capture_config_get 4295 * 4296 * @brief set/get time stamp config 4297 * 4298 * @param [in] unit - unit id 4299 * @param [in] port - logical port 4300 * @param [in] direction - TX/RX 4301 * @param [out] config - Config 4302 */ 4303 int cprimod_1588_timestamp_capture_config_get(int unit, int port, cprimod_direction_t direction, cprimod_1588_capture_config_t* config); 4304 4305 /*! 4306 * cprimod_1588_captured_timestamp_get 4307 * 4308 * @brief Get timestemp 4309 * 4310 * @param [in] unit - unit id 4311 * @param [in] port - logical port 4312 * @param [in] direction - TX/RX 4313 * @param [in] fifo0_sw1 - Fifo or capture timestamp 4314 * @param [in] mx_cnt - 4315 * @param [out] count - 4316 * @param [out] captured_time - captured time 4317 */ 4318 int cprimod_1588_captured_timestamp_get(int unit, int port, cprimod_direction_t direction, uint8 fifo0_sw1, uint8 mx_cnt, uint8* count, uint64* captured_time); 4319 4320 /*! 4321 * cprimod_1588_timestamp_adjust_set 4322 * 4323 * @brief set/get time stamp config 4324 * 4325 * @param [in] unit - unit id 4326 * @param [in] port - logical port 4327 * @param [in] direction - TX/RX 4328 * @param [in] adjust_time - adjest time 4329 */ 4330 int cprimod_1588_timestamp_adjust_set(int unit, int port, cprimod_direction_t direction, const cprimod_1588_time_t* adjust_time); 4331 /*! 4332 * cprimod_1588_timestamp_adjust_get 4333 * 4334 * @brief set/get time stamp config 4335 * 4336 * @param [in] unit - unit id 4337 * @param [in] port - logical port 4338 * @param [in] direction - TX/RX 4339 * @param [out] adjust_time - adjest time 4340 */ 4341 int cprimod_1588_timestamp_adjust_get(int unit, int port, cprimod_direction_t direction, cprimod_1588_time_t* adjust_time); 4342 4343 /*! 4344 * cprimod_1588_timestamp_fifo_config_set 4345 * 4346 * @brief set/get time stamp modulo for fifo 4347 * 4348 * @param [in] unit - unit id 4349 * @param [in] port - logical port 4350 * @param [in] direction - TX/RX 4351 * @param [in] modulo - modulo 4352 */ 4353 int cprimod_1588_timestamp_fifo_config_set(int unit, int port, cprimod_direction_t direction, uint16 modulo); 4354 /*! 4355 * cprimod_1588_timestamp_fifo_config_get 4356 * 4357 * @brief set/get time stamp modulo for fifo 4358 * 4359 * @param [in] unit - unit id 4360 * @param [in] port - logical port 4361 * @param [in] direction - TX/RX 4362 * @param [out] modulo - modulo 4363 */ 4364 int cprimod_1588_timestamp_fifo_config_get(int unit, int port, cprimod_direction_t direction, uint16* modulo); 4365 4366 /*! 4367 * cprimod_1588_timestamp_cmic_config_set 4368 * 4369 * @brief set/get time stamp modulo for cmic 4370 * 4371 * @param [in] unit - unit id 4372 * @param [in] port - logical port 4373 * @param [in] direction - TX/RX 4374 * @param [in] modulo - modulo 4375 */ 4376 int cprimod_1588_timestamp_cmic_config_set(int unit, int port, cprimod_direction_t direction, uint16 modulo); 4377 /*! 4378 * cprimod_1588_timestamp_cmic_config_get 4379 * 4380 * @brief set/get time stamp modulo for cmic 4381 * 4382 * @param [in] unit - unit id 4383 * @param [in] port - logical port 4384 * @param [in] direction - TX/RX 4385 * @param [out] modulo - modulo 4386 */ 4387 int cprimod_1588_timestamp_cmic_config_get(int unit, int port, cprimod_direction_t direction, uint16* modulo); 4388 4389 /*! 4390 * cprimod_cpri_basic_frame_info_get 4391 * 4392 * @brief Get Basic frame information, frame length and control word length. 4393 * 4394 * @param [in] unit - unit id 4395 * @param [in] port - logical port 4396 * @param [in] dir - TX/RX 4397 * @param [out] frame_len_in_bits - frame length in bits 4398 * @param [out] control_word_len_in_bits - control word length in bits 4399 */ 4400 int cprimod_cpri_basic_frame_info_get(int unit, int port, cprimod_direction_t dir, uint32* frame_len_in_bits, uint32* control_word_len_in_bits); 4401 4402 typedef _shr_cpri_roe_payload_multiple_t cprimod_cpri_roe_payload_multiple_t; 4403 4404 #define CPRIMOD_CPRI_PAYLOAD_MULTIPLE_1X _shrCpriPayloadMultiple1X 4405 #define CPRIMOD_CPRI_PAYLOAD_MULTIPLE_1P5X _shrCpriPayloadMultiple1p5X 4406 #define CPRIMOD_CPRI_PAYLOAD_MULTIPLE_2X _shrCpriPayloadMultiple2X 4407 #define CPRIMOD_CPRI_PAYLOAD_MULTIPLE_4X _shrCpriPayloadMultiple4X 4408 #define CPRIMOD_CPRI_PAYLOAD_MULTIPLE_8X _shrCpriPayloadMultiple8X 4409 4410 /*! 4411 * cprimod_cpri_agnostic_mode_basic_frame_config_set 4412 * 4413 * @brief setup basic frame parser Rx and assembler Tx table. 4414 * 4415 * @param [in] unit - unit id 4416 * @param [in] port - logical port 4417 * @param [in] dir - TX/RX 4418 * @param [in] enable - enable 4419 */ 4420 int cprimod_cpri_agnostic_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 4421 4422 /*! 4423 * cprimod_cpri_interface_bus_width_get 4424 * 4425 * @brief Get the interface bus width, 10bit or 40bit. 4426 * 4427 * @param [in] unit - unit id 4428 * @param [in] port - logical port 4429 * @param [out] is_10bit_mode - Bus is in 10 bit Mode 4430 */ 4431 int cprimod_cpri_interface_bus_width_get(int unit, int port, int* is_10bit_mode); 4432 4433 /*! 4434 * cprimod_cpri_tunnel_mode_basic_frame_config_set 4435 * 4436 * @brief setup basic frame parser Rx and assembler Tx table. 4437 * 4438 * @param [in] unit - unit id 4439 * @param [in] port - logical port 4440 * @param [in] dir - TX/RX 4441 * @param [in] enable - enable 4442 */ 4443 int cprimod_cpri_tunnel_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 4444 4445 /*! 4446 * cprimod_rsvd4_agnostic_mode_basic_frame_config_set 4447 * 4448 * @brief setup basic frame parser Rx and assembler Tx table. 4449 * 4450 * @param [in] unit - unit id 4451 * @param [in] port - logical port 4452 * @param [in] dir - TX/RX 4453 * @param [in] enable - enable 4454 */ 4455 int cprimod_rsvd4_agnostic_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 4456 4457 /*! 4458 * cprimod_encap_presentation_time_enable_set 4459 * 4460 * @brief Set/Get encap presentation enable. 4461 * 4462 * @param [in] unit - unit id 4463 * @param [in] port - logical port 4464 * @param [in] enable - enable 4465 */ 4466 int cprimod_encap_presentation_time_enable_set(int unit, int port, int enable); 4467 /*! 4468 * cprimod_encap_presentation_time_enable_get 4469 * 4470 * @brief Set/Get encap presentation enable. 4471 * 4472 * @param [in] unit - unit id 4473 * @param [in] port - logical port 4474 * @param [out] enable - enable 4475 */ 4476 int cprimod_encap_presentation_time_enable_get(int unit, int port, int* enable); 4477 4478 4479 /*! 4480 * @struct cprimod_encap_presentation_time_config_s 4481 * @brief CPRI Config Parameter. 4482 */ 4483 typedef struct cprimod_encap_presentation_time_config_s { 4484 uint32 mod_count; /**< Presentation Time Mod Count. */ 4485 cprimod_cpri_frame_sync_mode_t frame_sync_mode; /**< Radio,Hyper or Basic */ 4486 uint32 radio_frame_offset; /**< Radio Frame Offset. */ 4487 uint32 hyper_frame_offset; /**< Hyper Frame Offset. */ 4488 int approx_inc_disable; /**< Disable Approximate Increment. */ 4489 } cprimod_encap_presentation_time_config_t; 4490 4491 /* cprimod_encap_presentation_time_config_t initialization and validation */ 4492 int cprimod_encap_presentation_time_config_t_validate(const cprimod_encap_presentation_time_config_t* cprimod_encap_presentation_time_config); 4493 int cprimod_encap_presentation_time_config_t_init(cprimod_encap_presentation_time_config_t* cprimod_encap_presentation_time_config); 4494 4495 /*! 4496 * cprimod_encap_presentation_time_config_set 4497 * 4498 * @brief Set/Get encap presentation time config. 4499 * 4500 * @param [in] unit - unit id 4501 * @param [in] port - logical port 4502 * @param [in] config - Config Parameters 4503 */ 4504 int cprimod_encap_presentation_time_config_set(int unit, int port, const cprimod_encap_presentation_time_config_t* config); 4505 /*! 4506 * cprimod_encap_presentation_time_config_get 4507 * 4508 * @brief Set/Get encap presentation time config. 4509 * 4510 * @param [in] unit - unit id 4511 * @param [in] port - logical port 4512 * @param [out] config - Config Parameters 4513 */ 4514 int cprimod_encap_presentation_time_config_get(int unit, int port, cprimod_encap_presentation_time_config_t* config); 4515 4516 /*! 4517 * cprimod_encap_presentation_time_adjust_set 4518 * 4519 * @brief Set/Get encap presentation time adjustment. 4520 * 4521 * @param [in] unit - unit id 4522 * @param [in] port - logical port 4523 * @param [in] time - 29 bits, signed bit|24bits ns|4bits sub ns 4524 */ 4525 int cprimod_encap_presentation_time_adjust_set(int unit, int port, uint32 time); 4526 /*! 4527 * cprimod_encap_presentation_time_adjust_get 4528 * 4529 * @brief Set/Get encap presentation time adjustment. 4530 * 4531 * @param [in] unit - unit id 4532 * @param [in] port - logical port 4533 * @param [out] time - 29 bits, signed bit|24bits ns|4bits sub ns 4534 */ 4535 int cprimod_encap_presentation_time_adjust_get(int unit, int port, uint32* time); 4536 4537 /*! 4538 * cprimod_encap_presentation_time_approximate_increment_set 4539 * 4540 * @brief Set/Get encap presentation time approximate increment. 4541 * 4542 * @param [in] unit - unit id 4543 * @param [in] port - logical port 4544 * @param [in] time - 29 bits 4545 */ 4546 int cprimod_encap_presentation_time_approximate_increment_set(int unit, int port, uint32 time); 4547 /*! 4548 * cprimod_encap_presentation_time_approximate_increment_get 4549 * 4550 * @brief Set/Get encap presentation time approximate increment. 4551 * 4552 * @param [in] unit - unit id 4553 * @param [in] port - logical port 4554 * @param [out] time - 29 bits 4555 */ 4556 int cprimod_encap_presentation_time_approximate_increment_get(int unit, int port, uint32* time); 4557 4558 typedef _shr_cpri_roe_ordering_info_option_t cprimod_cpri_roe_ordering_info_option_t; 4559 4560 #define CPRIMOD_CPRI_ROE_ORDERING_INFO_OPTION_SEQ_NUM _shrCpriRoeOrderingInfoOptionSeqNum 4561 #define CPRIMOD_CPRI_ROE_ORDERING_INFO_OPTION_TIMESTAMP _shrCpriRoeOrderingInfoOptionTimestamp 4562 4563 /*! 4564 * cprimod_decap_agnostic_mode_enable_set 4565 * 4566 * @brief Set/Get Decap Agnostic Mode enable. 4567 * 4568 * @param [in] unit - unit id 4569 * @param [in] port - logical port 4570 * @param [in] enable - enable 4571 * @param [in] mode - Mode Timestamp/Seq_Num 4572 */ 4573 int cprimod_decap_agnostic_mode_enable_set(int unit, int port, int enable, cprimod_cpri_roe_ordering_info_option_t mode); 4574 /*! 4575 * cprimod_decap_agnostic_mode_enable_get 4576 * 4577 * @brief Set/Get Decap Agnostic Mode enable. 4578 * 4579 * @param [in] unit - unit id 4580 * @param [in] port - logical port 4581 * @param [out] enable - enable 4582 * @param [out] mode - Mode Timestamp/Seq_Num 4583 */ 4584 int cprimod_decap_agnostic_mode_enable_get(int unit, int port, int* enable, cprimod_cpri_roe_ordering_info_option_t* mode); 4585 4586 4587 /*! 4588 * @struct cprimod_decap_agnostic_mode_config_s 4589 * @brief CPRI Config Parameter. 4590 */ 4591 typedef struct cprimod_decap_agnostic_mode_config_s { 4592 uint32 mod_count; /**< Decap Agnostic Mode Mod Count, Cycle Size. */ 4593 uint32 packet_size; /**< Packet size to calculate Total Buffer size/Rd Max Ptr. */ 4594 uint32 queue_num; /**< Queue Number. */ 4595 } cprimod_decap_agnostic_mode_config_t; 4596 4597 /* cprimod_decap_agnostic_mode_config_t initialization and validation */ 4598 int cprimod_decap_agnostic_mode_config_t_validate(const cprimod_decap_agnostic_mode_config_t* cprimod_decap_agnostic_mode_config); 4599 int cprimod_decap_agnostic_mode_config_t_init(cprimod_decap_agnostic_mode_config_t* cprimod_decap_agnostic_mode_config); 4600 4601 /*! 4602 * cprimod_decap_agnostic_mode_config_set 4603 * 4604 * @brief Set/Get Decap Agnostic Mode Config. 4605 * 4606 * @param [in] unit - unit id 4607 * @param [in] port - logical port 4608 * @param [in] config - Config Parameters 4609 */ 4610 int cprimod_decap_agnostic_mode_config_set(int unit, int port, const cprimod_decap_agnostic_mode_config_t* config); 4611 /*! 4612 * cprimod_decap_agnostic_mode_config_get 4613 * 4614 * @brief Set/Get Decap Agnostic Mode Config. 4615 * 4616 * @param [in] unit - unit id 4617 * @param [in] port - logical port 4618 * @param [out] config - Config Parameters 4619 */ 4620 int cprimod_decap_agnostic_mode_config_get(int unit, int port, cprimod_decap_agnostic_mode_config_t* config); 4621 4622 /*! 4623 * cprimod_decap_presentation_time_config_set 4624 * 4625 * @brief Set/Get decap presentation time configuration. 4626 * 4627 * @param [in] unit - unit id 4628 * @param [in] port - logical port 4629 * @param [in] mod_offset - 20 bits 4630 * @param [in] mod_count - modulo count. 4631 */ 4632 int cprimod_decap_presentation_time_config_set(int unit, int port, uint32 mod_offset, uint32 mod_count); 4633 /*! 4634 * cprimod_decap_presentation_time_config_get 4635 * 4636 * @brief Set/Get decap presentation time configuration. 4637 * 4638 * @param [in] unit - unit id 4639 * @param [in] port - logical port 4640 * @param [out] mod_offset - 20 bits 4641 * @param [out] mod_count - modulo count. 4642 */ 4643 int cprimod_decap_presentation_time_config_get(int unit, int port, uint32* mod_offset, uint32* mod_count); 4644 4645 /*! 4646 * cprimod_compression_lookup_table_set 4647 * 4648 * @brief Set/Get Compression Lookup Table. 4649 * 4650 * @param [in] unit - unit id 4651 * @param [in] port - logical port 4652 * @param [in] table_depth - Input Table Depth 4653 * @param [in] table - Table array of 1024 entries, 23 bits 4654 */ 4655 int cprimod_compression_lookup_table_set(int unit, int port, int table_depth, const uint32* table); 4656 /*! 4657 * cprimod_compression_lookup_table_get 4658 * 4659 * @brief Set/Get Compression Lookup Table. 4660 * 4661 * @param [in] unit - unit id 4662 * @param [in] port - logical port 4663 * @param [in] max_depth - Buffer Size. 4664 * @param [out] table_depth - Num of Table entries populated. 4665 * @param [out] table - Table array of 1024 entries, 23 bits 4666 */ 4667 int cprimod_compression_lookup_table_get(int unit, int port, int max_depth, int* table_depth, uint32* table); 4668 4669 /*! 4670 * cprimod_decompression_lookup_table_set 4671 * 4672 * @brief Set/Get DeCompression Lookup Table. 4673 * 4674 * @param [in] unit - unit id 4675 * @param [in] port - logical port 4676 * @param [in] table_depth - Input Table Depth 4677 * @param [in] table - Table array of 256 entries, 14 bits 4678 */ 4679 int cprimod_decompression_lookup_table_set(int unit, int port, int table_depth, const uint32* table); 4680 /*! 4681 * cprimod_decompression_lookup_table_get 4682 * 4683 * @brief Set/Get DeCompression Lookup Table. 4684 * 4685 * @param [in] unit - unit id 4686 * @param [in] port - logical port 4687 * @param [in] max_depth - Buffer Size. 4688 * @param [out] table_depth - Num of Table entries populated. 4689 * @param [out] table - Table array of 256 entries, 14 bits 4690 */ 4691 int cprimod_decompression_lookup_table_get(int unit, int port, int max_depth, int* table_depth, uint32* table); 4692 4693 /*! 4694 * cprimod_cpri_port_decap_queue_flow_control_set 4695 * 4696 * @brief Set/Get control queue flow control. 4697 * 4698 * @param [in] unit - unit id 4699 * @param [in] port - logical port 4700 * @param [in] queue_num - Queue Number 4701 * @param [in] enable - Enable . 4702 * @param [in] xon_threshold - Threshold to turn OFF back-pressure. 4703 * @param [in] xoff_threshold - Threshold to turn ON back-pressure. 4704 */ 4705 int cprimod_cpri_port_decap_queue_flow_control_set(int unit, int port, uint32 queue_num, int enable, uint32_t xon_threshold, uint32_t xoff_threshold); 4706 /*! 4707 * cprimod_cpri_port_decap_queue_flow_control_get 4708 * 4709 * @brief Set/Get control queue flow control. 4710 * 4711 * @param [in] unit - unit id 4712 * @param [in] port - logical port 4713 * @param [in] queue_num - Queue Number 4714 * @param [out] enable - Enable . 4715 * @param [out] xon_threshold - Threshold to turn OFF back-pressure. 4716 * @param [out] xoff_threshold - Threshold to turn ON back-pressure. 4717 */ 4718 int cprimod_cpri_port_decap_queue_flow_control_get(int unit, int port, uint32 queue_num, int* enable, uint32_t* xon_threshold, uint32_t* xoff_threshold); 4719 4720 typedef _shr_cpri_fec_ts_source_t cprimod_fec_ts_source_t; 4721 4722 #define CPRIMOD_CPRI_FEC_TS_SOURCE_66B _shrCpriFecTsSource66b 4723 #define CPRIMOD_CPRI_FEC_TS_SOURCE_257B _shrCpriFecTsSource257b 4724 4725 typedef _shr_cpri_fec_aux_config_t cprimod_fec_aux_config_para_t; 4726 4727 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SCRAMBLE_BYPASS_TX _shrCpriFecAuxConfigScrambleBypassTx 4728 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_DESCRAMBLE_BYPASS_RX _shrCpriFecAuxConfigDescrambleBypassRx 4729 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_BYPASS_INDICATION_ENABLE _shrCpriFecAuxConfigBypassIndicationEnable 4730 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_BYPASS_CORRECTION_ENABLE _shrCpriFecAuxConfigBypassCorrectionEnable 4731 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_CORRUPT_ALTERNATE_BLOCK_ENABLE _shrCpriFecAuxConfigCorruptAlternateBlocksEnable 4732 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SYMBOL_ERROR_CORRUPT_ENABLE _shrCpriFecAuxConfigSymbolErrorCorruptEnable 4733 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SYMBOL_ERROR_TIMER_PERIOD _shrCpriFecAuxConfigSymbolErrorTmrPeriod 4734 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SYMBOL_ERROR_COUNT_THRESHOLD _shrCpriFecAuxConfigSymbolErrCntThreshold 4735 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SYMBOL_ERROR_WINDOW _shrCpriFecAuxConfigSetSymbErrWindow128 4736 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_TICK_DENOMINATOR _shrCpriFecAuxConfigGboxTickDenominator 4737 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_TICK_NUMERATOR _shrCpriFecAuxConfigGboxTickNumerator 4738 #define CPRIMOD_CPRI_FEC_AUX_CONFIG_SOFT_RESET _shrCpriFecAuxConfigSoftReset 4739 4740 4741 /*! 4742 * @struct cprimod_fec_timestamp_config_s 4743 * @brief CPRI timestamp with FEC 4744 */ 4745 typedef struct cprimod_fec_timestamp_config_s { 4746 int enable; /**< Enable time stamp */ 4747 cprimod_fec_ts_source_t fec_fifo_ts_source_select; /**< src for time to fifo */ 4748 cprimod_fec_ts_source_t fec_cmic_ts_source_select; /**< src for time to dpll */ 4749 uint32 control_bit_offset_0; /**< Ctrl wd in 1st 66b in 257b. */ 4750 uint32 control_bit_offset_1; /**< Ctrl wd in 2nd 66b in 257b. */ 4751 uint32 control_bit_offset_2; /**< Ctrl wd in 3rd 66b in 257b. */ 4752 uint32 control_bit_offset_3; /**< Ctrl wd in 4th 66b in 257b. */ 4753 } cprimod_fec_timestamp_config_t; 4754 4755 /* cprimod_fec_timestamp_config_t initialization and validation */ 4756 int cprimod_fec_timestamp_config_t_validate(const cprimod_fec_timestamp_config_t* cprimod_fec_timestamp_config); 4757 int cprimod_fec_timestamp_config_t_init(cprimod_fec_timestamp_config_t* cprimod_fec_timestamp_config); 4758 4759 /*! 4760 * cprimod_cpri_port_fec_enable_set 4761 * 4762 * @brief Set/Get FEC enable. 4763 * 4764 * @param [in] unit - unit id 4765 * @param [in] port - logical port 4766 * @param [in] dir - TX/RX 4767 * @param [in] enable - Fec enable. 4768 */ 4769 int cprimod_cpri_port_fec_enable_set(int unit, int port, cprimod_direction_t dir, int enable); 4770 /*! 4771 * cprimod_cpri_port_fec_enable_get 4772 * 4773 * @brief Set/Get FEC enable. 4774 * 4775 * @param [in] unit - unit id 4776 * @param [in] port - logical port 4777 * @param [in] dir - TX/RX 4778 * @param [out] enable - Fec enable. 4779 */ 4780 int cprimod_cpri_port_fec_enable_get(int unit, int port, cprimod_direction_t dir, int* enable); 4781 4782 /*! 4783 * cprimod_cpri_port_fec_timestamp_config_set 4784 * 4785 * @brief Set/Get Fec timestamp config. 4786 * 4787 * @param [in] unit - unit id 4788 * @param [in] port - logical port 4789 * @param [in] dir - TX/RX 4790 * @param [in] config - Fec timestamp config. 4791 */ 4792 int cprimod_cpri_port_fec_timestamp_config_set(int unit, int port, cprimod_direction_t dir, const cprimod_fec_timestamp_config_t* config); 4793 /*! 4794 * cprimod_cpri_port_fec_timestamp_config_get 4795 * 4796 * @brief Set/Get Fec timestamp config. 4797 * 4798 * @param [in] unit - unit id 4799 * @param [in] port - logical port 4800 * @param [in] dir - TX/RX 4801 * @param [in] config - Fec timestamp config. 4802 */ 4803 int cprimod_cpri_port_fec_timestamp_config_get(int unit, int port, cprimod_direction_t dir, const cprimod_fec_timestamp_config_t* config); 4804 4805 /*! 4806 * cprimod_cpri_port_fec_aux_config_set 4807 * 4808 * @brief Set/Get Fec Auxiliry config. 4809 * 4810 * @param [in] unit - unit id 4811 * @param [in] port - logical port 4812 * @param [in] parameter_id - Auxiliry config type 4813 * @param [in] value - Auxiliry config value. 4814 */ 4815 int cprimod_cpri_port_fec_aux_config_set(int unit, int port, cprimod_fec_aux_config_para_t parameter_id, uint32 value); 4816 /*! 4817 * cprimod_cpri_port_fec_aux_config_get 4818 * 4819 * @brief Set/Get Fec Auxiliry config. 4820 * 4821 * @param [in] unit - unit id 4822 * @param [in] port - logical port 4823 * @param [in] parameter_id - Auxiliry config type 4824 * @param [in] value - Auxiliry config value. 4825 */ 4826 int cprimod_cpri_port_fec_aux_config_get(int unit, int port, cprimod_fec_aux_config_para_t parameter_id, const uint32* value); 4827 4828 4829 /*! 4830 * @struct cprimod_cpri_ecc_intr_info_s 4831 * @brief CPRI ECC error interrupt information report 4832 */ 4833 #ifdef CPRIMOD_SUPPORT 4834 typedef struct cprimod_cpri_ecc_intr_info_s { 4835 int port; /**< port */ 4836 soc_mem_t err_mem_info; /**< ecc error memory */ 4837 soc_reg_t ecc_reg_info; /**< ecc error register */ 4838 int ecc_num_bits_err; /**< num bits ecc error */ 4839 uint32 err_addr; /**< error address */ 4840 char* mem_str; /**< error address */ 4841 } cprimod_cpri_ecc_intr_info_t; 4842 4843 /* cprimod_cpri_ecc_intr_info_t initialization and validation */ 4844 int cprimod_cpri_ecc_intr_info_t_validate(const cprimod_cpri_ecc_intr_info_t* cprimod_cpri_ecc_intr_info); 4845 int cprimod_cpri_ecc_intr_info_t_init(cprimod_cpri_ecc_intr_info_t* cprimod_cpri_ecc_intr_info); 4846 4847 #endif /* CPRIMOD_SUPPORT */ 4848 #ifdef CPRIMOD_SUPPORT 4849 #define CPRIMOD_PM_ECC_ERR_NONE _shrCpriEccErrTypeNone 4850 #define CPRIMOD_PM_ECC_ERR_1_BIT _shrCpriEccErrType1Bit 4851 #define CPRIMOD_PM_ECC_ERR_2_BIT _shrCpriEccErrType2Bit 4852 #define CPRIMOD_PM_ECC_ERR_MULTI_BIT _shrCpriEccErrTypeMultiBit 4853 #endif /* CPRIMOD_SUPPORT */ 4854 4855 /*! 4856 * cprimod_cpri_port_ecc_interrupt_enable_set 4857 * 4858 * @brief Enable/Disable ECC interrupts. 4859 * 4860 * @param [in] unit - unit id 4861 * @param [in] port - logical port 4862 * @param [in] enable - enable/disable ECC interrupts 4863 */ 4864 #ifdef CPRIMOD_SUPPORT 4865 int cprimod_cpri_port_ecc_interrupt_enable_set(int unit, int port, int enable); 4866 #endif /* CPRIMOD_SUPPORT */ 4867 4868 /*! 4869 * cprimod_cpri_port_ecc_interrupt_status_get 4870 * 4871 * @brief ECC interrupt status and information get. 4872 * 4873 * @param [in] unit - unit id 4874 * @param [in] port - logical port 4875 * @param [in] ecc_err_info - ecc error info 4876 */ 4877 #ifdef CPRIMOD_SUPPORT 4878 int cprimod_cpri_port_ecc_interrupt_status_get(int unit, int port, const cprimod_cpri_ecc_intr_info_t* ecc_err_info); 4879 #endif /* CPRIMOD_SUPPORT */ 4880 4881 /*! 4882 * cprimod_cpri_port_ecc_interrupt_test 4883 * 4884 * @brief ECC interrupt tests. 4885 * 4886 * @param [in] unit - unit id 4887 * @param [in] port - logical port 4888 */ 4889 #ifdef CPRIMOD_SUPPORT_ECC_INJECT 4890 int cprimod_cpri_port_ecc_interrupt_test(int unit, int port); 4891 #endif /* CPRIMOD_SUPPORT_ECC_INJECT */ 4892 4893 /*! 4894 * cprimod_cpri_pll_status_get 4895 * 4896 * @brief Set/Get Fec timestamp config. 4897 * 4898 * @param [in] unit - unit id 4899 * @param [in] port - logical port 4900 * @param [in] phy - phy access for PMD 4901 * @param [out] pll_sel - PLL select(0 or 1). 4902 * @param [out] pll_lock - Is PLL Locked. 4903 */ 4904 int cprimod_cpri_pll_status_get(int unit, int port, const phymod_phy_access_t* phy, int* pll_sel, int* pll_lock); 4905 4906 /*! 4907 * cprimod_cpri_port_reset_set 4908 * 4909 * @brief Set/Get Reset port value active 1. 4910 * 4911 * @param [in] unit - unit id 4912 * @param [in] port - logical port 4913 * @param [in] rst - Reset value active 1 4914 */ 4915 int cprimod_cpri_port_reset_set(int unit, int port, int rst); 4916 /*! 4917 * cprimod_cpri_port_reset_get 4918 * 4919 * @brief Set/Get Reset port value active 1. 4920 * 4921 * @param [in] unit - unit id 4922 * @param [in] port - logical port 4923 * @param [out] rst - Reset value active 1 4924 */ 4925 int cprimod_cpri_port_reset_get(int unit, int port, int* rst); 4926 4927 /*! 4928 * cprimod_cpri_init 4929 * 4930 * @brief Reset cpri port 4931 * 4932 * @param [in] unit - unit id 4933 * @param [in] port - logical port 4934 */ 4935 int cprimod_cpri_init(int unit, int port); 4936 4937 /*! 4938 * cprimod_cpri_port_rx_gcw_word_get 4939 * 4940 * @brief Get Rx GCW word 4941 * 4942 * @param [in] unit - unit id 4943 * @param [in] port - logical port 4944 * @param [in] group_index - GCW group index 4945 * @param [out] gcw_word - GCW word. 4946 */ 4947 int cprimod_cpri_port_rx_gcw_word_get(int unit, int port, int group_index, uint16* gcw_word); 4948 4949 /*! 4950 * cprimod_cpri_port_tx_gcw_word_set 4951 * 4952 * @brief Get Tx GCW word 4953 * 4954 * @param [in] unit - unit id 4955 * @param [in] port - logical port 4956 * @param [in] group_index - GCW group index 4957 * @param [in] gcw_word - GCW word. 4958 */ 4959 int cprimod_cpri_port_tx_gcw_word_set(int unit, int port, int group_index, uint16 gcw_word); 4960 4961 /*! 4962 * cprimod_cpri_mac_drain_start 4963 * 4964 * @brief CPRI MAC Drain Start 4965 * 4966 * @param [in] unit - unit id 4967 * @param [in] port - logical port 4968 */ 4969 int cprimod_cpri_mac_drain_start(int unit, int port); 4970 4971 /*! 4972 * cprimod_cpri_mac_drain_stop 4973 * 4974 * @brief CPRI MAC Drain Stop 4975 * 4976 * @param [in] unit - unit id 4977 * @param [in] port - logical port 4978 */ 4979 int cprimod_cpri_mac_drain_stop(int unit, int port); 4980 4981 /*! 4982 * cprimod_cpri_mac_credit_reset_set 4983 * 4984 * @brief Set/Get Reset CPRI MAC EP credit . 4985 * 4986 * @param [in] unit - unit id 4987 * @param [in] port - logical port 4988 * @param [in] rst - Reset value active 1 4989 */ 4990 int cprimod_cpri_mac_credit_reset_set(int unit, int port, int rst); 4991 /*! 4992 * cprimod_cpri_mac_credit_reset_get 4993 * 4994 * @brief Set/Get Reset CPRI MAC EP credit . 4995 * 4996 * @param [in] unit - unit id 4997 * @param [in] port - logical port 4998 * @param [out] rst - Reset value active 1 4999 */ 5000 int cprimod_cpri_mac_credit_reset_get(int unit, int port, int* rst); 5001 5002 /*! 5003 * cprimod_cpri_port_link_up_event 5004 * 5005 * @brief Port link UP event 5006 * 5007 * @param [in] unit - unit id 5008 * @param [in] port - logical port 5009 */ 5010 int cprimod_cpri_port_link_up_event(int unit, int port); 5011 5012 /*! 5013 * cprimod_cpri_port_link_down_event 5014 * 5015 * @brief Port link down event 5016 * 5017 * @param [in] unit - unit id 5018 * @param [in] port - logical port 5019 */ 5020 int cprimod_cpri_port_link_down_event(int unit, int port); 5021 5022 5023 /*! 5024 * @enum cprimod_agnostic_mode_type_e 5025 * @brief Identify Agnostic Mode Type. 5026 */ 5027 typedef enum cprimod_agnostic_mode_type_e { 5028 cprimod_agnostic_mode_cpri, 5029 cprimod_agnostic_mode_rsvd4, 5030 cprimod_agnostic_mode_tunnel, 5031 cprimod_agnostic_mode_Count 5032 } cprimod_agnostic_mode_type_t; 5033 5034 #ifdef CPRIMOD_DIAG 5035 extern enum_mapping_t cprimod_agnostic_mode_type_t_mapping[]; 5036 #endif /*CPRIMOD_DIAG*/ 5037 5038 /* cprimod_agnostic_mode_type_t validation */ 5039 int cprimod_agnostic_mode_type_t_validate(cprimod_agnostic_mode_type_t cprimod_agnostic_mode_type); 5040 /*! 5041 * cprimod_cpri_port_rx_tunnel_mode_set 5042 * 5043 * @brief Set/Get Port Rx Tunnel Mode Config. 5044 * 5045 * @param [in] unit - unit id 5046 * @param [in] port - logical port 5047 * @param [in] enable - Tunnel Mode Enable/Disable 5048 * @param [in] payload_size - Payload Size in bits 5049 */ 5050 int cprimod_cpri_port_rx_tunnel_mode_set(int unit, int port, int enable, uint32 payload_size); 5051 /*! 5052 * cprimod_cpri_port_rx_tunnel_mode_get 5053 * 5054 * @brief Set/Get Port Rx Tunnel Mode Config. 5055 * 5056 * @param [in] unit - unit id 5057 * @param [in] port - logical port 5058 * @param [out] enable - Tunnel Mode Enable/Disable 5059 * @param [out] payload_size - Payload Size in bits 5060 */ 5061 int cprimod_cpri_port_rx_tunnel_mode_get(int unit, int port, int* enable, uint32* payload_size); 5062 5063 /*! 5064 * cprimod_cpri_port_tx_agnostic_mode_set 5065 * 5066 * @brief Set/Get Port Tx Agnostic Mode Config. 5067 * 5068 * @param [in] unit - unit id 5069 * @param [in] port - logical port 5070 * @param [in] enable - Tunnel Mode Enable/Disable 5071 * @param [in] mode - Tunnel Mode Enable/Disable 5072 * @param [in] payload_size - Payload Size in bits 5073 */ 5074 int cprimod_cpri_port_tx_agnostic_mode_set(int unit, int port, int enable, cprimod_agnostic_mode_type_t mode, uint32 payload_size); 5075 /*! 5076 * cprimod_cpri_port_tx_agnostic_mode_get 5077 * 5078 * @brief Set/Get Port Tx Agnostic Mode Config. 5079 * 5080 * @param [in] unit - unit id 5081 * @param [in] port - logical port 5082 * @param [out] enable - Tunnel Mode Enable/Disable 5083 * @param [out] mode - Tunnel Mode Enable/Disable 5084 * @param [out] payload_size - Payload Size in bits 5085 */ 5086 int cprimod_cpri_port_tx_agnostic_mode_get(int unit, int port, int* enable, cprimod_agnostic_mode_type_t* mode, uint32* payload_size); 5087 5088 /*! 5089 * cprimod_cpri_port_rx_agnostic_mode_get 5090 * 5091 * @brief Get Port Rx Framer Agnostic Mode Config. 5092 * 5093 * @param [in] unit - unit id 5094 * @param [in] port - logical port 5095 * @param [out] enable - Framer Agnostic Mode Enable/Disable 5096 * @param [out] mode - Agnostic Mode CPRI/RSVD4/TUNNEL 5097 */ 5098 int cprimod_cpri_port_rx_agnostic_mode_get(int unit, int port, int* enable, cprimod_agnostic_mode_type_t* mode); 5099 5100 5101 /*! 5102 * @enum cprimod_pmd_port_status_e 5103 * @brief PMD Port Status. 5104 */ 5105 typedef enum cprimod_pmd_port_status_e { 5106 cprimodPmdPortStatusTxClockValid, 5107 cprimodPmdPortStatusRxClockValid, 5108 cprimodPmdPortStatusRxLock, 5109 cprimodPmdPortStatusEnergyDetected, 5110 cprimodPmdPortStatusSignalDetected, 5111 cprimodPmdPortStatusCount 5112 } cprimod_pmd_port_status_t; 5113 5114 #ifdef CPRIMOD_DIAG 5115 extern enum_mapping_t cprimod_pmd_port_status_t_mapping[]; 5116 #endif /*CPRIMOD_DIAG*/ 5117 5118 /* cprimod_pmd_port_status_t validation */ 5119 int cprimod_pmd_port_status_t_validate(cprimod_pmd_port_status_t cprimod_pmd_port_status); 5120 /*! 5121 * cprimod_port_pmd_status_get 5122 * 5123 * @brief Get PMD Port Status. 5124 * 5125 * @param [in] unit - unit id 5126 * @param [in] port - logical port 5127 * @param [in] status - PMD Port Status Attribute. 5128 * @param [out] value - Status of the selected attribute.. 5129 */ 5130 int cprimod_port_pmd_status_get(int unit, int port, cprimod_pmd_port_status_t status, uint32* value); 5131 5132 /*! 5133 * cprimod_cpri_port_link_get 5134 * 5135 * @brief Get CPRI Port Link Status. 5136 * 5137 * @param [in] unit - unit id 5138 * @param [in] port - logical port 5139 * @param [out] link - Link status for CPRI port.. 5140 */ 5141 int cprimod_cpri_port_link_get(int unit, int port, int* link); 5142 5143 typedef _shr_cpri_roe_header_field_t cprimod_cpri_roe_header_field_t; 5144 5145 #ifdef CPRIMOD_SUPPORT 5146 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_SUBTYPE _shrCpriRoeHeaderFieldSubType 5147 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_FLOW_ID _shrCpriRoeHeaderFieldFlowID 5148 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_LENGTH_15_8 _shrCpriRoeHeaderFieldLength_15_8 5149 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_LENGTH_7_0 _shrCpriRoeHeaderFieldLength_7_0 5150 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_ORDER_INFO_31_24 _shrCpriRoeHeaderFieldOrderInfo_32_24 5151 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_ORDER_INFO_23_16 _shrCpriRoeHeaderFieldOrderInfo_23_16 5152 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_ORDER_INFO_15_8 _shrCpriRoeHeaderFieldOrderInfo_15_8 5153 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_ORDER_INFO_7_0 _shrCpriRoeHeaderFieldOrderInfo_7_0 5154 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_OPCODE _shrCpriRoeHeaderFieldOpcode 5155 #define CPRIMOD_CPRI_ROE_HEADER_FIELD_UNMAPPED _shrCpriRoeHeaderFieldUnmapped 5156 #endif /* CPRIMOD_SUPPORT */ 5157 5158 typedef _shr_cpri_ecpri_header_field_t cprimod_cpri_ecpri_header_field_t; 5159 5160 #ifdef CPRIMOD_SUPPORT 5161 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_0 _shrCpriEcpriHeaderFieldByte0 5162 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_1 _shrCpriEcpriHeaderFieldByte1 5163 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_2 _shrCpriEcpriHeaderFieldByte2 5164 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_3 _shrCpriEcpriHeaderFieldByte3 5165 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_4 _shrCpriEcpriHeaderFieldByte4 5166 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_5 _shrCpriEcpriHeaderFieldByte5 5167 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_6 _shrCpriEcpriHeaderFieldByte6 5168 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_7 _shrCpriEcpriHeaderFieldByte7 5169 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_8 _shrCpriEcpriHeaderFieldByte8 5170 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_9 _shrCpriEcpriHeaderFieldByte9 5171 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_10 _shrCpriEcpriHeaderFieldByte10 5172 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_BYTE_11 _shrCpriEcpriHeaderFieldByte11 5173 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_VLAN_0_BYTE_0 _shrCpriEcpriHeaderFieldVlan0Byte0 5174 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_VLAN_0_BYTE_1 _shrCpriEcpriHeaderFieldVlan0Byte1 5175 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_VLAN_1_BYTE_0 _shrCpriEcpriHeaderFieldVlan1Byte0 5176 #define CPRIMOD_CPRI_ECPRI_HEADER_FIELD_VLAN_1_BYTE_1 _shrCpriEcpriHeaderFieldVlan1Byte1 5177 #endif /* CPRIMOD_SUPPORT */ 5178 5179 #ifdef CPRIMOD_SUPPORT 5180 typedef struct cprimod_cpri_encap_header_field_mapping_s { 5181 cprimod_cpri_roe_header_field_t hdr_byte0_sel; /**< RoE field id for byte */ 5182 cprimod_cpri_roe_header_field_t hdr_byte1_sel; /**< RoE field id for byte */ 5183 cprimod_cpri_roe_header_field_t hdr_byte2_sel; /**< RoE field id for byte */ 5184 cprimod_cpri_roe_header_field_t hdr_byte3_sel; /**< RoE field id for byte */ 5185 cprimod_cpri_roe_header_field_t hdr_byte4_sel; /**< RoE field id for byte */ 5186 cprimod_cpri_roe_header_field_t hdr_byte5_sel; /**< RoE field id for byte */ 5187 cprimod_cpri_roe_header_field_t hdr_byte6_sel; /**< RoE field id for byte */ 5188 cprimod_cpri_roe_header_field_t hdr_byte7_sel; /**< RoE field id for byte */ 5189 cprimod_cpri_roe_header_field_t hdr_byte8_sel; /**< RoE field id for byte */ 5190 cprimod_cpri_roe_header_field_t hdr_byte9_sel; /**< RoE field id for byte */ 5191 cprimod_cpri_roe_header_field_t hdr_byte10_sel; /**< RoE field id for byte */ 5192 cprimod_cpri_roe_header_field_t hdr_byte11_sel; /**< Roe field id for byte */ 5193 } cprimod_cpri_encap_header_field_mapping_t; 5194 5195 /* cprimod_cpri_encap_header_field_mapping_t initialization and validation */ 5196 int cprimod_cpri_encap_header_field_mapping_t_validate(const cprimod_cpri_encap_header_field_mapping_t* cprimod_cpri_encap_header_field_mapping); 5197 int cprimod_cpri_encap_header_field_mapping_t_init(cprimod_cpri_encap_header_field_mapping_t* cprimod_cpri_encap_header_field_mapping); 5198 5199 #endif /* CPRIMOD_SUPPORT */ 5200 #ifdef CPRIMOD_SUPPORT 5201 typedef struct cprimod_cpri_decap_header_field_mapping_s { 5202 cprimod_cpri_ecpri_header_field_t subtype_sel; /**< eCPRI field id for byte */ 5203 cprimod_cpri_ecpri_header_field_t flowid_sel; /**< eCPRI field id for byte */ 5204 cprimod_cpri_ecpri_header_field_t length_15_8_sel; /**< eCPRI field id for byte */ 5205 cprimod_cpri_ecpri_header_field_t length_7_0_sel; /**< eCPRI field id for byte */ 5206 cprimod_cpri_ecpri_header_field_t orderinginfo_31_24_sel; /**< eCPRI field id for byte */ 5207 cprimod_cpri_ecpri_header_field_t orderinginfo_23_16_sel; /**< eCPRI field id for byte */ 5208 cprimod_cpri_ecpri_header_field_t orderinginfo_15_8_sel; /**< eCPRI field id for byte */ 5209 cprimod_cpri_ecpri_header_field_t orderinginfo_7_0_sel; /**< eCPRI field id for byte */ 5210 } cprimod_cpri_decap_header_field_mapping_t; 5211 5212 /* cprimod_cpri_decap_header_field_mapping_t initialization and validation */ 5213 int cprimod_cpri_decap_header_field_mapping_t_validate(const cprimod_cpri_decap_header_field_mapping_t* cprimod_cpri_decap_header_field_mapping); 5214 int cprimod_cpri_decap_header_field_mapping_t_init(cprimod_cpri_decap_header_field_mapping_t* cprimod_cpri_decap_header_field_mapping); 5215 5216 #endif /* CPRIMOD_SUPPORT */ 5217 /*! 5218 * cprimod_cpri_encap_header_field_mapping_set 5219 * 5220 * @brief Set/Get encap header field mapping. 5221 * 5222 * @param [in] unit - unit id 5223 * @param [in] port - logical port 5224 * @param [in] mapping - Encap Mapping information. 5225 */ 5226 #ifdef CPRIMOD_SUPPORT 5227 int cprimod_cpri_encap_header_field_mapping_set(int unit, int port, const cprimod_cpri_encap_header_field_mapping_t* mapping); 5228 #endif /* CPRIMOD_SUPPORT */ 5229 /*! 5230 * cprimod_cpri_encap_header_field_mapping_get 5231 * 5232 * @brief Set/Get encap header field mapping. 5233 * 5234 * @param [in] unit - unit id 5235 * @param [in] port - logical port 5236 * @param [out] mapping - Encap Mapping information. 5237 */ 5238 #ifdef CPRIMOD_SUPPORT 5239 int cprimod_cpri_encap_header_field_mapping_get(int unit, int port, cprimod_cpri_encap_header_field_mapping_t* mapping); 5240 #endif /* CPRIMOD_SUPPORT */ 5241 5242 /*! 5243 * cprimod_cpri_decap_header_field_mapping_set 5244 * 5245 * @brief Set/Get decap headeir field mapping. 5246 * 5247 * @param [in] unit - unit id 5248 * @param [in] port - logical port 5249 * @param [in] mapping - Decap Mapping information. 5250 */ 5251 #ifdef CPRIMOD_SUPPORT 5252 int cprimod_cpri_decap_header_field_mapping_set(int unit, int port, const cprimod_cpri_decap_header_field_mapping_t* mapping); 5253 #endif /* CPRIMOD_SUPPORT */ 5254 /*! 5255 * cprimod_cpri_decap_header_field_mapping_get 5256 * 5257 * @brief Set/Get decap headeir field mapping. 5258 * 5259 * @param [in] unit - unit id 5260 * @param [in] port - logical port 5261 * @param [out] mapping - Decap Mapping information. 5262 */ 5263 #ifdef CPRIMOD_SUPPORT 5264 int cprimod_cpri_decap_header_field_mapping_get(int unit, int port, cprimod_cpri_decap_header_field_mapping_t* mapping); 5265 #endif /* CPRIMOD_SUPPORT */ 5266 5267 /*! 5268 * cprimod_cpri_header_field_adjustment_config_set 5269 * 5270 * @brief Set/Get decap headeir field mapping. 5271 * 5272 * @param [in] unit - unit id 5273 * @param [in] port - logical port 5274 * @param [in] dir - Dirction Rx or Tx. 5275 * @param [in] ext_hdr_enable - Extended Header Enable, extra 4 bytes.. 5276 * @param [in] len_field_adj - Length Field Adjustment.. 5277 */ 5278 #ifdef CPRIMOD_SUPPORT 5279 int cprimod_cpri_header_field_adjustment_config_set(int unit, int port, cprimod_direction_t dir, int ext_hdr_enable, int len_field_adj); 5280 #endif /* CPRIMOD_SUPPORT */ 5281 /*! 5282 * cprimod_cpri_header_field_adjustment_config_get 5283 * 5284 * @brief Set/Get decap headeir field mapping. 5285 * 5286 * @param [in] unit - unit id 5287 * @param [in] port - logical port 5288 * @param [in] dir - Dirction Rx or Tx. 5289 * @param [out] ext_hdr_enable - Extended Header Enable, extra 4 bytes.. 5290 * @param [out] len_field_adj - Length Field Adjustment.. 5291 */ 5292 #ifdef CPRIMOD_SUPPORT 5293 int cprimod_cpri_header_field_adjustment_config_get(int unit, int port, cprimod_direction_t dir, int* ext_hdr_enable, int* len_field_adj); 5294 #endif /* CPRIMOD_SUPPORT */ 5295 5296 /*! 5297 * cprimod_cpri_decap_header_field_mask_set 5298 * 5299 * @brief Set/Get decap headeir field mapping. 5300 * 5301 * @param [in] unit - unit id 5302 * @param [in] port - logical port 5303 * @param [in] field_id - RoE Field Type. 5304 * @param [in] mask - Decap Field Mask. 5305 */ 5306 #ifdef CPRIMOD_SUPPORT 5307 int cprimod_cpri_decap_header_field_mask_set(int unit, int port, cprimod_cpri_roe_header_field_t field_id, uint32 mask); 5308 #endif /* CPRIMOD_SUPPORT */ 5309 /*! 5310 * cprimod_cpri_decap_header_field_mask_get 5311 * 5312 * @brief Set/Get decap headeir field mapping. 5313 * 5314 * @param [in] unit - unit id 5315 * @param [in] port - logical port 5316 * @param [in] field_id - RoE Field Type. 5317 * @param [out] mask - Decap Field Mask. 5318 */ 5319 #ifdef CPRIMOD_SUPPORT 5320 int cprimod_cpri_decap_header_field_mask_get(int unit, int port, cprimod_cpri_roe_header_field_t field_id, uint32* mask); 5321 #endif /* CPRIMOD_SUPPORT */ 5322 5323 /*! 5324 * cprimod_cpri_port_compression_saturation_config_set 5325 * 5326 * @brief Setting the compression saturation threshold. 5327 * 5328 * @param [in] unit - unit id 5329 * @param [in] port - logical port 5330 * @param [in] threshold_value - Threshold Value 5331 */ 5332 #ifdef CPRIMOD_SUPPORT 5333 int cprimod_cpri_port_compression_saturation_config_set(int unit, int port, uint32 threshold_value); 5334 #endif /* CPRIMOD_SUPPORT */ 5335 /*! 5336 * cprimod_cpri_port_compression_saturation_config_get 5337 * 5338 * @brief Setting the compression saturation threshold. 5339 * 5340 * @param [in] unit - unit id 5341 * @param [in] port - logical port 5342 * @param [out] threshold_value - Threshold Value 5343 */ 5344 #ifdef CPRIMOD_SUPPORT 5345 int cprimod_cpri_port_compression_saturation_config_get(int unit, int port, uint32* threshold_value); 5346 #endif /* CPRIMOD_SUPPORT */ 5347 5348 /*! 5349 * cprimod_cpri_port_decompression_saturation_config_set 5350 * 5351 * @brief Setting the decompression saturation value. 5352 * 5353 * @param [in] unit - unit id 5354 * @param [in] port - logical port 5355 * @param [in] sat_value - Saturation Value 5356 */ 5357 #ifdef CPRIMOD_SUPPORT 5358 int cprimod_cpri_port_decompression_saturation_config_set(int unit, int port, uint32 sat_value); 5359 #endif /* CPRIMOD_SUPPORT */ 5360 /*! 5361 * cprimod_cpri_port_decompression_saturation_config_get 5362 * 5363 * @brief Setting the decompression saturation value. 5364 * 5365 * @param [in] unit - unit id 5366 * @param [in] port - logical port 5367 * @param [out] sat_value - Saturation Value 5368 */ 5369 #ifdef CPRIMOD_SUPPORT 5370 int cprimod_cpri_port_decompression_saturation_config_get(int unit, int port, uint32* sat_value); 5371 #endif /* CPRIMOD_SUPPORT */ 5372 5373 /*! 5374 * cprimod_rsvd4_tx_padding_size_set 5375 * 5376 * @brief Set/Get RSVD4 padding size. 5377 * 5378 * @param [in] unit - unit id 5379 * @param [in] port - logical port 5380 * @param [in] padding_size - Padding Size in Bytes 5381 */ 5382 #ifdef CPRIMOD_SUPPORT 5383 int cprimod_rsvd4_tx_padding_size_set(int unit, int port, uint32 padding_size); 5384 #endif /* CPRIMOD_SUPPORT */ 5385 /*! 5386 * cprimod_rsvd4_tx_padding_size_get 5387 * 5388 * @brief Set/Get RSVD4 padding size. 5389 * 5390 * @param [in] unit - unit id 5391 * @param [in] port - logical port 5392 * @param [out] padding_size - Padding Size is Bytes 5393 */ 5394 #ifdef CPRIMOD_SUPPORT 5395 int cprimod_rsvd4_tx_padding_size_get(int unit, int port, uint32* padding_size); 5396 #endif /* CPRIMOD_SUPPORT */ 5397 5398 #endif /*_CPRIMOD_H_*/