cprif.h (39271B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #ifndef _CPRIF_H__H_ 14 #define _CPRIF_H__H_ 15 16 #include <soc/types.h> 17 #include <bcm/types.h> 18 #include <shared/cpri.h> 19 #include <phymod/phymod.h> 20 #include <phymod/phymod_diagnostics.h> 21 /*test api dispatch*/ 22 int cprif_test_api_dispatch(int unit, int port, int* value); 23 24 /* Get/Set Basic Frame set active table number and number of valid entries. */ 25 int cprif_basic_frame_parser_active_table_set(int unit, int port, cprimod_basic_frame_table_id_t table, int sync_enable); 26 int cprif_basic_frame_parser_active_table_get(int unit, int port, cprimod_basic_frame_table_id_t* table); 27 28 /* Get/Set Basic Frame set active table number and number of valid entries. */ 29 int cprif_basic_frame_parser_table_num_entries_set(int unit, int port, cprimod_basic_frame_table_id_t table, uint32 num_entries); 30 int cprif_basic_frame_parser_table_num_entries_get(int unit, int port, cprimod_basic_frame_table_id_t table, uint32* num_entries); 31 32 /* Get/Set Basic Frame set active table number and number of valid entries. */ 33 int cprif_basic_frame_assembly_active_table_set(int unit, int port, cprimod_basic_frame_table_id_t table, int sync_enable); 34 int cprif_basic_frame_assembly_active_table_get(int unit, int port, cprimod_basic_frame_table_id_t* table); 35 36 /* Get/Set Basic Frame set active table number and number of valid entries. */ 37 int cprif_basic_frame_assembly_table_num_entries_set(int unit, int port, cprimod_basic_frame_table_id_t table, uint32 num_entries); 38 int cprif_basic_frame_assembly_table_num_entries_get(int unit, int port, cprimod_basic_frame_table_id_t table, uint32* num_entries); 39 40 /* Switch Basic Frame Table between active and standby, without syncing. */ 41 int cprif_basic_frame_parser_switch_active_table(int unit, int port); 42 43 /* Switch Basic Frame Table between active and standby, without syncing. */ 44 int cprif_basic_frame_assembly_switch_active_table(int unit, int port); 45 46 /* Add AxC Rx Basic Frame to Shadow Table */ 47 int cprif_rx_axc_basic_frame_add(int unit, int port, uint32 axc_id, uint32 start_bit, uint32 num_bit); 48 49 /* Delete AxC Rx Basic Frame from Shadow Table */ 50 int cprif_rx_axc_basic_frame_delete(int unit, int port, uint32 axc_id); 51 52 /* Clear all the AxC from the Basic Frame Parser Shadow Table. */ 53 int cprif_rx_axc_basic_frame_clear(int unit, int port); 54 55 /* Retrieve AxC Rx Basic Frame from Table */ 56 int cprif_rx_axc_basic_frame_get(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t table, cprimod_basic_frame_usage_entry_t* usage_table, int* num_entries); 57 58 /* Add AxC Rx Basic Frame to Shadow Table */ 59 int cprif_tx_axc_basic_frame_add(int unit, int port, uint32 axc_id, uint32 start_bit, uint32 num_bit); 60 61 /* Delete AxC Rx Basic Frame from Shadow Table */ 62 int cprif_tx_axc_basic_frame_delete(int unit, int port, uint32 axc_id); 63 64 /* Clear all the AxC from the Basic Frame Assembly Shadow Table. */ 65 int cprif_tx_axc_basic_frame_clear(int unit, int port); 66 67 /* Retrieve AxC Rx Basic Frame from Table */ 68 int cprif_tx_axc_basic_frame_get(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t table, cprimod_basic_frame_usage_entry_t* usage_table, int* num_entries); 69 70 /* Debug API for Basic Frame. */ 71 int cprif_basic_frame_debug(int unit, int port, uint32 axc_id, cprimod_basic_frame_table_id_t rx_table, cprimod_basic_frame_table_id_t tx_table, uint32 flags); 72 73 /* Debug API for Basic Frame. */ 74 int cprif_cpri_rx_axc_container_config_set(int unit, int port, uint32 axc_id, const cprimod_cpri_container_config_t* config_info); 75 int cprif_cpri_rx_axc_container_config_get(int unit, int port, uint32 axc_id, cprimod_cpri_container_config_t* config_info); 76 77 /* Debug API for Basic Frame. */ 78 int cprif_cpri_tx_axc_container_config_set(int unit, int port, uint32 axc_id, const cprimod_cpri_container_config_t* config_info); 79 int cprif_cpri_tx_axc_container_config_get(int unit, int port, uint32 axc_id, cprimod_cpri_container_config_t* config_info); 80 81 /* Debug API for Basic Frame. */ 82 int cprif_rsvd4_rx_axc_container_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_container_config_t* config_info); 83 int cprif_rsvd4_rx_axc_container_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_container_config_t* config_info); 84 85 /* Debug API for Basic Frame. */ 86 int cprif_rsvd4_tx_axc_container_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_container_config_t* config_info); 87 int cprif_rsvd4_tx_axc_container_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_container_config_t* config_info); 88 89 /* Rx ROE payload size config. */ 90 int cprif_rx_roe_payload_size_set(int unit, int port, uint32 axc_id, const cprimod_payload_size_info_t* config_info); 91 int cprif_rx_roe_payload_size_get(int unit, int port, uint32 axc_id, cprimod_payload_size_info_t* config_info); 92 93 /* Tx ROE payload size config. */ 94 int cprif_tx_roe_payload_size_set(int unit, int port, uint32 axc_id, const cprimod_payload_size_info_t* config_info); 95 int cprif_tx_roe_payload_size_get(int unit, int port, uint32 axc_id, cprimod_payload_size_info_t* config_info); 96 97 /* Encapsulation Data Manipulation Configuration. */ 98 int cprif_cpri_encap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_decap_data_config_t* config_info); 99 int cprif_cpri_encap_data_config_get(int unit, int port, uint32 queue_num, cprimod_encap_decap_data_config_t* config_info); 100 101 /* Decapsulation Data Manipulation Configuration. */ 102 int cprif_cpri_decap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_decap_data_config_t* config_info); 103 int cprif_cpri_decap_data_config_get(int unit, int port, uint32 queue_num, cprimod_encap_decap_data_config_t* config_info); 104 105 /* Encapsulation Data Manipulation Configuration. */ 106 int cprif_rsvd4_encap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_rsvd4_encap_data_config_t* config_info); 107 int cprif_rsvd4_encap_data_config_get(int unit, int port, uint32 queue_num, cprimod_rsvd4_encap_data_config_t* config_info); 108 109 /* Decapsulation Data Manipulation Configuration. */ 110 int cprif_rsvd4_decap_data_config_set(int unit, int port, uint32 queue_num, const cprimod_rsvd4_decap_data_config_t* config_info); 111 int cprif_rsvd4_decap_data_config_get(int unit, int port, uint32 queue_num, cprimod_rsvd4_decap_data_config_t* config_info); 112 113 /* Encapsulation Header Configuration. */ 114 int cprif_encap_header_config_set(int unit, int port, uint32 queue_num, const cprimod_encap_header_config_t* config_info); 115 int cprif_encap_header_config_get(int unit, int port, uint32 queue_num, cprimod_encap_header_config_t* config_info); 116 117 /* Encapsulation Header Configuration. */ 118 int cprif_rx_rsvd4_gsm_tsn_bitmap_set(int unit, int port, uint32 queue_num, uint32 tsn_bitmap); 119 int cprif_rx_rsvd4_gsm_tsn_bitmap_get(int unit, int port, uint32 queue_num, uint32* tsn_bitmap); 120 121 /* Encapsulation Header Configuration. */ 122 int cprif_encap_ordering_info_entry_set(int unit, int port, uint32 index, const cprimod_encap_ordering_info_entry_t* user_entry); 123 int cprif_encap_ordering_info_entry_get(int unit, int port, uint32 index, cprimod_encap_ordering_info_entry_t* user_entry); 124 125 /* Encapsulation Header Configuration. */ 126 int cprif_decap_ordering_info_entry_set(int unit, int port, uint32 index, const cprimod_decap_ordering_info_entry_t* user_entry); 127 int cprif_decap_ordering_info_entry_get(int unit, int port, uint32 index, cprimod_decap_ordering_info_entry_t* user_entry); 128 129 /* Encapsulation Order Info Offset, _get() user need to provide p_size and q_size. */ 130 int cprif_encap_ordering_info_sequence_offset_set(int unit, int port, uint32 queue, uint32 control, const cprimod_cpri_ordering_info_offset_t* offset_entry); 131 int cprif_encap_ordering_info_sequence_offset_get(int unit, int port, uint32 queue, uint32 control, uint32 pcnt_size, uint32 qcnt_size, cprimod_cpri_ordering_info_offset_t* offset_entry); 132 133 /* Decapsulation Order Info Offset, _get() user need to provide p_size and q_size. */ 134 int cprif_decap_ordering_info_sequence_offset_set(int unit, int port, uint32 queue, const cprimod_cpri_ordering_info_offset_t* offset_entry); 135 int cprif_decap_ordering_info_sequence_offset_get(int unit, int port, uint32 queue, uint32 pcnt_size, uint32 qcnt_size, cprimod_cpri_ordering_info_offset_t* offset_entry); 136 137 /* Destination MAC Addr. */ 138 int cprif_encap_mac_da_entry_set(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 139 int cprif_encap_mac_da_entry_get(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 140 141 /* Source MAC Addr. */ 142 int cprif_encap_mac_sa_entry_set(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 143 int cprif_encap_mac_sa_entry_get(int unit, int port, uint32 index, cprimod_mac_addr_t addr); 144 145 /* VLAN ID Entry. */ 146 int cprif_encap_vlan_id_entry_set(int unit, int port, cprimod_vlan_table_id_t table_id, uint32 index, uint32 vlan_id); 147 int cprif_encap_vlan_id_entry_get(int unit, int port, cprimod_vlan_table_id_t table_id, uint32 index, uint32* vlan_id); 148 149 /* Decap Ethertype Set/Get. */ 150 int cprif_decap_ethertype_config_set(int unit, int port, cprimod_ethertype_t type_id, uint16 ethertype); 151 int cprif_decap_ethertype_config_get(int unit, int port, cprimod_ethertype_t type_id, uint16* ethertype); 152 153 /* Encap Ethtype Set/Get. */ 154 int cprif_encap_ethertype_config_set(int unit, int port, cprimod_ethertype_t type_id, uint16 ethertype); 155 int cprif_encap_ethertype_config_get(int unit, int port, cprimod_ethertype_t type_id, uint16* ethertype); 156 157 /* Clear the internal queue and memory processing */ 158 int cprif_encap_memory_clear(int unit, int port, int queue_num); 159 160 /* Clear the internal state of framer and container processing */ 161 int cprif_cpri_rx_framer_state_clear(int unit, int port, int queue_num); 162 163 /* Clear the internal queue and memory processing */ 164 int cprif_decap_memory_clear(int unit, int port, int queue_num); 165 166 /* Clear the internal state of framer and container processing */ 167 int cprif_cpri_tx_framer_state_clear(int unit, int port, int queue_num); 168 169 /* Set Flow Classification, Subtype to Queue Mapping. */ 170 int cprif_decap_flow_classification_config_set(int unit, int port, uint8 subtype, uint32 queue_num, cprimod_cls_option_t cls_option, cprimod_cls_flow_type_t flow_type); 171 int cprif_decap_flow_classification_config_get(int unit, int port, uint8 subtype, uint32* queue_num, cprimod_cls_option_t* cls_option, cprimod_cls_flow_type_t* flow_type); 172 173 /* Set/Get Flow to Queue Mapping. */ 174 int cprif_decap_flow_to_queue_mapping_set(int unit, int port, uint32 flow_id, uint32 queue_num); 175 int cprif_decap_flow_to_queue_mapping_get(int unit, int port, uint32 flow_id, uint32* queue_num); 176 177 /* Set/Get Queue to Ordering info Table Index Mapping. */ 178 int cprif_decap_queue_to_ordering_info_index_mapping_set(int unit, int port, uint32 queue_num, uint32 ordering_info_index); 179 int cprif_decap_queue_to_ordering_info_index_mapping_get(int unit, int port, uint32 queue_num, uint32* ordering_info_index); 180 181 /* Tx Framer TGEN tick configuration. */ 182 int cprif_tx_framer_tgen_tick_set(int unit, int port, uint32 divider, uint32 basic_frame_tick, uint32 tick_bitmap, uint32 tick_bitmap_size); 183 int cprif_tx_framer_tgen_tick_get(int unit, int port, uint32* divider, uint32* basic_frame_tick, uint32* tick_bitmap, uint32* tick_bitmap_size); 184 185 /* Tx Framer Tgen Enable/Disable set. */ 186 int cprif_tx_framer_tgen_enable(int unit, int port, uint8 enable); 187 188 /* Tx Framer offset to start TGEN. */ 189 int cprif_tx_framer_tgen_offset_set(int unit, int port, uint64 timestamp_offset); 190 int cprif_tx_framer_tgen_offset_get(int unit, int port, uint64* timestamp_offset); 191 192 /* Tx Framer TGEN next Radio Frame Number/Master Frame number (bfn). */ 193 int cprif_tx_framer_tgen_next_bfn_config_set(int unit, int port, uint32 tgen_bfn); 194 int cprif_tx_framer_tgen_next_bfn_config_get(int unit, int port, uint32* tgen_bfn); 195 196 /* Tx Framer TGEN next Hyper Frame Number(HFN). */ 197 int cprif_tx_framer_tgen_next_hfn_config_set(int unit, int port, uint32 tgen_hfn); 198 int cprif_tx_framer_tgen_next_hfn_config_get(int unit, int port, uint32* tgen_hfn); 199 200 /* Tx Framer TGEN next Radio Frame Number/Master Frame (bfn). */ 201 int cprif_tx_framer_next_bfn_get(int unit, int port, uint32* tgen_bfn); 202 203 /* Tx Framer TGEN next Hyper Frame Number(HFN). */ 204 int cprif_tx_framer_next_hfn_get(int unit, int port, uint32* tgen_hfn); 205 206 /* Tx Framer TGEN Select which counter to use. */ 207 int cprif_tx_framer_tgen_select_counter_set(int unit, int port, cprimod_tgen_counter_select_t tgen_counter_select); 208 int cprif_tx_framer_tgen_select_counter_get(int unit, int port, cprimod_tgen_counter_select_t* tgen_counter_select); 209 210 /* Header Compare Entry Add. */ 211 int cprif_header_compare_entry_add(int unit, int port, const cprimod_header_compare_entry_t* compare_entry); 212 213 /* Header Compare Entry Delete. */ 214 int cprif_header_compare_entry_delete(int unit, int port, const cprimod_header_compare_entry_t* compare_entry); 215 216 /* Header Compare Entry Delete by Flow ID only. */ 217 int cprif_header_compare_entry_for_flow_delete(int unit, int port, uint8 flow_id, cprimod_flow_type_t flow_type); 218 219 /* Modulo Rule Entry Set/Get. */ 220 int cprif_modulo_rule_entry_set(int unit, int port, uint8 modulo_rule_num, cprimod_transmission_rule_type_t modulo_rule_type, const cprimod_modulo_rule_entry_t* modulo_rule); 221 int cprif_modulo_rule_entry_get(int unit, int port, uint8 modulo_rule_num, cprimod_transmission_rule_type_t modulo_rule_type, cprimod_modulo_rule_entry_t* modulo_rule); 222 223 /* Dual Bitmap Rule Entry Set/Get. */ 224 int cprif_dual_bitmap_rule_entry_set(int unit, int port, uint8 dbm_rule_num, const cprimod_dbm_rule_entry_t* dbm_rule); 225 int cprif_dual_bitmap_rule_entry_get(int unit, int port, uint8 dbm_rule_num, cprimod_dbm_rule_entry_t* dbm_rule); 226 227 /* Dual Bitmap Rule Entry Set/Get. */ 228 int cprif_secondary_dual_bitmap_rule_entry_set(int unit, int port, uint8 dbm_rule_num, const cprimod_secondary_dbm_rule_entry_t* dbm_rule); 229 int cprif_secondary_dual_bitmap_rule_entry_get(int unit, int port, uint8 dbm_rule_num, cprimod_secondary_dbm_rule_entry_t* dbm_rule); 230 231 /* Dual Bitmap Position Table Entry Set/Get. */ 232 int cprif_dbm_position_entry_set(int unit, int port, uint8 index, const cprimod_dbm_pos_table_entry_t* pos_entry); 233 int cprif_dbm_position_entry_get(int unit, int port, uint8 index, cprimod_dbm_pos_table_entry_t* pos_entry); 234 235 /* Speed and interface Set/Get. */ 236 int cprif_port_rx_interface_config_set(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_interface_config_t* config); 237 int cprif_port_rx_interface_config_get(int unit, int port, cprimod_port_interface_config_t* config); 238 239 /* Speed and interface Set/Get. */ 240 int cprif_port_tx_interface_config_set(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_interface_config_t* config); 241 int cprif_port_tx_interface_config_get(int unit, int port, cprimod_port_interface_config_t* config); 242 243 /* Rx optional config Set/Get. */ 244 int cprif_port_rx_frame_optional_config_set(int unit, int port, cprimod_rx_config_field_t field, int value); 245 int cprif_port_rx_frame_optional_config_get(int unit, int port, cprimod_rx_config_field_t field, int* value); 246 247 /* Rx optional config Set/Get. */ 248 int cprif_port_tx_frame_optional_config_set(int unit, int port, cprimod_tx_config_field_t field, uint32 value); 249 int cprif_port_tx_frame_optional_config_get(int unit, int port, cprimod_tx_config_field_t field, uint32* value); 250 251 /* Rx optional config Set/Get. */ 252 int cprif_port_rsvd4_rx_frame_optional_config_set(int unit, int port, cprimod_rsvd4_rx_config_field_t field, int value); 253 int cprif_port_rsvd4_rx_frame_optional_config_get(int unit, int port, cprimod_rsvd4_rx_config_field_t field, int* value); 254 255 /* Rx optional config Set/Get. */ 256 int cprif_port_rsvd4_rx_speed_set(int unit, int port, const phymod_phy_access_t* phy, cprimod_port_rsvd4_speed_mult_t speed); 257 int cprif_port_rsvd4_rx_speed_get(int unit, int port, cprimod_port_rsvd4_speed_mult_t* speed); 258 259 /* Rx optional config Set/Get. */ 260 int cprif_port_rsvd4_tx_speed_set(int unit, int port, const phymod_phy_access_t* phy, cprimod_port_rsvd4_speed_mult_t speed); 261 int cprif_port_rsvd4_tx_speed_get(int unit, int port, cprimod_port_rsvd4_speed_mult_t* speed); 262 263 /* Speed and interface Set. */ 264 int cprif_port_rsvd4_rx_fsm_state_set(int unit, int port, cprimod_rsvd4_rx_fsm_state_t state); 265 int cprif_port_rsvd4_rx_fsm_state_get(int unit, int port, cprimod_rsvd4_rx_fsm_state_t* state); 266 267 /* Speed and interface Set/Get. */ 268 int cprif_port_rsvd4_rx_overide_set(int unit, int port, cprimod_rsvd4_rx_overide_t parameter, int enable, int value); 269 int cprif_port_rsvd4_rx_overide_get(int unit, int port, cprimod_rsvd4_rx_overide_t parameter, int* enable, int* value); 270 271 /* tx optional config Set/Get. */ 272 int cprif_port_rsvd4_tx_frame_optional_config_set(int unit, int port, cprimod_rsvd4_tx_config_field_t field, int value); 273 int cprif_port_rsvd4_tx_frame_optional_config_get(int unit, int port, cprimod_rsvd4_tx_config_field_t field, int* value); 274 275 /* Speed and interface Set. */ 276 int cprif_port_rsvd4_tx_fsm_state_set(int unit, int port, cprimod_rsvd4_tx_fsm_state_t state); 277 int cprif_port_rsvd4_tx_fsm_state_get(int unit, int port, cprimod_rsvd4_tx_fsm_state_t* state); 278 279 /* Speed and interface Set/Get. */ 280 int cprif_port_rsvd4_tx_overide_set(int unit, int port, cprimod_rsvd4_tx_overide_t parameter, int enable, int value); 281 int cprif_port_rsvd4_tx_overide_get(int unit, int port, cprimod_rsvd4_tx_overide_t parameter, int* enable, int* value); 282 283 /* Speed and interface Set. */ 284 int cprif_port_rx_pcs_status_get(int unit, int port, cprimod_rx_pcs_status_t status, uint32* value); 285 286 /*Core Initialization*/ 287 int cprif_core_init(int unit, int port, const phymod_core_access_t* phy, const phymod_core_init_config_t* init_config, phymod_core_status_t* core_status); 288 289 /*Core Initialization*/ 290 int cprif_port_init(int unit, int port, const phymod_phy_access_t* phy, const cprimod_port_init_config_t* port_config); 291 292 /*Set/Get Rx Master Frame Synchronizaiton */ 293 int cprif_rsvd4_rx_master_frame_sync_config_set(int unit, int port, uint32 master_frame_number, uint64 master_frame_start_time); 294 int cprif_rsvd4_rx_master_frame_sync_config_get(int unit, int port, uint32* master_frame_number, uint64* master_frame_start_time); 295 296 /* Get CPRI Frame Sync information from control. */ 297 int cprif_cpri_rx_control_word_sync_info_get(int unit, int port, uint32* hyper_frame_num, uint32* radio_frame_num); 298 299 /* Get CPRI Control Word L1 Signal Information. */ 300 int cprif_cpri_rx_control_word_l1_signal_info_get(int unit, int port, cprimod_cpri_cw_l1_protocol_info_t* l1_info); 301 302 /* Get/Set CPRI Control Word L1 Signal Protection Enable. */ 303 int cprif_cpri_rx_control_word_l1_signal_signal_protection_set(int unit, int port, uint32 signal_map, uint32 enable); 304 int cprif_cpri_rx_control_word_l1_signal_signal_protection_get(int unit, int port, uint32 signal_map, uint32* enable); 305 306 /* Get/Set CPRI HDLC control Configuration. */ 307 int cprif_cpri_port_cw_slow_hdlc_config_set(int unit, int port, const cprimod_slow_hdlc_config_info_t* config_info); 308 int cprif_cpri_port_cw_slow_hdlc_config_get(int unit, int port, cprimod_slow_hdlc_config_info_t* config_info); 309 310 /* Get/Set CPRI Fast Ethernet control Configuration. */ 311 int cprif_cpri_port_cw_fast_eth_config_set(int unit, int port, const cprimod_fast_eth_config_info_t* config_info); 312 int cprif_cpri_port_cw_fast_eth_config_get(int unit, int port, cprimod_fast_eth_config_info_t* config_info); 313 314 /* Get/Set CPRI Rx VSD Control Configuration. */ 315 int cprif_cpri_port_rx_vsd_cw_config_set(int unit, int port, const cprimod_cpri_rx_vsd_config_info_t* config_info); 316 int cprif_cpri_port_rx_vsd_cw_config_get(int unit, int port, cprimod_cpri_rx_vsd_config_info_t* config_info); 317 318 /* Add CPRI Rx VSD Group Flow. */ 319 int cprif_cpri_port_rx_vsd_ctrl_flow_add(int unit, int port, uint32 group_id, const cprimod_cpri_rx_vsd_flow_info_t* config_info); 320 321 /* Delete CPRI Rx VSD Group Flow. */ 322 int cprif_cpri_port_rx_vsd_ctrl_flow_delete(int unit, int port, uint32 group_id); 323 324 /* Add CPRI Rx VSD Group Flow Configuration Get. */ 325 int cprif_cpri_port_rx_vsd_ctrl_flow_get(int unit, int port, uint32 group_id, cprimod_cpri_rx_vsd_flow_info_t* config_info); 326 327 /* Get/Set Encap Tag Id to Flow Id Map. */ 328 int cprif_encap_control_queue_tag_to_flow_id_map_set(int unit, int port, uint32 tag_id, uint32 flow_id); 329 int cprif_encap_control_queue_tag_to_flow_id_map_get(int unit, int port, uint32 tag_id, uint32* flow_id); 330 331 /* Get/Set CPRI Tx VSD control Configuration. */ 332 int cprif_cpri_port_tx_vsd_cw_config_set(int unit, int port, const cprimod_cpri_tx_vsd_config_info_t* config_info); 333 int cprif_cpri_port_tx_vsd_cw_config_get(int unit, int port, cprimod_cpri_tx_vsd_config_info_t* config_info); 334 335 /* Add CPRI Tx VSD Group Flow Configuration. */ 336 int cprif_cpri_port_tx_vsd_ctrl_flow_add(int unit, int port, uint32 group_id, uint32* group_list, const cprimod_cpri_tx_vsd_flow_info_t* config_info); 337 338 /* Delete CPRI Tx VSD Control Flow. */ 339 int cprif_cpri_port_tx_vsd_ctrl_flow_delete(int unit, int port, uint32 group_id, uint32* group_list); 340 341 /* Get CPRI Tx VSD Group Flow Configuration. */ 342 int cprif_cpri_port_tx_vsd_ctrl_flow_get(int unit, int port, uint32 group_id, uint32* group_list, cprimod_cpri_tx_vsd_flow_info_t* config_info); 343 344 /* Get/Set VSD Raw Configuration. */ 345 int cprif_cpri_port_rx_vsd_raw_config_set(int unit, int port, uint32 index, const cprimod_cpri_rx_vsd_raw_config_t* config_info); 346 int cprif_cpri_port_rx_vsd_raw_config_get(int unit, int port, uint32 index, cprimod_cpri_rx_vsd_raw_config_t* config_info); 347 348 /* Get/Set Tx VSD Raw Configuration. */ 349 int cprif_cpri_port_tx_vsd_raw_config_set(int unit, int port, uint32 index, const cprimod_cpri_tx_vsd_raw_config_t* config_info); 350 int cprif_cpri_port_tx_vsd_raw_config_get(int unit, int port, uint32 index, cprimod_cpri_tx_vsd_raw_config_t* config_info); 351 352 /* VSD Raw Radio Frame Filter Set/Get. */ 353 int cprif_cpri_port_tx_vsd_raw_filter_set(int unit, int port, uint32 bfn0_value, uint32 bfn0_mask, uint32 bfn1_value, uint32 bfn1_mask); 354 int cprif_cpri_port_tx_vsd_raw_filter_get(int unit, int port, uint32* bfn0_value, uint32* bfn0_mask, uint32* bfn1_value, uint32* bfn1_mask); 355 356 /* Get/Set Rx S D V M. */ 357 int cprif_cpri_port_rx_brcm_rsvd5_control_config_set(int unit, int port, uint32 schan_start, uint32 schan_size, uint32 queue_num, int parity_disable); 358 int cprif_cpri_port_rx_brcm_rsvd5_control_config_get(int unit, int port, uint32* schan_start, uint32* schan_size, uint32* queue_num, int* parity_disable); 359 360 /* Get/Set TX S D V M. */ 361 int cprif_cpri_port_tx_brcm_rsvd5_control_config_set(int unit, int port, uint32 schan_start, uint32 schan_size, uint32 queue_num, int crc_enable); 362 int cprif_cpri_port_tx_brcm_rsvd5_control_config_get(int unit, int port, uint32* schan_start, uint32* schan_size, uint32* queue_num, int* crc_enable); 363 364 /* Get/Set Rx GCW Configuration. */ 365 int cprif_cpri_port_rx_gcw_config_set(int unit, int port, uint32 index, const cprimod_cpri_rx_gcw_config_t* config_info); 366 int cprif_cpri_port_rx_gcw_config_get(int unit, int port, uint32 index, cprimod_cpri_rx_gcw_config_t* config_info); 367 368 /* Get/Set Tx GCW Configuration. */ 369 int cprif_cpri_port_tx_gcw_config_set(int unit, int port, uint32 index, const cprimod_cpri_tx_gcw_config_t* config_info); 370 int cprif_cpri_port_tx_gcw_config_get(int unit, int port, uint32 index, cprimod_cpri_tx_gcw_config_t* config_info); 371 372 /* GCW Radio Frame Filter Set/Get. */ 373 int cprif_cpri_port_tx_gcw_filter_set(int unit, int port, uint32 bfn0_value, uint32 bfn0_mask, uint32 bfn1_value, uint32 bfn1_mask); 374 int cprif_cpri_port_tx_gcw_filter_get(int unit, int port, uint32* bfn0_value, uint32* bfn0_mask, uint32* bfn1_value, uint32* bfn1_mask); 375 376 /* Set CRPI control word information. */ 377 int cprif_cpri_port_tx_control_word_set(int unit, int port, const cprimod_cpri_cw_l1_config_info_t* control_info); 378 379 /* Set Control Message Configuration.. */ 380 int cprif_rsvd4_rx_control_message_config_set(int unit, int port, uint32 queue_num, uint32 default_tag, uint32 no_match_tag); 381 382 /* Set Control Message Configuration.. */ 383 int cprif_rsvd4_rx_control_flow_config_set(int unit, int port, uint32 flow_id, const cprimod_control_flow_config_t* config); 384 int cprif_rsvd4_rx_control_flow_config_get(int unit, int port, uint32 flow_id, cprimod_control_flow_config_t* config); 385 386 /* Sync Profile Entry.. */ 387 int cprif_rsvd4_rx_sync_profile_entry_set(int unit, int port, uint32 profile_id, const cprimod_sync_profile_entry_t* entry); 388 int cprif_rsvd4_rx_sync_profile_entry_get(int unit, int port, uint32 profile_id, cprimod_sync_profile_entry_t* entry); 389 390 /* Tag Generation Entry.. */ 391 int cprif_rx_tag_config_set(int unit, int port, uint32 default_tag, uint32 no_match_tag); 392 393 /* Tag Generation Entry.. */ 394 int cprif_rx_tag_gen_entry_add(int unit, int port, const cprimod_tag_gen_entry_t* entry); 395 396 /* Tag Generation Entry.. */ 397 int cprif_rx_tag_gen_entry_delete(int unit, int port, const cprimod_tag_gen_entry_t* entry); 398 399 /* Set tag option for control Flow.. */ 400 int cprif_rx_control_flow_tag_option_set(int unit, int port, uint32 flow_id, cprimod_cpri_tag_option_t tag_option); 401 402 /* Add member to the Tx Control Flow Group.. */ 403 int cprif_rsvd4_tx_control_flow_group_member_add(int unit, int port, uint32 group_id, uint32 priority, uint32 queue_num, cprimod_control_msg_proc_type_t proc_type); 404 405 /* Delete member to the Tx Control Flow Group.. */ 406 int cprif_rsvd4_tx_control_flow_group_member_delete(int unit, int port, uint32 group_id, uint32 priority); 407 408 /* Setting RSVD4 Fast Ethernet Control Message Configuration.. */ 409 int cprif_rsvd4_tx_eth_message_config_set(int unit, int port, uint32 msg_node, uint32 msg_subnode, uint32 msg_type, uint32 msg_padding); 410 411 /* Setting RSVD4 Single Raw Control Message Configuration.. */ 412 int cprif_rsvd4_tx_single_raw_message_config_set(int unit, int port, uint32 msg_id, uint32 msg_type); 413 414 /* Setting RSVD4 Single Raw Control Message Configuration.. */ 415 int cprif_rsvd4_tx_single_tunnel_message_config_set(int unit, int port, cprimod_cpri_crc_option_t crc_option); 416 417 /* Set Control Message Configuration.. */ 418 int cprif_rsvd4_tx_control_flow_config_set(int unit, int port, uint32 flow_id, const cprimod_rsvd4_tx_config_info_t* config_info); 419 int cprif_rsvd4_tx_control_flow_config_get(int unit, int port, uint32 flow_id, cprimod_rsvd4_tx_config_info_t* config_info); 420 421 /* Set Index to header config table for a particular flow.. */ 422 int cprif_rsvd4_tx_control_flow_header_index_set(int unit, int port, uint32 roe_flow_id, uint32 index); 423 int cprif_rsvd4_tx_control_flow_header_index_get(int unit, int port, uint32 roe_flow_id, uint32* index); 424 425 /* Header Look up Entry.. */ 426 int cprif_rsvd4_tx_control_header_entry_set(int unit, int port, uint32 index, uint32 header_node, uint32 header_subnode, uint32 payload_node); 427 int cprif_rsvd4_tx_control_header_entry_get(int unit, int port, uint32 index, uint32* header_node, uint32* header_subnode, uint32* payload_node); 428 429 /* Set Fast Ethernet configuration.. */ 430 int cprif_rsvd4_fast_eth_config_set(int unit, int port, const cprimod_cpri_fast_eth_config_t* config_info); 431 432 /* Set Get if the port is cpri or Ethernet */ 433 int cprif_cpri_or_enet_port_set(int unit, int port, int val); 434 int cprif_cpri_or_enet_port_get(int unit, int port, int* val); 435 436 /* Set Get if Rx enabled */ 437 int cprif_cpri_port_rx_enable_set(int unit, int port, int val); 438 int cprif_cpri_port_rx_enable_get(int unit, int port, int* val); 439 440 /* Set Get if Tx enabled */ 441 int cprif_cpri_port_tx_enable_set(int unit, int port, int val); 442 int cprif_cpri_port_tx_enable_get(int unit, int port, int* val); 443 444 /* Get Interrupt status */ 445 int cprif_cpri_port_interrupt_link_status_get(int unit, int port, const int* is_link_intr_status); 446 447 /* Get the CPRI Port interrupt status. */ 448 int cprif_cpri_port_interrupt_enable_set(int unit, int port, cprimod_cpri_port_intr_type_t cpri_intr_type, int data, int enable); 449 450 /* Get the CPRI Port interrupt status. */ 451 int cprif_cpri_port_interrupt_process(int unit, int port); 452 453 /* set/get fast clk bit period */ 454 int cprif_fast_clk_bit_time_period_set(int unit, int port, uint32 bit_time_period); 455 int cprif_fast_clk_bit_time_period_get(int unit, int port, uint32* bit_time_period); 456 457 /* set/get time stamp bit period */ 458 int cprif_1588_bit_time_period_set(int unit, int port, cprimod_direction_t direction, cprimod_port_speed_t speed); 459 int cprif_1588_bit_time_period_get(int unit, int port, cprimod_direction_t direction, uint32* bit_time_period); 460 461 /* set/get time stamp config */ 462 int cprif_1588_timestamp_capture_config_set(int unit, int port, cprimod_direction_t direction, const cprimod_1588_capture_config_t* config); 463 int cprif_1588_timestamp_capture_config_get(int unit, int port, cprimod_direction_t direction, cprimod_1588_capture_config_t* config); 464 465 /* Get timestemp */ 466 int cprif_1588_captured_timestamp_get(int unit, int port, cprimod_direction_t direction, uint8 fifo0_sw1, uint8 mx_cnt, uint8* count, uint64* captured_time); 467 468 /* set/get time stamp config */ 469 int cprif_1588_timestamp_adjust_set(int unit, int port, cprimod_direction_t direction, const cprimod_1588_time_t* adjust_time); 470 int cprif_1588_timestamp_adjust_get(int unit, int port, cprimod_direction_t direction, cprimod_1588_time_t* adjust_time); 471 472 /* set/get time stamp modulo for fifo */ 473 int cprif_1588_timestamp_fifo_config_set(int unit, int port, cprimod_direction_t direction, uint16 modulo); 474 int cprif_1588_timestamp_fifo_config_get(int unit, int port, cprimod_direction_t direction, uint16* modulo); 475 476 /* set/get time stamp modulo for cmic */ 477 int cprif_1588_timestamp_cmic_config_set(int unit, int port, cprimod_direction_t direction, uint16 modulo); 478 int cprif_1588_timestamp_cmic_config_get(int unit, int port, cprimod_direction_t direction, uint16* modulo); 479 480 /* Get Basic frame information, frame length and control word length. */ 481 int cprif_cpri_basic_frame_info_get(int unit, int port, cprimod_direction_t dir, uint32* frame_len_in_bits, uint32* control_word_len_in_bits); 482 483 /* setup basic frame parser Rx and assembler Tx table. */ 484 int cprif_cpri_agnostic_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 485 486 /* Get the interface bus width, 10bit or 40bit. */ 487 int cprif_cpri_interface_bus_width_get(int unit, int port, int* is_10bit_mode); 488 489 /* setup basic frame parser Rx and assembler Tx table. */ 490 int cprif_cpri_tunnel_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 491 492 /* setup basic frame parser Rx and assembler Tx table. */ 493 int cprif_rsvd4_agnostic_mode_basic_frame_config_set(int unit, int port, cprimod_direction_t dir, int enable); 494 495 /* Set/Get encap presentation enable. */ 496 int cprif_encap_presentation_time_enable_set(int unit, int port, int enable); 497 int cprif_encap_presentation_time_enable_get(int unit, int port, int* enable); 498 499 /* Set/Get encap presentation time config. */ 500 int cprif_encap_presentation_time_config_set(int unit, int port, const cprimod_encap_presentation_time_config_t* config); 501 int cprif_encap_presentation_time_config_get(int unit, int port, cprimod_encap_presentation_time_config_t* config); 502 503 /* Set/Get encap presentation time adjustment. */ 504 int cprif_encap_presentation_time_adjust_set(int unit, int port, uint32 time); 505 int cprif_encap_presentation_time_adjust_get(int unit, int port, uint32* time); 506 507 /* Set/Get encap presentation time approximate increment. */ 508 int cprif_encap_presentation_time_approximate_increment_set(int unit, int port, uint32 time); 509 int cprif_encap_presentation_time_approximate_increment_get(int unit, int port, uint32* time); 510 511 /* Set/Get Decap Agnostic Mode enable. */ 512 int cprif_decap_agnostic_mode_enable_set(int unit, int port, int enable, cprimod_cpri_roe_ordering_info_option_t mode); 513 int cprif_decap_agnostic_mode_enable_get(int unit, int port, int* enable, cprimod_cpri_roe_ordering_info_option_t* mode); 514 515 /* Set/Get Decap Agnostic Mode Config. */ 516 int cprif_decap_agnostic_mode_config_set(int unit, int port, const cprimod_decap_agnostic_mode_config_t* config); 517 int cprif_decap_agnostic_mode_config_get(int unit, int port, cprimod_decap_agnostic_mode_config_t* config); 518 519 /* Set/Get decap presentation time configuration. */ 520 int cprif_decap_presentation_time_config_set(int unit, int port, uint32 mod_offset, uint32 mod_count); 521 int cprif_decap_presentation_time_config_get(int unit, int port, uint32* mod_offset, uint32* mod_count); 522 523 /* Set/Get Compression Lookup Table. */ 524 int cprif_compression_lookup_table_set(int unit, int port, int table_depth, const uint32* table); 525 int cprif_compression_lookup_table_get(int unit, int port, int max_depth, int* table_depth, uint32* table); 526 527 /* Set/Get DeCompression Lookup Table. */ 528 int cprif_decompression_lookup_table_set(int unit, int port, int table_depth, const uint32* table); 529 int cprif_decompression_lookup_table_get(int unit, int port, int max_depth, int* table_depth, uint32* table); 530 531 /* Set/Get control queue flow control. */ 532 int cprif_cpri_port_decap_queue_flow_control_set(int unit, int port, uint32 queue_num, int enable, uint32_t xon_threshold, uint32_t xoff_threshold); 533 int cprif_cpri_port_decap_queue_flow_control_get(int unit, int port, uint32 queue_num, int* enable, uint32_t* xon_threshold, uint32_t* xoff_threshold); 534 535 /* Set/Get FEC enable. */ 536 int cprif_cpri_port_fec_enable_set(int unit, int port, cprimod_direction_t dir, int enable); 537 int cprif_cpri_port_fec_enable_get(int unit, int port, cprimod_direction_t dir, int* enable); 538 539 /* Set/Get Fec timestamp config. */ 540 int cprif_cpri_port_fec_timestamp_config_set(int unit, int port, cprimod_direction_t dir, const cprimod_fec_timestamp_config_t* config); 541 int cprif_cpri_port_fec_timestamp_config_get(int unit, int port, cprimod_direction_t dir, const cprimod_fec_timestamp_config_t* config); 542 543 /* Set/Get Fec Auxiliry config. */ 544 int cprif_cpri_port_fec_aux_config_set(int unit, int port, cprimod_fec_aux_config_para_t parameter_id, uint32 value); 545 int cprif_cpri_port_fec_aux_config_get(int unit, int port, cprimod_fec_aux_config_para_t parameter_id, const uint32* value); 546 547 /* Enable/Disable ECC interrupts. */ 548 #ifdef CPRIMOD_SUPPORT 549 int cprif_cpri_port_ecc_interrupt_enable_set(int unit, int port, int enable); 550 #endif /* CPRIMOD_SUPPORT */ 551 552 /* ECC interrupt status and information get. */ 553 #ifdef CPRIMOD_SUPPORT 554 int cprif_cpri_port_ecc_interrupt_status_get(int unit, int port, const cprimod_cpri_ecc_intr_info_t* ecc_err_info); 555 #endif /* CPRIMOD_SUPPORT */ 556 557 /* ECC interrupt tests. */ 558 #ifdef CPRIMOD_SUPPORT_ECC_INJECT 559 int cprif_cpri_port_ecc_interrupt_test(int unit, int port); 560 #endif /* CPRIMOD_SUPPORT_ECC_INJECT */ 561 562 /* Set/Get Fec timestamp config. */ 563 int cprif_cpri_pll_status_get(int unit, int port, const phymod_phy_access_t* phy, int* pll_sel, int* pll_lock); 564 565 /* Set/Get Reset port value active 1. */ 566 int cprif_cpri_port_reset_set(int unit, int port, int rst); 567 int cprif_cpri_port_reset_get(int unit, int port, int* rst); 568 569 /* Reset cpri port */ 570 int cprif_cpri_init(int unit, int port); 571 572 /* Get Rx GCW word */ 573 int cprif_cpri_port_rx_gcw_word_get(int unit, int port, int group_index, uint16* gcw_word); 574 575 /* Get Tx GCW word */ 576 int cprif_cpri_port_tx_gcw_word_set(int unit, int port, int group_index, uint16 gcw_word); 577 578 /* CPRI MAC Drain Start */ 579 int cprif_cpri_mac_drain_start(int unit, int port); 580 581 /* CPRI MAC Drain Stop */ 582 int cprif_cpri_mac_drain_stop(int unit, int port); 583 584 /* Set/Get Reset CPRI MAC EP credit . */ 585 int cprif_cpri_mac_credit_reset_set(int unit, int port, int rst); 586 int cprif_cpri_mac_credit_reset_get(int unit, int port, int* rst); 587 588 /* Port link UP event */ 589 int cprif_cpri_port_link_up_event(int unit, int port); 590 591 /* Port link down event */ 592 int cprif_cpri_port_link_down_event(int unit, int port); 593 594 /* Set/Get Port Rx Tunnel Mode Config. */ 595 int cprif_cpri_port_rx_tunnel_mode_set(int unit, int port, int enable, uint32 payload_size); 596 int cprif_cpri_port_rx_tunnel_mode_get(int unit, int port, int* enable, uint32* payload_size); 597 598 /* Set/Get Port Tx Agnostic Mode Config. */ 599 int cprif_cpri_port_tx_agnostic_mode_set(int unit, int port, int enable, cprimod_agnostic_mode_type_t mode, uint32 payload_size); 600 int cprif_cpri_port_tx_agnostic_mode_get(int unit, int port, int* enable, cprimod_agnostic_mode_type_t* mode, uint32* payload_size); 601 602 /* Get Port Rx Framer Agnostic Mode Config. */ 603 int cprif_cpri_port_rx_agnostic_mode_get(int unit, int port, int* enable, cprimod_agnostic_mode_type_t* mode); 604 605 /* Get PMD Port Status. */ 606 int cprif_port_pmd_status_get(int unit, int port, cprimod_pmd_port_status_t status, uint32* value); 607 608 /* Get CPRI Port Link Status. */ 609 int cprif_cpri_port_link_get(int unit, int port, int* link); 610 611 /* Set/Get encap header field mapping. */ 612 #ifdef CPRIMOD_SUPPORT 613 int cprif_cpri_encap_header_field_mapping_set(int unit, int port, const cprimod_cpri_encap_header_field_mapping_t* mapping); 614 #endif /* CPRIMOD_SUPPORT */ 615 #ifdef CPRIMOD_SUPPORT 616 int cprif_cpri_encap_header_field_mapping_get(int unit, int port, cprimod_cpri_encap_header_field_mapping_t* mapping); 617 #endif /* CPRIMOD_SUPPORT */ 618 619 /* Set/Get decap headeir field mapping. */ 620 #ifdef CPRIMOD_SUPPORT 621 int cprif_cpri_decap_header_field_mapping_set(int unit, int port, const cprimod_cpri_decap_header_field_mapping_t* mapping); 622 #endif /* CPRIMOD_SUPPORT */ 623 #ifdef CPRIMOD_SUPPORT 624 int cprif_cpri_decap_header_field_mapping_get(int unit, int port, cprimod_cpri_decap_header_field_mapping_t* mapping); 625 #endif /* CPRIMOD_SUPPORT */ 626 627 /* Set/Get decap headeir field mapping. */ 628 #ifdef CPRIMOD_SUPPORT 629 int cprif_cpri_header_field_adjustment_config_set(int unit, int port, cprimod_direction_t dir, int ext_hdr_enable, int len_field_adj); 630 #endif /* CPRIMOD_SUPPORT */ 631 #ifdef CPRIMOD_SUPPORT 632 int cprif_cpri_header_field_adjustment_config_get(int unit, int port, cprimod_direction_t dir, int* ext_hdr_enable, int* len_field_adj); 633 #endif /* CPRIMOD_SUPPORT */ 634 635 /* Set/Get decap headeir field mapping. */ 636 #ifdef CPRIMOD_SUPPORT 637 int cprif_cpri_decap_header_field_mask_set(int unit, int port, cprimod_cpri_roe_header_field_t field_id, uint32 mask); 638 #endif /* CPRIMOD_SUPPORT */ 639 #ifdef CPRIMOD_SUPPORT 640 int cprif_cpri_decap_header_field_mask_get(int unit, int port, cprimod_cpri_roe_header_field_t field_id, uint32* mask); 641 #endif /* CPRIMOD_SUPPORT */ 642 643 /* Setting the compression saturation threshold. */ 644 #ifdef CPRIMOD_SUPPORT 645 int cprif_cpri_port_compression_saturation_config_set(int unit, int port, uint32 threshold_value); 646 #endif /* CPRIMOD_SUPPORT */ 647 #ifdef CPRIMOD_SUPPORT 648 int cprif_cpri_port_compression_saturation_config_get(int unit, int port, uint32* threshold_value); 649 #endif /* CPRIMOD_SUPPORT */ 650 651 /* Setting the decompression saturation value. */ 652 #ifdef CPRIMOD_SUPPORT 653 int cprif_cpri_port_decompression_saturation_config_set(int unit, int port, uint32 sat_value); 654 #endif /* CPRIMOD_SUPPORT */ 655 #ifdef CPRIMOD_SUPPORT 656 int cprif_cpri_port_decompression_saturation_config_get(int unit, int port, uint32* sat_value); 657 #endif /* CPRIMOD_SUPPORT */ 658 659 /* Set/Get RSVD4 padding size. */ 660 #ifdef CPRIMOD_SUPPORT 661 int cprif_rsvd4_tx_padding_size_set(int unit, int port, uint32 padding_size); 662 #endif /* CPRIMOD_SUPPORT */ 663 #ifdef CPRIMOD_SUPPORT 664 int cprif_rsvd4_tx_padding_size_get(int unit, int port, uint32* padding_size); 665 #endif /* CPRIMOD_SUPPORT */ 666 667 #endif /*_CPRIF_H_*/