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cmicx_qspi.h (2413B)

      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * Purpose:     Header for CMICX QSPI driver
      8  */
      9 #ifndef _CMICX_QSPI_H_
     10 #define _CMICX_QSPI_H_
     11 
     12 /*!
     13  * Initialize QSPI. software and hardware resources
     14  *
     15 .* unit: Device ID.
     16  * max_hz:  Maximum SCK rate in Hz.
     17  * mode:    Clock polarity, clock phase and other parameters.
     18  *
     19  * Returns: SOC_E_XXX
     20  */
     21 extern int
     22 cmicx_qspi_init(int unit,
     23                     uint32 max_hz,
     24                     uint32 mode);
     25 
     26 /*!
     27  * Cleanup QSPI resources
     28  *
     29  * Returns: SOC_E_XXX
     30  */
     31 extern int
     32 cmicx_qspi_cleanup(int unit);
     33 
     34 /*!
     35  * Claim the bus and prepare it for communication.
     36  * This must be called before doing any transfers
     37  *
     38 .* unit: Device ID.
     39  * Returns: SOC_E_XXX
     40  */
     41 extern int
     42 cmicx_qspi_claim_bus(int unit);
     43 
     44 /*!
     45  * Release the SPI bus
     46  *
     47  * This must be called once all transfers have finished
     48  *
     49 .* unit: Device ID.
     50  *   slave:	The SPI slave
     51  */
     52 extern int
     53 cmicx_qspi_release_bus(int unit);
     54 
     55 /*!
     56  * QSPI Read Write
     57  *
     58  * This writes  the SPI MOSI port and simultaneously clocks
     59  * read from the MISO port
     60 .*
     61 .* unit: Device ID.
     62  * en: Bytes to write and read.
     63  * dout: Data Out buffer.
     64  * din: Data in buffer.
     65  * flags: A bitwise combination of SPI_XFER_* flags.
     66  *
     67  *   Returns: 0 on success, not 0 on failure
     68  */
     69 extern int
     70 cmicx_qspi_rw(int unit,
     71                   uint32 len,
     72                   const void *dout,
     73                   void *din,
     74                   uint32 flags);
     75 
     76 /* Possible values for access_method below */
     77 #define QSPI_ACCESS_METHOD_PCIE 0 /* Access using the 1st PCIe BAR (default) */
     78 #ifdef INCLUDE_CPU_I2C
     79 #define QSPI_ACCESS_METHOD_I2C 1 /* Access by I2C using specified IDs */
     80 #define QSPI_ACCESS_METHOD_I2C_BDE 2 /* by I2C using the BDE */
     81 #endif
     82 
     83 /* Set the current QSPI access method */
     84 extern void
     85 iproc_qspi_set_access_method(int unit, uint8 access_method, uint8 i2c_bus, uint8 i2c_dev);
     86 
     87 #ifdef INCLUDE_CPU_I2C
     88 /* Read a uint32 from the AXI address space using the current QSPI access method */
     89 extern int
     90 iproc_qspi_read(int unit, uint32 addr, uint32 *read_value);
     91 /* write a uint32 from the AXI address space using the current QSPI access method */
     92 extern int
     93 iproc_qspi_write(int unit, uint32 addr, uint32 value);
     94 #endif /* INCLUDE_CPU_I2C */
     95 
     96 #endif /* _CMICX_QSPI_H_ */