chip.h (28338B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: chip.h 8 * Purpose: Defines for chip types, etc. 9 * Requires: soctypes.h, memory, register and feature defs. 10 * 11 * System on Chip (SOC) basic structures and typedefs 12 * Each chip consists of a number of blocks. Each block can be 13 * a port interface controller (PIC) that contains ports. 14 * The mcm/bcm*.i files contain definitions of each block and port 15 * in the associated chip. The structures used in those files 16 * are defined here. They are used to build internal use data 17 * structures defined in soc/drv.h 18 */ 19 20 #ifndef _SOC_CHIP_H 21 #define _SOC_CHIP_H 22 23 #include <soc/types.h> 24 #include <soc/memory.h> 25 #include <soc/register.h> 26 #include <soc/feature.h> 27 28 /* 29 * Arrays of soc_block_info_t are built by the registers program. 30 * Each array is indexed by block instance number (per chip). 31 * The last entry has type -1. 32 * Used in bcm*.i files. 33 */ 34 typedef struct { 35 int type; /* block type: SOC_BLK_* */ 36 int number; /* block instance number of block type */ 37 int schan; /* pic number for schan commands */ 38 int cmic; /* pic number for cmic r/w commands */ 39 } soc_block_info_t; 40 41 /* 42 * Arrays of soc_port_info_t are built by the registers program. 43 * Each array is indexed by port number (per chip). 44 * Unused ports have blk -1 and bindex 0 45 * The last entry has blk -1 and bindex -1 46 * Used in bcm*.i files. 47 */ 48 typedef struct { 49 int blk; /* index into soc_block_info array */ 50 int bindex; /* index of port within block */ 51 } soc_port_info_t; 52 53 /* 54 * Block types 55 */ 56 typedef enum soc_block_type_e { 57 SOC_BLK_NONE=0, 58 SOC_BLK_EPIC, 59 SOC_BLK_GPIC, 60 SOC_BLK_HPIC, 61 SOC_BLK_IPIC, 62 SOC_BLK_XPIC, 63 SOC_BLK_CMIC, 64 SOC_BLK_CPIC, 65 SOC_BLK_ARL, 66 SOC_BLK_MMU, 67 SOC_BLK_MMU_GLB, /* 10 */ 68 SOC_BLK_MMU_SC, 69 SOC_BLK_MMU_SED, 70 SOC_BLK_MMU_XPE, 71 SOC_BLK_MCU, 72 SOC_BLK_GPORT, 73 SOC_BLK_XPORT, 74 SOC_BLK_IPIPE, 75 SOC_BLK_IPIPE_HI, 76 SOC_BLK_EPIPE, 77 SOC_BLK_EPIPE_HI, /* 20 */ 78 SOC_BLK_IGR, 79 SOC_BLK_EGR, 80 SOC_BLK_BSE, 81 SOC_BLK_CSE, 82 SOC_BLK_HSE, 83 SOC_BLK_BSAFE, 84 SOC_BLK_GXPORT, 85 SOC_BLK_SPI, 86 SOC_BLK_EXP, 87 SOC_BLK_SYS, /* 30 */ 88 SOC_BLK_XGPORT, 89 SOC_BLK_SPORT, 90 SOC_BLK_INTER, 91 SOC_BLK_EXTER, 92 SOC_BLK_ESM, 93 SOC_BLK_OTPC, 94 SOC_BLK_QGPORT, 95 SOC_BLK_XQPORT, 96 SOC_BLK_XLPORT, 97 SOC_BLK_XLPORTB0, /* 40 */ 98 SOC_BLK_LBPORT, 99 SOC_BLK_PORT_GROUP4, 100 SOC_BLK_PORT_GROUP5, 101 SOC_BLK_PGW_CL, 102 SOC_BLK_CPORT, 103 SOC_BLK_CLPORT, 104 SOC_BLK_CLG2PORT, 105 SOC_BLK_XTPORT, 106 SOC_BLK_MXQPORT, 107 SOC_BLK_TOP, 108 SOC_BLK_SER, /* 50 */ 109 SOC_BLK_AVS, 110 SOC_BLK_AXP, 111 SOC_BLK_ISM, 112 SOC_BLK_ETU, 113 SOC_BLK_IBOD, 114 SOC_BLK_LLS, 115 SOC_BLK_CES, 116 SOC_BLK_CI, 117 SOC_BLK_TXLP, 118 SOC_BLK_RXLP, /* 60 */ 119 SOC_BLK_IL, 120 SOC_BLK_MS_ISEC, 121 SOC_BLK_MS_ESEC, 122 /* Sirius regs */ 123 SOC_BLK_BP, 124 SOC_BLK_CS, 125 SOC_BLK_EB, 126 SOC_BLK_EP, 127 SOC_BLK_ES, 128 SOC_BLK_FD, 129 SOC_BLK_FF, /* 70 */ 130 SOC_BLK_FR, 131 SOC_BLK_TX, 132 SOC_BLK_QMA, 133 SOC_BLK_QMB, 134 SOC_BLK_QMC, 135 SOC_BLK_QSA, 136 SOC_BLK_QSB, 137 SOC_BLK_RB, 138 SOC_BLK_SC_TOP, 139 SOC_BLK_SF_TOP, /* 80 */ 140 SOC_BLK_TS, 141 SOC_BLK_CW, 142 /* Caladan blocks */ 143 SOC_BLK_CM, 144 SOC_BLK_CO, 145 SOC_BLK_CX, 146 SOC_BLK_ETU_WRAP, 147 SOC_BLK_LRA, 148 SOC_BLK_LRB, 149 SOC_BLK_OC, 150 SOC_BLK_PB, /* 90 */ 151 SOC_BLK_PD, 152 SOC_BLK_PP, 153 SOC_BLK_PR, 154 SOC_BLK_PT, 155 SOC_BLK_QM, 156 SOC_BLK_RC, 157 SOC_BLK_TMA, 158 SOC_BLK_TMB, 159 SOC_BLK_TP, 160 SOC_BLK_TM_QE, /* 100 */ 161 /* Helix4 */ 162 SOC_BLK_XWPORT, 163 SOC_BLK_IPROC, 164 /* Greyhound */ 165 SOC_BLK_PMQ, 166 /* Apache */ 167 SOC_BLK_BCPORT, 168 SOC_BLK_CXXPORT, 169 SOC_BLK_CPRI, 170 SOC_BLK_RDB, 171 /* Monterey */ 172 SOC_BLK_MACSEC, 173 SOC_BLK_CPRI_TP, 174 SOC_BLK_TSCF, 175 /* Saber2 */ 176 SOC_BLK_IECELL, 177 /* Helix5: Broadscan */ 178 SOC_BLK_BROADSCAN, 179 /* Composites: Keeping these at the end */ 180 SOC_BLK_PORT, 181 SOC_BLK_CPU, 182 SOC_BLK_ETHER, 183 SOC_BLK_HIGIG, 184 SOC_BLK_FABRIC, 185 SOC_BLK_NET, 186 SOC_BLK_HGPORT, 187 SOC_BLK_PGW_GE, 188 /* Trident3 CCH Virtual Block */ 189 SOC_BLK_CCH, 190 /* Greyhound2 */ 191 SOC_BLK_CRYPTO, 192 SOC_BLK_PGW_GE8P, 193 /* Helix5 */ 194 SOC_BLK_PMQPORT, 195 /*Tomahawk3*/ 196 SOC_BLK_MMU_ITM, 197 SOC_BLK_MMU_EB, 198 SOC_BLK_CEV, 199 SOC_BLK_CDPORT, 200 SOC_BLK_CDPORT_BST, 201 SOC_BLK_CDMAC, 202 SOC_BLK_TAF, 203 SOC_BLK_END_NOT_DNX, 204 205 SOC_BLK_FIRST_DNX = 10000, /* all DNX blocks should apear betweenSOC_BLK_FIRST_DNX SOC_BLK_LAST_DNX*/ 206 SOC_BLK_FIRST_DPP = SOC_BLK_FIRST_DNX, 207 /* Petra-B block info */ 208 SOC_BLK_CFC = SOC_BLK_FIRST_DPP, 209 SOC_BLK_DPI, 210 SOC_BLK_DRC, 211 SOC_BLK_ECI, 212 SOC_BLK_EGQ, 213 SOC_BLK_EPNI, 214 SOC_BLK_FCR, 215 SOC_BLK_FCT, 216 /* SOC_BLK_MMU, */ 217 SOC_BLK_FDR, 218 SOC_BLK_FDA, 219 SOC_BLK_FDT, 220 SOC_BLK_MESH_TOPOLOGY, 221 SOC_BLK_IDR, 222 SOC_BLK_IHB, 223 SOC_BLK_IHP, 224 SOC_BLK_IPS, 225 SOC_BLK_IPT, 226 SOC_BLK_IQM, 227 SOC_BLK_IRE, 228 SOC_BLK_IRR, 229 SOC_BLK_MAC, 230 SOC_BLK_MBU, 231 SOC_BLK_MCC, 232 SOC_BLK_MSW, 233 SOC_BLK_NBI, 234 SOC_BLK_NIF, 235 SOC_BLK_NIF_MAL, 236 SOC_BLK_OLP, 237 SOC_BLK_QDR, 238 SOC_BLK_RTP, 239 SOC_BLK_SCH, 240 241 /* ARAD */ 242 /*SOC_BLK_CFC,*/ 243 SOC_BLK_OCB, 244 SOC_BLK_CRPS, 245 /*SOC_BLK_ECI,*/ 246 /*SOC_BLK_EGQ,*/ 247 /*SOC_BLK_CMIC,*/ 248 /*SOC_BLK_FCR,*/ 249 /*SOC_BLK_FCT,*/ 250 /*SOC_BLK_MMU,*/ 251 /*SOC_BLK_FDR,*/ 252 /*SOC_BLK_FDT,*/ 253 /*SOC_BLK_MESH_TOPOLOGY,*/ 254 /*SOC_BLK_IDR,*/ 255 /*SOC_BLK_IHB,*/ 256 /*SOC_BLK_IHP,*/ 257 /*SOC_BLK_IPS,*/ 258 /*SOC_BLK_IPT,*/ 259 /*SOC_BLK_IQM,*/ 260 /*SOC_BLK_IRE,*/ 261 /*SOC_BLK_IRR,*/ 262 SOC_BLK_FMAC, 263 /*SOC_BLK_OTPC,*/ 264 SOC_BLK_XLP, 265 SOC_BLK_CLP, 266 SOC_BLK_CXX, 267 /*SOC_BLK_NBI,*/ 268 SOC_BLK_CGM, 269 SOC_BLK_OAMP, 270 /*SOC_BLK_OLP,*/ 271 SOC_BLK_FSRD, 272 /*SOC_BLK_RTP,*/ 273 /*SOC_BLK_SCH,*/ 274 /*SOC_BLK_EPNI,*/ 275 SOC_BLK_DRCA, 276 SOC_BLK_DRCB, 277 SOC_BLK_DRCC, 278 SOC_BLK_DRCD, 279 SOC_BLK_DRCE, 280 SOC_BLK_DRCF, 281 SOC_BLK_DRCG, 282 SOC_BLK_DRCH, 283 SOC_BLK_BRDC_FMAC, 284 SOC_BLK_BRDC_FSRD, 285 SOC_BLK_BRDC_HBC, 286 SOC_BLK_BRDC_DRC, 287 SOC_BLK_DRCBROADCAST, 288 289 /* Jericho */ 290 SOC_BLK_IQMT, 291 SOC_BLK_NBIH, 292 SOC_BLK_NBIL, 293 SOC_BLK_IPST, 294 SOC_BLK_PPDB_A, 295 SOC_BLK_PPDB_B, 296 SOC_BLK_MRPS, 297 SOC_BLK_MTRPS_EM, 298 SOC_BLK_EDB, 299 SOC_BLK_ILKN_PMH, 300 SOC_BLK_ILKN_PML, 301 SOC_BLK_BRDC_CGM, 302 SOC_BLK_BRDC_EGQ, 303 SOC_BLK_BRDC_EPNI, 304 SOC_BLK_BRDC_IHB, 305 SOC_BLK_BRDC_IHP, 306 SOC_BLK_BRDC_IPS, 307 SOC_BLK_BRDC_IQM, 308 SOC_BLK_BRDC_SCH, 309 SOC_BLK_BRDC_MRPS, 310 SOC_BLK_BRDC_MTRPS_EM, 311 SOC_BLK_KAPS, 312 SOC_BLK_EMPTY, 313 /* for DNX test chips */ 314 SOC_BLK_PRM, 315 SOC_BLK_BLH, 316 SOC_BLK_AM_TOP, 317 318 /*FE1600*/ 319 /*SOC_BLK_ECI,*/ 320 SOC_BLK_OCCG, 321 SOC_BLK_DCH, 322 /*SOC_BLK_CMIC,*/ 323 SOC_BLK_DCL, 324 SOC_BLK_DCMA, 325 SOC_BLK_DCMB, 326 SOC_BLK_DCMC, 327 SOC_BLK_CCS, 328 /*SOC_BLK_RTP,*/ 329 /*SOC_BLK_MESH_TOPOLOGY,*/ 330 /*SOC_BLK_FMAC,*/ 331 /*SOC_BLK_FSRD,*/ 332 /*SOC_BLK_OTPC,*/ 333 /*SOC_BLK_BRDC_FSRD,*/ 334 SOC_BLK_BRDC_FMACH, 335 SOC_BLK_BRDC_FMACL, 336 337 /*FE3200*/ 338 SOC_BLK_DCM, 339 SOC_BLK_BRDC_DCH, 340 SOC_BLK_BRDC_DCM, 341 SOC_BLK_BRDC_DCL, 342 SOC_BLK_BRDC_CCS, 343 SOC_BLK_BRDC_FMAC_AC, 344 SOC_BLK_BRDC_FMAC_BD, 345 346 /*RAMON*/ 347 SOC_BLK_DCML, 348 SOC_BLK_MCT, 349 SOC_BLK_QRH, 350 SOC_BLK_LCM, 351 SOC_BLK_BRDC_CCH, 352 SOC_BLK_BRDC_DCML, 353 SOC_BLK_BRDC_LCM, 354 SOC_BLK_BRDC_QRH, 355 356 /*QMX*/ 357 SOC_BLK_BRDC_GPORT, 358 SOC_BLK_BRDC_XPL, 359 SOC_BLK_BRDC_CPL, 360 SOC_BLK_BRDC_PMQ, 361 /* QAX */ 362 SOC_BLK_IDB, 363 SOC_BLK_IEP, 364 SOC_BLK_ILB, 365 SOC_BLK_IMP, 366 SOC_BLK_IPSEC, 367 SOC_BLK_ITE, 368 SOC_BLK_PEM, 369 SOC_BLK_PMH, 370 SOC_BLK_PTS, 371 SOC_BLK_SPB, 372 SOC_BLK_SQM, 373 SOC_BLK_TAR, 374 SOC_BLK_TXQ, 375 SOC_BLK_DDP, 376 SOC_BLK_DEBUG, 377 SOC_BLK_DPRCA, 378 SOC_BLK_DPRCB, 379 SOC_BLK_DPRCC, 380 SOC_BLK_DQM, 381 SOC_BLK_ECGM, 382 SOC_BLK_IPSEC_SPU_WRAPPER_TOP, 383 SOC_BLK_BRDC_IPSEC_SPU_WRAPPER_TOP, 384 SOC_BLK_KAPS_BBS, 385 SOC_BLK_MXQ, 386 SOC_BLK_PLL, 387 SOC_BLK_HBM, 388 SOC_BLK_MTM, 389 SOC_BLK_PDM, 390 SOC_BLK_SIF, 391 SOC_BLK_BDM, 392 SOC_BLK_ILU, 393 SOC_BLK_IPPA, 394 SOC_BLK_IPPB, 395 SOC_BLK_IPPC, 396 SOC_BLK_IPPD, 397 SOC_BLK_ITPP, 398 SOC_BLK_ITPPD, 399 SOC_BLK_MACT, 400 SOC_BLK_MCP, 401 SOC_BLK_MDB, 402 SOC_BLK_NMG, 403 SOC_BLK_RQP, 404 SOC_BLK_CDU, 405 SOC_BLK_EPS, 406 SOC_BLK_EPS_SPR, 407 SOC_BLK_ERPP, 408 SOC_BLK_ETPPA, 409 SOC_BLK_ETPPB, 410 SOC_BLK_FQP, 411 SOC_BLK_PQP, 412 SOC_BLK_HBMC, 413 SOC_BLK_BRDC_KAPS_BBS, 414 SOC_BLK_DDHB, 415 SOC_BLK_EVNT, 416 SOC_BLK_TCAM, 417 SOC_BLK_DHC, 418 SOC_BLK_TDU, 419 SOC_BLK_IPPE, 420 SOC_BLK_HBC, 421 SOC_BLK_ETPPC, 422 SOC_BLK_EPRE, 423 SOC_BLK_IPPF, 424 SOC_BLK_MDB_ARM, 425 SOC_BLK_FDTL, 426 SOC_BLK_CDUM, 427 SOC_BLK_DDHA, 428 SOC_BLK_DMU, 429 SOC_BLK_ILE, 430 SOC_BLK_CLU, 431 SOC_BLK_CLUP, 432 SOC_BLK_CLMAC, 433 SOC_BLK_ESB, 434 435 SOC_BLK_LAST_DNX , /* all DNX blocks should apear betweenSOC_BLK_FIRST_DNX SOC_BLK_LAST_DNX*/ 436 SOC_BLK_LAST_DPP = SOC_BLK_BRDC_FMACL, 437 438 SOC_BLOCK_TYPE_INVALID = -1 439 } soc_block_type_t; 440 441 #define NOF_DNX_BLOCKS ((SOC_BLK_LAST_DNX) - (SOC_BLK_FIRST_DNX)) 442 443 444 #define NOF_BCM_BLOCKS ((NOF_DNX_BLOCKS) + SOC_BLK_END_NOT_DNX) 445 446 447 #define SOC_BLK_PORT_INITIALIZER \ 448 SOC_BLK_EPIC,\ 449 SOC_BLK_GPIC,\ 450 SOC_BLK_HPIC,\ 451 SOC_BLK_IPIC,\ 452 SOC_BLK_XPIC,\ 453 SOC_BLK_GPORT,\ 454 SOC_BLK_XPORT,\ 455 SOC_BLK_GXPORT,\ 456 SOC_BLK_XGPORT,\ 457 SOC_BLK_QGPORT,\ 458 SOC_BLK_SPORT,\ 459 SOC_BLK_XLPORT,\ 460 SOC_BLK_XLPORTB0,\ 461 SOC_BLK_MXQPORT,\ 462 SOC_BLK_XQPORT,\ 463 SOC_BLK_CPIC,\ 464 SOC_BLK_CPORT,\ 465 SOC_BLK_CLPORT,\ 466 SOC_BLK_CDPORT,\ 467 SOC_BLK_CLG2PORT,\ 468 SOC_BLK_XTPORT,\ 469 SOC_BLK_XWPORT,\ 470 SOC_BLK_AXP,\ 471 SOC_BLK_MXQPORT,\ 472 SOC_BLK_XLP,\ 473 SOC_BLK_CLP,\ 474 SOC_BLK_PGW_CL, \ 475 SOC_BLK_RXLP,\ 476 SOC_BLK_TXLP,\ 477 SOC_BLK_CXXPORT,\ 478 SOC_BLK_CPRI,\ 479 SOC_BLK_RDB,\ 480 SOC_BLK_BCPORT,\ 481 SOC_BLK_PGW_GE,\ 482 SOC_BLK_PGW_GE8P,\ 483 SOC_BLK_IECELL,\ 484 SOC_BLK_BROADSCAN, \ 485 SOC_BLK_MXQ,\ 486 SOC_BLK_MACSEC,\ 487 SOC_BLK_CDMAC,\ 488 SOC_BLOCK_TYPE_INVALID 489 490 #define SOC_BLK_CPU_INITIALIZER \ 491 SOC_BLK_CMIC,\ 492 SOC_BLK_CPIC,\ 493 SOC_BLOCK_TYPE_INVALID\ 494 495 #define SOC_BLK_ETHER_INITIALIZER \ 496 SOC_BLK_EPIC,\ 497 SOC_BLK_GPIC,\ 498 SOC_BLK_XPIC,\ 499 SOC_BLK_GPORT,\ 500 SOC_BLK_XPORT,\ 501 SOC_BLK_GXPORT,\ 502 SOC_BLK_XGPORT,\ 503 SOC_BLK_XQPORT,\ 504 SOC_BLK_QGPORT,\ 505 SOC_BLK_SPORT,\ 506 SOC_BLK_XLPORT,\ 507 SOC_BLK_XLPORTB0,\ 508 SOC_BLK_MXQPORT,\ 509 SOC_BLK_CPORT,\ 510 SOC_BLK_CLPORT,\ 511 SOC_BLK_CDPORT,\ 512 SOC_BLK_CLG2PORT,\ 513 SOC_BLK_XTPORT,\ 514 SOC_BLK_XWPORT,\ 515 SOC_BLK_CXXPORT,\ 516 SOC_BLK_CPRI,\ 517 SOC_BLK_PGW_GE,\ 518 SOC_BLK_PGW_GE8P,\ 519 SOC_BLOCK_TYPE_INVALID\ 520 521 #define SOC_BLK_HIGIG_INITIALIZER \ 522 SOC_BLK_HPIC,\ 523 SOC_BLK_IPIC,\ 524 SOC_BLK_XPORT,\ 525 SOC_BLK_GXPORT,\ 526 SOC_BLK_XGPORT,\ 527 SOC_BLK_XQPORT,\ 528 SOC_BLK_XLPORT,\ 529 SOC_BLK_XLPORTB0,\ 530 SOC_BLK_MXQPORT,\ 531 SOC_BLK_QGPORT,\ 532 SOC_BLK_CPORT,\ 533 SOC_BLK_CLPORT,\ 534 SOC_BLK_CDPORT,\ 535 SOC_BLK_CLG2PORT,\ 536 SOC_BLK_XTPORT,\ 537 SOC_BLK_XWPORT,\ 538 SOC_BLK_CXXPORT,\ 539 SOC_BLK_CPRI,\ 540 SOC_BLK_PGW_GE,\ 541 SOC_BLK_PGW_GE8P,\ 542 SOC_BLOCK_TYPE_INVALID\ 543 544 #define SOC_BLK_FABRIC_INITIALIZER \ 545 SOC_BLK_SC_TOP,\ 546 SOC_BLK_SF_TOP,\ 547 SOC_BLK_SPI,\ 548 SOC_BLOCK_TYPE_INVALID\ 549 550 #define SOC_BLK_NET_INITIALIZER \ 551 SOC_BLK_EPIC,\ 552 SOC_BLK_GPIC,\ 553 SOC_BLK_XPIC,\ 554 SOC_BLK_GPORT,\ 555 SOC_BLK_XPORT,\ 556 SOC_BLK_GXPORT,\ 557 SOC_BLK_XGPORT,\ 558 SOC_BLK_XQPORT,\ 559 SOC_BLK_QGPORT,\ 560 SOC_BLK_SPORT,\ 561 SOC_BLK_XLPORT,\ 562 SOC_BLK_XLPORTB0,\ 563 SOC_BLK_MXQPORT,\ 564 SOC_BLK_CPORT,\ 565 SOC_BLK_CLPORT,\ 566 SOC_BLK_CDPORT,\ 567 SOC_BLK_CLG2PORT,\ 568 SOC_BLK_XTPORT,\ 569 SOC_BLK_XWPORT,\ 570 SOC_BLK_HPIC,\ 571 SOC_BLK_IPIC,\ 572 SOC_BLK_SC_TOP,\ 573 SOC_BLK_SF_TOP,\ 574 SOC_BLK_SPI,\ 575 SOC_BLK_IL,\ 576 SOC_BLK_FSRD,\ 577 SOC_BLK_HBC,\ 578 SOC_BLK_XLP,\ 579 SOC_BLK_CLP,\ 580 SOC_BLK_PGW_CL,\ 581 SOC_BLK_CXXPORT,\ 582 SOC_BLK_CPRI,\ 583 SOC_BLK_RDB,\ 584 SOC_BLK_BCPORT,\ 585 SOC_BLK_PGW_GE,\ 586 SOC_BLK_PGW_GE8P,\ 587 SOC_BLK_FMAC,\ 588 SOC_BLK_MACSEC,\ 589 SOC_BLK_MXQ,\ 590 SOC_BLOCK_TYPE_INVALID\ 591 592 #define SOC_BLK_HGPORT_INITIALIZER \ 593 SOC_BLK_IPIPE_HI,\ 594 SOC_BLOCK_TYPE_INVALID\ 595 596 /* 597 * Naming of blocks (there are two such arrays, one for 598 * block based naming and one for port based naming) 599 * Last entry has blk of SOC_BLK_NONE. 600 */ 601 typedef struct { 602 soc_block_t blk; /* block bits to match */ 603 int isalias; /* this name is an alias */ 604 char *name; /* printable name */ 605 } soc_block_name_t; 606 607 /* used to intialize soc_block_name_t soc_block_port_names[] */ 608 #define SOC_BLOCK_PORT_NAMES_INITIALIZER { \ 609 /* blk , isalias, name */ \ 610 { SOC_BLK_EPIC, 0, "fe" }, \ 611 { SOC_BLK_GPIC, 0, "ge" }, \ 612 { SOC_BLK_GPORT, 0, "ge" }, \ 613 { SOC_BLK_GXPORT, 0, "hg" }, \ 614 { SOC_BLK_XGPORT, 0, "ge" }, \ 615 { SOC_BLK_QGPORT, 0, "ge" }, \ 616 { SOC_BLK_XQPORT, 0, "ge" }, \ 617 { SOC_BLK_SPORT, 0, "ge" }, \ 618 { SOC_BLK_HPIC, 0, "hg" }, \ 619 { SOC_BLK_IPIC, 0, "hg" }, \ 620 { SOC_BLK_XPIC, 0, "xe" }, \ 621 { SOC_BLK_XPORT, 0, "hg" }, \ 622 { SOC_BLK_CMIC, 0, "cpu" }, \ 623 { SOC_BLK_CPIC, 0, "cpu" }, \ 624 { SOC_BLK_SPI, 0, "spi" }, \ 625 { SOC_BLK_EXP, 0, "exp" }, \ 626 { SOC_BLK_LBPORT, 0, "lb" }, \ 627 { SOC_BLK_CPU, 0, "cpu" }, \ 628 { SOC_BLK_AXP, 0, "ax" }, \ 629 { SOC_BLK_XLPORT, 0, "xl" }, \ 630 { SOC_BLK_XLPORTB0, 0, "xlb0" }, \ 631 { SOC_BLK_CPORT, 0, "ce" }, \ 632 { SOC_BLK_CLPORT, 0, "cl" }, \ 633 { SOC_BLK_CDPORT, 0, "cd" }, \ 634 { SOC_BLK_CLG2PORT, 0, "clg2" }, \ 635 { SOC_BLK_XTPORT, 0, "xt" }, \ 636 { SOC_BLK_MXQPORT, 0, "mxq" }, \ 637 { SOC_BLK_XWPORT, 0, "xw" }, \ 638 { SOC_BLK_MXQPORT, 0, "mxq" }, \ 639 { SOC_BLK_PGW_CL, 0, "pgw_cl"}, \ 640 { SOC_BLK_CXXPORT, 0, "cxx" }, \ 641 { SOC_BLK_CPRI, 0, "cpri" }, \ 642 { SOC_BLK_RDB, 0, "rdb" }, \ 643 { SOC_BLK_BCPORT, 0, "bcport"}, \ 644 { SOC_BLK_PMQ, 0, "pmq" }, \ 645 { SOC_BLK_PGW_GE, 0, "pgw_ge"}, \ 646 { SOC_BLK_MACSEC, 0, "msec" }, \ 647 { SOC_BLK_PGW_GE8P, 0, "pgw_ge8p"}, \ 648 { SOC_BLK_MACSEC, 0, "msec" }, \ 649 { SOC_BLK_NONE, 0, "" } } 650 651 /* used to intialize soc_block_name_t soc_block_names[] */ 652 #define SOC_BLOCK_NAMES_INITIALIZER { \ 653 /* blk , isalias, name */ \ 654 { SOC_BLK_EPIC, 0, "epic" }, \ 655 { SOC_BLK_GPIC, 0, "gpic" }, \ 656 { SOC_BLK_HPIC, 0, "hpic" }, \ 657 { SOC_BLK_IPIC, 0, "ipic" }, \ 658 { SOC_BLK_XPIC, 0, "xpic" }, \ 659 { SOC_BLK_CMIC, 0, "cmic" }, \ 660 { SOC_BLK_CPIC, 0, "cpic" }, \ 661 { SOC_BLK_ARL, 0, "arl" }, \ 662 { SOC_BLK_MMU, 0, "mmu" }, \ 663 { SOC_BLK_MMU_SED, 0, "mmu_sed" }, \ 664 { SOC_BLK_MMU_GLB, 0, "mmu_glb" }, \ 665 { SOC_BLK_MMU_SC, 0, "mmu_sc" }, \ 666 { SOC_BLK_MMU_XPE, 0, "mmu_xpe" }, \ 667 { SOC_BLK_MMU_SED, 0, "mmu_sed" }, \ 668 { SOC_BLK_MMU_ITM, 0, "mmu_itm" }, \ 669 { SOC_BLK_MMU_EB, 0, "mmu_eb" }, \ 670 { SOC_BLK_MCU, 0, "mcu" }, \ 671 { SOC_BLK_GPORT, 0, "gport" }, \ 672 { SOC_BLK_XPORT, 0, "xport" }, \ 673 { SOC_BLK_GXPORT, 0, "gxport" }, \ 674 { SOC_BLK_XLPORT, 0, "xlport" }, \ 675 { SOC_BLK_XLPORTB0, 0, "xlb0port" }, \ 676 { SOC_BLK_MXQPORT, 0, "mxqport" }, \ 677 { SOC_BLK_XGPORT, 0, "xgport" }, \ 678 { SOC_BLK_QGPORT, 0, "qgport" }, \ 679 { SOC_BLK_XQPORT, 0, "xqport" }, \ 680 { SOC_BLK_SPORT, 0, "sport" }, \ 681 { SOC_BLK_IPIPE, 0, "ipipe" }, \ 682 { SOC_BLK_IPIPE_HI, 0, "ipipe_hi" }, \ 683 { SOC_BLK_EPIPE, 0, "epipe" }, \ 684 { SOC_BLK_EPIPE_HI, 0, "epipe_hi" }, \ 685 { SOC_BLK_IGR, 0, "igr" }, \ 686 { SOC_BLK_EGR, 0, "egr" }, \ 687 { SOC_BLK_BSE, 0, "bse" }, \ 688 { SOC_BLK_IL, 0, "intl" }, \ 689 { SOC_BLK_MS_ISEC, 0, "ms_isec" }, \ 690 { SOC_BLK_MS_ESEC, 0, "ms_esec" }, \ 691 { SOC_BLK_CW, 0, "cw" }, \ 692 { SOC_BLK_CSE, 0, "cse" }, \ 693 { SOC_BLK_HSE, 0, "hse" }, \ 694 { SOC_BLK_BSAFE, 0, "bsafe" }, \ 695 { SOC_BLK_ESM, 0, "esm"}, \ 696 { SOC_BLK_EPIC, 1, "e" }, \ 697 { SOC_BLK_GPIC, 1, "g" }, \ 698 { SOC_BLK_HPIC, 1, "h" }, \ 699 { SOC_BLK_IPIC, 1, "i" }, \ 700 { SOC_BLK_XPIC, 1, "x" }, \ 701 { SOC_BLK_CMIC, 1, "cpu" }, \ 702 { SOC_BLK_OTPC, 1, "otpc" }, \ 703 { SOC_BLK_SPI, 0, "spi" }, \ 704 { SOC_BLK_LBPORT, 0, "lb" }, \ 705 { SOC_BLK_TOP, 0, "top" }, \ 706 { SOC_BLK_SER, 0, "ser" }, \ 707 { SOC_BLK_AVS, 0, "avs" }, \ 708 { SOC_BLK_ISM, 0, "ism" }, \ 709 { SOC_BLK_ETU, 0, "etu" }, \ 710 { SOC_BLK_IBOD, 0, "ibod" }, \ 711 { SOC_BLK_AXP, 0, "ax" }, \ 712 { SOC_BLK_XLPORT, 0, "xlport" }, \ 713 { SOC_BLK_XLPORTB0, 0, "xlb0port" }, \ 714 { SOC_BLK_CLPORT, 0, "clport" }, \ 715 { SOC_BLK_CDPORT, 0, "cdport" }, \ 716 { SOC_BLK_CDMAC, 0, "cdmac" }, \ 717 { SOC_BLK_CLG2PORT, 0, "clg2port" }, \ 718 { SOC_BLK_CPORT, 0, "cport" }, \ 719 { SOC_BLK_XTPORT, 0, "xtport" }, \ 720 { SOC_BLK_XWPORT, 0, "xwport" }, \ 721 { SOC_BLK_PORT_GROUP4, 0, "port_group4" }, \ 722 { SOC_BLK_PORT_GROUP5, 0, "port_group5" }, \ 723 { SOC_BLK_PGW_CL, 0, "pgw_cl" }, \ 724 { SOC_BLK_CPU, 0, "cpu" }, \ 725 { SOC_BLK_CI, 0, "ci" }, \ 726 { SOC_BLK_TXLP, 0, "txlp" }, \ 727 { SOC_BLK_RXLP, 0, "rxlp" }, \ 728 { SOC_BLK_IECELL, 0, "iecell" }, \ 729 { SOC_BLK_BROADSCAN, 0, "broadscan" }, \ 730 { SOC_BLK_LLS, 0, "lls" }, \ 731 { SOC_BLK_CES, 0, "ces" }, \ 732 { SOC_BLK_CEV, 0, "cev" }, \ 733 { SOC_BLK_MS_ISEC, 0, "ms_isec" }, \ 734 { SOC_BLK_MS_ESEC, 0, "ms_esec" }, \ 735 { SOC_BLK_PGW_CL, 0, "pgw_cl" }, \ 736 { SOC_BLK_IPROC, 0, "iproc" }, \ 737 { SOC_BLK_PMQ, 0, "pmq" }, \ 738 { SOC_BLK_CXXPORT, 0, "cxxport" }, \ 739 { SOC_BLK_CPRI, 0, "cpri" }, \ 740 { SOC_BLK_TSCF, 0, "cpri" }, \ 741 { SOC_BLK_RDB, 0, "rdb" }, \ 742 { SOC_BLK_BCPORT, 0, "bcport"}, \ 743 { SOC_BLK_PGW_GE, 0, "pgw_ge" }, \ 744 { SOC_BLK_MACSEC, 0, "msec" }, \ 745 { SOC_BLK_CCH, 0, "cch_pseudo"}, \ 746 { SOC_BLK_CRYPTO, 0, "crypto" }, \ 747 { SOC_BLK_PGW_GE8P, 0, "pgw_ge8p" }, \ 748 { SOC_BLK_PMQPORT, 0, "pmqport" }, \ 749 { SOC_BLK_TAF, 0, "taf" }, \ 750 { SOC_BLK_NONE, 0, "" } } 751 752 /* used to initialize soc_block_name_t soc_dpp_block_names[] */ 753 #define SOC_BLOCK_DPP_NAMES_INITIALIZER { \ 754 /* blk , isalias, name */ \ 755 {SOC_BLK_CFC, 0, "CFC"}, \ 756 {SOC_BLK_DPI, 0, "DPI"}, \ 757 {SOC_BLK_DRC, 0, "DRC"}, \ 758 {SOC_BLK_ECI, 0, "ECI"}, \ 759 {SOC_BLK_EGQ, 0, "EGQ"}, \ 760 {SOC_BLK_EPNI, 0, "EPNI"}, \ 761 {SOC_BLK_FCR, 0, "FCR"}, \ 762 {SOC_BLK_MMU, 0, "MMU"}, \ 763 {SOC_BLK_MMU_SED, 0, "MMU_SED"}, \ 764 {SOC_BLK_MMU_GLB, 0, "MMU_GLB"}, \ 765 {SOC_BLK_MMU_SC, 0, "MMU_SC"}, \ 766 {SOC_BLK_MMU_XPE, 0, "MMU_XPE"}, \ 767 {SOC_BLK_MMU_SED, 0, "MMU_SED"}, \ 768 {SOC_BLK_FCT, 0, "FCT"}, \ 769 {SOC_BLK_FDR, 0, "FDR"}, \ 770 {SOC_BLK_FDA, 0, "FDA"}, \ 771 {SOC_BLK_FDT, 0, "FDT"}, \ 772 {SOC_BLK_MESH_TOPOLOGY, 0, "MESH_TOPOLOGY"}, \ 773 {SOC_BLK_IDR, 0, "IDR"}, \ 774 {SOC_BLK_IHB, 0, "IHB"}, \ 775 {SOC_BLK_IHP, 0, "IHP"}, \ 776 {SOC_BLK_IPS, 0, "IPS"}, \ 777 {SOC_BLK_IPT, 0, "IPT"}, \ 778 {SOC_BLK_IQM, 0, "IQM"}, \ 779 {SOC_BLK_IRE, 0, "IRE"}, \ 780 {SOC_BLK_IRR, 0, "IRR"}, \ 781 {SOC_BLK_MAC, 0, "MAC"}, \ 782 {SOC_BLK_MBU, 0, "MBU"}, \ 783 {SOC_BLK_MCC, 0, "MCC"}, \ 784 {SOC_BLK_MSW, 0, "MSW"}, \ 785 {SOC_BLK_NBI, 0, "NBI"}, \ 786 {SOC_BLK_NIF, 0, "NIF"}, \ 787 {SOC_BLK_NIF_MAL, 0, "NIF_MAL"}, \ 788 {SOC_BLK_OLP, 0, "OLP"}, \ 789 {SOC_BLK_QDR, 0, "QDR"}, \ 790 {SOC_BLK_RTP, 0, "RTP"}, \ 791 {SOC_BLK_SCH, 0, "SCH"}, \ 792 {SOC_BLK_OCB, 0, "OCB"}, \ 793 {SOC_BLK_CRPS, 0, "CRPS"}, \ 794 {SOC_BLK_FMAC, 0, "FMAC"}, \ 795 {SOC_BLK_XLP, 0, "XLP"}, \ 796 {SOC_BLK_CLP, 0, "CLP"}, \ 797 {SOC_BLK_CGM, 0, "CGM"}, \ 798 {SOC_BLK_OAMP, 0, "OAMP"}, \ 799 {SOC_BLK_FSRD, 0, "FSRD"}, \ 800 {SOC_BLK_DRCA, 0, "DRCA"}, \ 801 {SOC_BLK_DRCB, 0, "DRCB"}, \ 802 {SOC_BLK_DRCC, 0, "DRCC"}, \ 803 {SOC_BLK_DRCD, 0, "DRCD"}, \ 804 {SOC_BLK_DRCE, 0, "DRCE"}, \ 805 {SOC_BLK_DRCF, 0, "DRCF"}, \ 806 {SOC_BLK_DRCG, 0, "DRCG"}, \ 807 {SOC_BLK_DRCH, 0, "DRCH"}, \ 808 {SOC_BLK_BRDC_FMAC ,0, "BRDC_FMAC"}, \ 809 {SOC_BLK_BRDC_FSRD,0, "BRDC_FSRD"}, \ 810 {SOC_BLK_BRDC_HBC ,0, "BRDC_HBC"}, \ 811 {SOC_BLK_BRDC_DRC,0, "SOC_BLK_BRDC_DRC"}, \ 812 {SOC_BLK_DRCBROADCAST, 0, "DRCBROADCAST"}, \ 813 {SOC_BLK_BRDC_CGM ,0, "BRDC_CGM"}, \ 814 {SOC_BLK_BRDC_EGQ ,0, "BRDC_EGQ"}, \ 815 {SOC_BLK_BRDC_EPNI ,0, "BRDC_EPNI"}, \ 816 {SOC_BLK_BRDC_IHB ,0, "BRDC_IHB"}, \ 817 {SOC_BLK_BRDC_IHP ,0, "BRDC_IHP"}, \ 818 {SOC_BLK_BRDC_IPS ,0, "BRDC_IPS"}, \ 819 {SOC_BLK_BRDC_IQM ,0, "BRDC_IQM"}, \ 820 {SOC_BLK_BRDC_SCH ,0, "BRDC_SCH"}, \ 821 {SOC_BLK_BRDC_MRPS, 0, "BRDC_MRPS"}, \ 822 {SOC_BLK_BRDC_MTRPS_EM, 0, "BRDC_MTRPS_EM"}, \ 823 {SOC_BLK_PRM, 0, "PRM"}, \ 824 {SOC_BLK_BLH, 0, "BLH"}, \ 825 {SOC_BLK_AM_TOP, 0, "AM_TOP"}, \ 826 {SOC_BLK_OCCG, 0, "OCCG"}, \ 827 {SOC_BLK_CCH, 0, "CCH"}, \ 828 {SOC_BLK_DCH, 0, "DCH"}, \ 829 {SOC_BLK_DCL, 0, "DCL"}, \ 830 {SOC_BLK_DCMA, 0, "DCMA"}, \ 831 {SOC_BLK_DCMB, 0, "DCMB"}, \ 832 {SOC_BLK_DCMC, 0, "DCMC"}, \ 833 {SOC_BLK_CCS, 0, "CCS"}, \ 834 {SOC_BLK_BRDC_FMACH,0, "BRDC_FMACH"}, \ 835 {SOC_BLK_BRDC_FMACL,0, "BRDC_FMACL"}, \ 836 {SOC_BLK_CMIC, 0, "CMIC"}, \ 837 {SOC_BLK_IPROC, 0, "IPROC"}, \ 838 {SOC_BLK_DCM, 0, "DCM"}, \ 839 {SOC_BLK_BRDC_DCH, 0, "BRDC_DCH"}, \ 840 {SOC_BLK_BRDC_DCM, 0, "BDRC_DCM"}, \ 841 {SOC_BLK_BRDC_DCL, 0, "BRDC_DCL"}, \ 842 {SOC_BLK_BRDC_CCS, 0, "BRDC_CCS"}, \ 843 {SOC_BLK_BRDC_FMAC_AC, 0,"BRDC_FMAC_AC"}, \ 844 {SOC_BLK_BRDC_FMAC_BD, 0,"BRDC_FMAC_BD"}, \ 845 {SOC_BLK_DCML, 0, "DCML"}, \ 846 {SOC_BLK_MCT, 0, "MCT"}, \ 847 {SOC_BLK_QRH, 0, "QRH"}, \ 848 {SOC_BLK_LCM, 0, "LCM"},\ 849 {SOC_BLK_BRDC_DCML, 0, "BRDC_DCML"}, \ 850 {SOC_BLK_BRDC_CCH, 0, "BRDC_CCH"}, \ 851 {SOC_BLK_BRDC_LCM, 0, "BRDC_LCM"}, \ 852 {SOC_BLK_BRDC_QRH, 0, "BRDC_QRH"}, \ 853 /* JERICHO */ {SOC_BLK_EDB, 0, "EDB"}, \ 854 {SOC_BLK_MRPS, 0, "MRPS"}, \ 855 {SOC_BLK_MTRPS_EM, 0, "MRPS_EM"}, \ 856 {SOC_BLK_ILKN_PMH, 0, "ILKN_PMH"}, \ 857 {SOC_BLK_IPST, 0, "IPST"}, \ 858 {SOC_BLK_ILKN_PML, 0, "ILKN_PML"}, \ 859 {SOC_BLK_IQMT, 0, "IQMT"}, \ 860 {SOC_BLK_PPDB_A, 0, "PPDB_A"}, \ 861 {SOC_BLK_PPDB_B, 0, "PPDB_B"}, \ 862 {SOC_BLK_NBIL, 0, "NBIL"}, \ 863 {SOC_BLK_NBIH, 0, "NBIH"}, \ 864 {SOC_BLK_GPORT, 0, "GPORT"},\ 865 {SOC_BLK_PMQ, 0, "PMQ"},\ 866 {SOC_BLK_BRDC_GPORT,0, "BRDC_GPORT"},\ 867 {SOC_BLK_BRDC_XPL, 0, "BRDC_XPL"},\ 868 {SOC_BLK_BRDC_CPL, 0, "BRDC_CPL"},\ 869 {SOC_BLK_BRDC_PMQ, 0, "BRDC_PMQ"},\ 870 {SOC_BLK_KAPS, 0, "KAPS"},\ 871 /* QAX */ {SOC_BLK_ILB, 0, "ILB"},\ 872 {SOC_BLK_IEP, 0, "IEP"},\ 873 {SOC_BLK_IMP, 0, "IMP"},\ 874 {SOC_BLK_PTS, 0, "PTS"},\ 875 {SOC_BLK_SPB, 0, "SPB"},\ 876 {SOC_BLK_ITE, 0, "ITE"},\ 877 {SOC_BLK_DDP, 0, "DDP"},\ 878 {SOC_BLK_TXQ, 0, "TXQ"},\ 879 {SOC_BLK_TAR, 0, "TAR"},\ 880 {SOC_BLK_PEM, 0, "PEM"},\ 881 {SOC_BLK_SQM, 0, "SQM"},\ 882 {SOC_BLK_DQM, 0, "DQM"},\ 883 {SOC_BLK_ECGM, 0, "ECGM"},\ 884 {SOC_BLK_IDB, 0, "IDB"},\ 885 {SOC_BLK_IPSEC, 0, "IPSEC"},\ 886 {SOC_BLK_IPSEC_SPU_WRAPPER_TOP, 0, "IPSEC_SWT"},\ 887 {SOC_BLK_BRDC_IPSEC_SPU_WRAPPER_TOP, 0, "BRDC_IPSEC_SWT"},\ 888 {SOC_BLK_KAPS_BBS, 0, "KAPS_BBS"},\ 889 {SOC_BLK_MTM, 0, "MTM"},\ 890 {SOC_BLK_PDM, 0, "PDM"},\ 891 {SOC_BLK_SIF, 0, "SIF"},\ 892 {SOC_BLK_BDM, 0, "BDM"},\ 893 {SOC_BLK_ILU, 0, "ILU"},\ 894 {SOC_BLK_IPPA, 0, "IPPA"},\ 895 {SOC_BLK_IPPB, 0, "IPPB"},\ 896 {SOC_BLK_IPPC, 0, "IPPC"},\ 897 {SOC_BLK_IPPD, 0, "IPPD"},\ 898 {SOC_BLK_ITPP, 0, "ITPP"},\ 899 {SOC_BLK_ITPPD, 0, "ITPPD"},\ 900 {SOC_BLK_MACT, 0, "MACT"},\ 901 {SOC_BLK_MCP, 0, "MCP"},\ 902 {SOC_BLK_MDB, 0, "MDB"},\ 903 {SOC_BLK_NMG, 0, "NMG"},\ 904 {SOC_BLK_RQP, 0, "RQP"},\ 905 {SOC_BLK_CDU, 0, "CDU"},\ 906 {SOC_BLK_EPS, 0, "EPS"},\ 907 {SOC_BLK_EPS_SPR, 0, "EPS_SPR"},\ 908 {SOC_BLK_ERPP, 0, "ERPP"},\ 909 {SOC_BLK_ETPPA, 0, "ETPPA"},\ 910 {SOC_BLK_ETPPB, 0, "ETPPB"},\ 911 {SOC_BLK_FQP, 0, "FQP"},\ 912 {SOC_BLK_HBM, 0, "HBM"},\ 913 {SOC_BLK_PQP, 0, "PQP"},\ 914 {SOC_BLK_HBMC, 0, "HBMC"},\ 915 {SOC_BLK_BRDC_KAPS_BBS, 0, "BRDC_KAPS_BBS"},\ 916 {SOC_BLK_CDUM, 0, "CDUM"},\ 917 {SOC_BLK_CXX, 0, "CXX"},\ 918 {SOC_BLK_DDHA, 0, "DDHA"},\ 919 {SOC_BLK_DDHB, 0, "DDHB"},\ 920 {SOC_BLK_DEBUG, 0, "DEBUG"},\ 921 {SOC_BLK_DHC, 0, "DHC"},\ 922 {SOC_BLK_DMU, 0, "DMU"},\ 923 {SOC_BLK_DPRCA, 0, "DPRCA"},\ 924 {SOC_BLK_DPRCB, 0, "DPRCB"},\ 925 {SOC_BLK_DPRCC, 0, "DPRCC"},\ 926 {SOC_BLK_EDB, 0, "EDB"},\ 927 {SOC_BLK_EMPTY, 0, "EMPTY"},\ 928 {SOC_BLK_ETPPC, 0, "ETPPC"},\ 929 {SOC_BLK_EVNT, 0, "EVNT"},\ 930 {SOC_BLK_HBC, 0, "HBC"},\ 931 {SOC_BLK_ILB, 0, "ILB"},\ 932 {SOC_BLK_ILE, 0, "ILE"},\ 933 {SOC_BLK_CLU, 0, "CLU"},\ 934 {SOC_BLK_CLUP, 0, "CLUP"},\ 935 {SOC_BLK_CLMAC, 0, "CLMAC"},\ 936 {SOC_BLK_ESB, 0, "ESB"},\ 937 {SOC_BLK_IPPE, 0, "IPPE"},\ 938 {SOC_BLK_MXQ, 0, "MXQ"},\ 939 {SOC_BLK_PLL, 0, "PLL"},\ 940 {SOC_BLK_PMH, 0, "PMH"},\ 941 {SOC_BLK_EPRE, 0, "EPRE"},\ 942 {SOC_BLK_IPPF, 0, "IPPF"},\ 943 {SOC_BLK_CDPORT, 0, "CDPORT"},\ 944 {SOC_BLK_CDMAC, 0, "CDMAC"},\ 945 {SOC_BLK_MDB_ARM, 0, "MDB_ARM"},\ 946 {SOC_BLK_FDTL, 0, "FDTL"},\ 947 {SOC_BLK_TCAM, 0, "TCAM"},\ 948 {SOC_BLK_TDU, 0, "TDU"},\ 949 /* QUX */{SOC_BLK_MXQ, 0, "MXQ"},\ 950 /* FLAIR */{SOC_BLK_PLL, 0, "PLL"},\ 951 {SOC_BLK_NONE, 0, "" }} 952 953 954 #define SOC_BLOCK_DPP_PORT_NAMES_INITIALIZER { \ 955 /* blk , isalias, name */ \ 956 { SOC_BLK_NONE, 0, "" }} 957 958 typedef union { 959 soc_reg_t en_reg; 960 soc_mem_t en_mem; 961 } _soc_ser_ctrl_type_t; 962 963 typedef struct _soc_ser_ctrl_info_s{ 964 _soc_ser_ctrl_type_t ctrl_type; 965 uint8 flag_reg_mem; 966 soc_field_t en_fld; 967 int en_fld_position; 968 } _soc_ser_ctrl_info_t; 969 970 typedef struct { 971 soc_mem_t mem; 972 _soc_ser_ctrl_info_t en_ctrl; 973 _soc_ser_ctrl_info_t ecc1b_ctrl; 974 } _soc_mem_ser_en_info_t; 975 976 typedef struct { 977 soc_reg_t reg; 978 _soc_ser_ctrl_info_t en_ctrl; 979 _soc_ser_ctrl_info_t ecc1b_ctrl; 980 int action; /* clear 0, restore 1 */ 981 } _soc_reg_ser_en_info_t; 982 983 typedef struct { 984 char bus_name[64]; 985 soc_reg_t en_reg; 986 soc_field_t en_fld; 987 soc_reg_t ecc1b_en_reg; 988 soc_field_t ecc1b_en_fld; 989 } _soc_bus_ser_en_info_t; 990 991 typedef struct { 992 char buffer_name[64]; 993 soc_reg_t en_reg; 994 soc_field_t en_fld; 995 soc_reg_t ecc1b_en_reg; 996 soc_field_t ecc1b_en_fld; 997 } _soc_buffer_ser_en_info_t; 998 999 typedef struct { 1000 soc_mem_t mem; 1001 soc_reg_t enable_reg; 1002 soc_field_t enable_field; 1003 soc_field_t parity_field; /* used to sw inject test */ 1004 } _soc_tcam_ser_en_info_t; 1005 1006 typedef struct { 1007 char name[64]; 1008 soc_reg_t force_reg; 1009 soc_field_t force_fld; 1010 } _soc_bus_buffer_ser_force_info_t; 1011 /* 1012 * soc_feature_fun_t: boolean function indicating if feature is supported 1013 * Used in bcm*.i files. 1014 */ 1015 typedef int (*soc_feature_fun_t) (int unit, soc_feature_t feature); 1016 1017 /* 1018 * soc_init_chip_fun_t: chip initialization function 1019 * Used in bcm*.i files. 1020 */ 1021 typedef void (*soc_init_chip_fun_t) (void); 1022 1023 /* Use macros to access */ 1024 extern soc_chip_groups_t soc_chip_type_map[SOC_CHIP_TYPES_COUNT]; 1025 extern char *soc_chip_type_names[SOC_CHIP_TYPES_COUNT]; 1026 extern char *soc_chip_group_names[SOC_CHIP_GROUPS_COUNT]; 1027 extern uint32 soc_ports_list[][8]; 1028 extern soc_numelport_set_t soc_numelports_list[][5]; 1029 1030 #define SOC_CHIP_NAME(type) (soc_chip_type_names[(type)]) 1031 1032 #endif /* !_SOC_CHIP_H */ 1033