sram.h (1664B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: sram.h 8 */ 9 #ifndef _SHR_SRAM_H 10 #define _SHR_SRAM_H 11 12 /* External DDR2_SRAM interface */ 13 #define _SHR_EXT_SRAM_CSE_MODE 0 14 #define _SHR_EXT_SRAM_HSE_MODE 1 15 16 typedef struct _shr_ext_sram_entry_s { 17 int addr0; /* Address register for data0 (always valid) */ 18 int addr1; /* Address register for data1 (-1 for invalid) */ 19 uint32 data0[8]; /* Data register 0 */ 20 uint32 data1[8]; /* Data register 1 */ 21 int wdoebr; /* wdoeb_rise */ 22 int wdoebf; /* wdoeb_fall */ 23 int wdmr; /* write data mask rise */ 24 int wdmf; /* write data mask fall */ 25 int rdmr; /* read data mask rise */ 26 int rdmf; /* read data mask fall */ 27 int test_mode; /* 00:WW, 01:RR, 10:WR 11:WW-RR */ 28 int adr_mode; /* 00:ALT_A0A1, 01:INC1, 10:INC2, 11:ONLY_A0 */ 29 int latency; /* 0:read data in 8 mclks, 1:7 mclks */ 30 int em_if_type; /* 1: ext mem if type qdr2, 0: ddr2 type */ 31 int em_fall_rise; /* 1: use fall_rise for compare, 0: use rise_fall for compare */ 32 int w2r_nops; /* num nops between write to read - for ddr2 */ 33 int r2w_nops; /* num nops between read to write - for ddr2 */ 34 int err_cnt; /* Error count */ 35 int err_bmp; /* Error bit map */ 36 uint32 err_addr; /* Error address */ 37 uint32 err_data[8]; /* Error data */ 38 } _shr_ext_sram_entry_t; 39 40 #endif /* _SHR_SRAM_H */