port_ability.h (17236B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * This file defines common network port modes. 8 * 9 * Its contents are not used directly by applications; it is used only 10 * by header files of parent APIs which need to define port modes. 11 */ 12 13 #ifndef _SHR_PORTABILITY_H 14 #define _SHR_PORTABILITY_H 15 16 typedef unsigned int _shr_pa_encap_t; 17 18 typedef struct _shr_port_ability_s { 19 _shr_port_mode_t speed_half_duplex; 20 _shr_port_mode_t speed_full_duplex; 21 _shr_port_mode_t pause; 22 _shr_port_mode_t interface; 23 _shr_port_mode_t medium; 24 _shr_port_mode_t loopback; 25 _shr_port_mode_t flags; 26 _shr_port_mode_t eee; 27 _shr_port_mode_t rsvd; 28 _shr_pa_encap_t encap; 29 _shr_port_mode_t fec; 30 _shr_port_mode_t channel; 31 } _shr_port_ability_t; 32 33 #define _SHR_PA_ABILITY_ALL (0xffffffff) 34 #define _SHR_PA_ABILITY_NONE (0) 35 36 /* 37 * Defines: 38 * _SHR_PA_ENCAP_* 39 * Purpose: 40 * Defines for port encapsulations. 41 */ 42 43 #define _SHR_PA_ENCAP_IEEE (1 << 0) 44 #define _SHR_PA_ENCAP_HIGIG (1 << 1) 45 #define _SHR_PA_ENCAP_B5632 (1 << 2) 46 #define _SHR_PA_ENCAP_HIGIG2 (1 << 3) 47 #define _SHR_PA_ENCAP_HIGIG2_L2 (1 << 4) 48 #define _SHR_PA_ENCAP_HIGIG2_IP_GRE (1 << 5) 49 #define _SHR_PA_ENCAP_OBSOLETE (1 << 6) 50 #define _SHR_PA_ENCAP_HIGIG2_LITE (1 << 7) 51 #define _SHR_PA_ENCAP_HIGIG_OVER_ETHERNET (1 << 8) 52 #define _SHR_PA_ENCAP_CPRI (1 << 9) 53 #define _SHR_PA_ENCAP_RSVD4 (1 << 10) 54 55 #define _SHR_PA_ENCAP_STRING {"IEEE", \ 56 "HIGIG", \ 57 "B5632", \ 58 "HIGIG2", \ 59 "HIGIG2_L2", \ 60 "HIGIG2_IP_GRE", \ 61 "OBSOLETE", \ 62 "HIGIG2_LITE", \ 63 "HIGIG_OVER_ETHERNET",\ 64 "CPRI",\ 65 "RSVD4"} 66 67 68 /* 69 * Defines: 70 * _SHR_PA_SPEED_* 71 * Purpose: 72 * Defines for half duplex port speeds. 73 */ 74 #define _SHR_PA_SPEED_10MB (1 << 0) 75 #define _SHR_PA_SPEED_EXTENDED (1 << 1) 76 #define _SHR_PA_SPEED_27GB (1 << 2) 77 #define _SHR_PA_SPEED_50GB (1 << 3) 78 #define _SHR_PA_SPEED_53GB (1 << 4) 79 #define _SHR_PA_SPEED_100MB (1 << 5) 80 #define _SHR_PA_SPEED_1000MB (1 << 6) 81 #define _SHR_PA_SPEED_2500MB (1 << 7) 82 #define _SHR_PA_SPEED_3000MB (1 << 8) 83 #define _SHR_PA_SPEED_5000MB (1 << 9) 84 #define _SHR_PA_SPEED_6000MB (1 << 10) 85 #define _SHR_PA_SPEED_10GB (1 << 11) 86 #define _SHR_PA_SPEED_11GB (1 << 12) 87 #define _SHR_PA_SPEED_12GB (1 << 13) 88 #define _SHR_PA_SPEED_12P5GB (1 << 14) 89 #define _SHR_PA_SPEED_13GB (1 << 15) 90 #define _SHR_PA_SPEED_15GB (1 << 16) 91 #define _SHR_PA_SPEED_16GB (1 << 17) 92 #define _SHR_PA_SPEED_20GB (1 << 18) 93 #define _SHR_PA_SPEED_21GB (1 << 19) 94 #define _SHR_PA_SPEED_23GB (1 << 20) 95 #define _SHR_PA_SPEED_24GB (1 << 21) 96 #define _SHR_PA_SPEED_25GB (1 << 22) 97 #define _SHR_PA_SPEED_30GB (1 << 23) 98 #define _SHR_PA_SPEED_40GB (1 << 24) 99 #define _SHR_PA_SPEED_42GB (1 << 25) 100 #define _SHR_PA_SPEED_100GB (1 << 26) 101 #define _SHR_PA_SPEED_120GB (1 << 27) 102 #define _SHR_PA_SPEED_127GB (1 << 28) 103 #define _SHR_PA_SPEED_106GB (1 << 29) 104 #define _SHR_PA_SPEED_48GB (1 << 30) 105 #define _SHR_PA_SPEED_32GB (1 << 31) 106 107 #define _SHR_PA_SPEED_STRING {"10MB", \ 108 "", \ 109 "27GB", \ 110 "50GB", \ 111 "53GB", \ 112 "100MB", \ 113 "1000MB", \ 114 "2500MB", \ 115 "3000MB", \ 116 "5000MB", \ 117 "6000MB", \ 118 "10GB", \ 119 "11GB", \ 120 "12GB", \ 121 "12P5GB", \ 122 "13GB", \ 123 "15GB", \ 124 "16GB", \ 125 "20GB", \ 126 "21GB", \ 127 "23GB", \ 128 "24GB", \ 129 "25GB", \ 130 "30GB", \ 131 "40GB", \ 132 "42GB", \ 133 "100GB", \ 134 "120GB", \ 135 "127GB", \ 136 "106GB", \ 137 "48GB", \ 138 "32GB" } 139 /* 140 * Defines: 141 * _SHR_PA_PAUSE_* 142 * Purpose: 143 * Defines for flow control abilities. 144 */ 145 #define _SHR_PA_PAUSE_TX (1 << 0) /* TX pause capable */ 146 #define _SHR_PA_PAUSE_RX (1 << 1) /* RX pause capable */ 147 #define _SHR_PA_PAUSE_ASYMM (1 << 2) /* Asymm pause capable (R/O) */ 148 149 #define _SHR_PA_PAUSE_STRING {"PAUSE_TX", \ 150 "PAUSE_RX", \ 151 "PAUSE_ASYMM"} 152 153 /* 154 * Defines: 155 * _SHR_PA_FEC_* 156 * Purpose: 157 * Defines for FEC abilities. 158 */ 159 160 #define _SHR_PA_FEC_NONE (1 << 0) /* FEC is not requested */ 161 #define _SHR_PA_FEC_CL74 (1 << 1) /* FEC CL74 ability request */ 162 #define _SHR_PA_FEC_CL91 (1 << 2) /* FEC Cl91 ability request */ 163 #define _SHR_PA_FEC_STRING {"FEC_NONE", \ 164 "FEC_CL74", \ 165 "FEC_CL91"} 166 167 168 /* 169 * Defines: 170 * _SHR_PA_INTF_* 171 * Purpose: 172 * Defines for port interfaces supported. 173 */ 174 #define _SHR_PA_INTF_TBI (1 << 0) /* TBI mode supported */ 175 #define _SHR_PA_INTF_MII (1 << 1) /* MII mode supported */ 176 #define _SHR_PA_INTF_GMII (1 << 2) /* GMII mode supported */ 177 #define _SHR_PA_INTF_RGMII (1 << 3) /* RGMII mode supported */ 178 #define _SHR_PA_INTF_SGMII (1 << 4) /* SGMII mode supported */ 179 #define _SHR_PA_INTF_XGMII (1 << 5) /* XGMII mode supported */ 180 #define _SHR_PA_INTF_QSGMII (1 << 6) /* QSGMII mode supported */ 181 #define _SHR_PA_INTF_CGMII (1 << 7) /* CGMII mode supported */ 182 183 #define _SHR_PA_INTF_STRING {"TBI", \ 184 "MII", \ 185 "GMII", \ 186 "RGMII", \ 187 "SGMII", \ 188 "XGMII", \ 189 "QSGMII", \ 190 "CGMII"} 191 192 /* 193 * Defines: 194 * _SHR_PA_CHANNEL_* 195 * Purpose: 196 * Defines for CHANNEL abilities. 197 */ 198 199 #define _SHR_PA_CHANNEL_LONG (1 << 0) /* Channel is long */ 200 #define _SHR_PA_CHANNEL_SHORT (1 << 1) /* Channel is short */ 201 #define _SHR_PA_CHANNEL_STRING {"CHANNEL_LONG", \ 202 "CHANNEL_SHORT" } 203 204 /* 205 * Defines: 206 * _SHR_PA_MEDIUM_* 207 * Purpose: 208 * Defines for port medium modes. 209 */ 210 #define _SHR_PA_MEDIUM_COPPER (1 << 0) 211 #define _SHR_PA_MEDIUM_FIBER (1 << 1) 212 #define _SHR_PA_MEDIUM_BACKPLANE (1 << 2) 213 214 #define _SHR_PA_MEDIUM_STRING {"COPPER", \ 215 "FIBER", \ 216 "BACKPLANE"} 217 /* 218 * Defines: 219 * _SHR_PA_LOOPBACK_* 220 * Purpose: 221 * Defines for port loopback modes. 222 */ 223 #define _SHR_PA_LB_NONE (1 << 0) /* Useful for automated test */ 224 #define _SHR_PA_LB_MAC (1 << 1) /* MAC loopback supported */ 225 #define _SHR_PA_LB_PHY (1 << 2) /* PHY loopback supported */ 226 #define _SHR_PA_LB_LINE (1 << 3) /* PHY lineside loopback */ 227 228 #define _SHR_PA_LB_STRING {"LB_NONE", \ 229 "LB_MAC", \ 230 "LB_PHY", \ 231 "LB_LINE"} 232 233 /* 234 * Defines: 235 * _SHR_PA_FLAGS_* 236 * Purpose: 237 * Defines for the reest of port ability flags. 238 */ 239 #define _SHR_PA_AUTONEG (1 << 0) /* Auto-negotiation */ 240 #define _SHR_PA_COMBO (1 << 1) /* COMBO ports support both 241 * copper and fiber interfaces */ 242 #define _SHR_PA_FLAGS_STRING {"AUTONEG", \ 243 "COMBO"} 244 245 #define _SHR_PA_PAUSE (_SHR_PA_PAUSE_TX | _SHR_PA_PAUSE_RX) 246 247 #define _SHR_PA_SPEED_ALL (_SHR_PA_SPEED_EXTENDED | \ 248 _SHR_PA_SPEED_127GB | \ 249 _SHR_PA_SPEED_120GB | \ 250 _SHR_PA_SPEED_106GB | \ 251 _SHR_PA_SPEED_100GB | \ 252 _SHR_PA_SPEED_53GB | \ 253 _SHR_PA_SPEED_50GB | \ 254 _SHR_PA_SPEED_42GB | \ 255 _SHR_PA_SPEED_40GB | \ 256 _SHR_PA_SPEED_32GB | \ 257 _SHR_PA_SPEED_30GB | \ 258 _SHR_PA_SPEED_27GB | \ 259 _SHR_PA_SPEED_25GB | \ 260 _SHR_PA_SPEED_24GB | \ 261 _SHR_PA_SPEED_23GB | \ 262 _SHR_PA_SPEED_21GB | \ 263 _SHR_PA_SPEED_20GB | \ 264 _SHR_PA_SPEED_16GB | \ 265 _SHR_PA_SPEED_15GB | \ 266 _SHR_PA_SPEED_13GB | \ 267 _SHR_PA_SPEED_12P5GB | \ 268 _SHR_PA_SPEED_12GB | \ 269 _SHR_PA_SPEED_11GB | \ 270 _SHR_PA_SPEED_10GB | \ 271 _SHR_PA_SPEED_6000MB | \ 272 _SHR_PA_SPEED_5000MB | \ 273 _SHR_PA_SPEED_3000MB | \ 274 _SHR_PA_SPEED_2500MB | \ 275 _SHR_PA_SPEED_1000MB | \ 276 _SHR_PA_SPEED_100MB | \ 277 _SHR_PA_SPEED_10MB) 278 279 280 #define _SHR_PA_SPEED_MAX(m) (((m) & _SHR_PA_SPEED_127GB) ? 127000 : \ 281 ((m) & _SHR_PA_SPEED_120GB) ? 120000 : \ 282 ((m) & _SHR_PA_SPEED_106GB) ? 106000 : \ 283 ((m) & _SHR_PA_SPEED_100GB) ? 100000 : \ 284 ((m) & _SHR_PA_SPEED_53GB) ? 53000 : \ 285 ((m) & _SHR_PA_SPEED_50GB) ? 50000 : \ 286 ((m) & _SHR_PA_SPEED_42GB) ? 42000 : \ 287 ((m) & _SHR_PA_SPEED_40GB) ? 40000 : \ 288 ((m) & _SHR_PA_SPEED_32GB) ? 32000 : \ 289 ((m) & _SHR_PA_SPEED_30GB) ? 30000 : \ 290 ((m) & _SHR_PA_SPEED_27GB) ? 27000 : \ 291 ((m) & _SHR_PA_SPEED_25GB) ? 25000 : \ 292 ((m) & _SHR_PA_SPEED_24GB) ? 24000 : \ 293 ((m) & _SHR_PA_SPEED_23GB) ? 23000 : \ 294 ((m) & _SHR_PA_SPEED_21GB) ? 21000 : \ 295 ((m) & _SHR_PA_SPEED_20GB) ? 20000 : \ 296 ((m) & _SHR_PA_SPEED_16GB) ? 16000 : \ 297 ((m) & _SHR_PA_SPEED_15GB) ? 15000 : \ 298 ((m) & _SHR_PA_SPEED_13GB) ? 13000 : \ 299 ((m) & _SHR_PA_SPEED_12P5GB) ? 12500 : \ 300 ((m) & _SHR_PA_SPEED_12GB) ? 12000 : \ 301 ((m) & _SHR_PA_SPEED_11GB) ? 11000 : \ 302 ((m) & _SHR_PA_SPEED_10GB) ? 10000 : \ 303 ((m) & _SHR_PA_SPEED_6000MB) ? 6000 : \ 304 ((m) & _SHR_PA_SPEED_5000MB) ? 5000 : \ 305 ((m) & _SHR_PA_SPEED_3000MB) ? 3000 : \ 306 ((m) & _SHR_PA_SPEED_2500MB) ? 2500 : \ 307 ((m) & _SHR_PA_SPEED_1000MB) ? 1000 : \ 308 ((m) & _SHR_PA_SPEED_100MB) ? 100 : \ 309 ((m) & _SHR_PA_SPEED_10MB) ? 10 : 0) 310 311 312 #define _SHR_PA_SPEED(s) ((127000 == (s)) ? _SHR_PA_SPEED_127GB : \ 313 (120000 == (s)) ? _SHR_PA_SPEED_120GB : \ 314 (106000 == (s)) ? _SHR_PA_SPEED_106GB : \ 315 (100000 == (s)) ? _SHR_PA_SPEED_100GB : \ 316 (53000 == (s)) ? _SHR_PA_SPEED_53GB : \ 317 (50000 == (s)) ? _SHR_PA_SPEED_50GB : \ 318 (42000 == (s)) ? _SHR_PA_SPEED_42GB : \ 319 (40000 == (s)) ? _SHR_PA_SPEED_40GB : \ 320 (32000 == (s)) ? _SHR_PA_SPEED_32GB : \ 321 (30000 == (s)) ? _SHR_PA_SPEED_30GB : \ 322 (27000 == (s)) ? _SHR_PA_SPEED_27GB : \ 323 (25000 == (s)) ? _SHR_PA_SPEED_25GB : \ 324 (24000 == (s)) ? _SHR_PA_SPEED_24GB : \ 325 (23000 == (s)) ? _SHR_PA_SPEED_23GB : \ 326 (21000 == (s)) ? _SHR_PA_SPEED_21GB : \ 327 (20000 == (s)) ? _SHR_PA_SPEED_20GB : \ 328 (16000 == (s)) ? _SHR_PA_SPEED_16GB : \ 329 (15000 == (s)) ? _SHR_PA_SPEED_15GB : \ 330 (13000 == (s)) ? _SHR_PA_SPEED_13GB : \ 331 (12500 == (s)) ? _SHR_PA_SPEED_12P5GB : \ 332 (12000 == (s)) ? _SHR_PA_SPEED_12GB : \ 333 (11000 == (s)) ? _SHR_PA_SPEED_11GB : \ 334 (10000 == (s)) ? _SHR_PA_SPEED_10GB : \ 335 (6000 == (s)) ? _SHR_PA_SPEED_6000MB : \ 336 (5000 == (s)) ? _SHR_PA_SPEED_5000MB : \ 337 (3000 == (s)) ? _SHR_PA_SPEED_3000MB : \ 338 (2500 == (s)) ? _SHR_PA_SPEED_2500MB : \ 339 (1000 == (s)) ? _SHR_PA_SPEED_1000MB : \ 340 (100 == (s)) ? _SHR_PA_SPEED_100MB : \ 341 (10 == (s)) ? _SHR_PA_SPEED_10MB : 0) 342 343 #define _SHR_PA_IS_HG_SPEED(m) ((m) & (_SHR_PA_SPEED_127GB | \ 344 _SHR_PA_SPEED_106GB | \ 345 _SHR_PA_SPEED_53GB | \ 346 _SHR_PA_SPEED_42GB | \ 347 _SHR_PA_SPEED_32GB | \ 348 _SHR_PA_SPEED_27GB | \ 349 _SHR_PA_SPEED_24GB | \ 350 _SHR_PA_SPEED_23GB | \ 351 _SHR_PA_SPEED_21GB | \ 352 _SHR_PA_SPEED_16GB | \ 353 _SHR_PA_SPEED_15GB | \ 354 _SHR_PA_SPEED_13GB | \ 355 _SHR_PA_SPEED_12P5GB | \ 356 _SHR_PA_SPEED_12GB | \ 357 _SHR_PA_SPEED_11GB)) 358 359 /* 360 * Defines: 361 * _SHR_PA_EEE_* 362 * Purpose: 363 * Defines for EEE 364 */ 365 #define _SHR_PA_EEE_100MB_BASETX (1 << 0) /* EEE for 100M-BaseTX */ 366 #define _SHR_PA_EEE_1GB_BASET (1 << 1) /* EEE for 1G-BaseT */ 367 #define _SHR_PA_EEE_10GB_BASET (1 << 2) /* EEE for 10G-BaseT */ 368 #define _SHR_PA_EEE_10GB_KX (1 << 3) /* EEE for 10G-KX */ 369 #define _SHR_PA_EEE_10GB_KX4 (1 << 4) /* EEE for 10G-KX4 */ 370 #define _SHR_PA_EEE_10GB_KR (1 << 5) /* EEE for 10G-KR */ 371 372 #define _SHR_PA_EEE_STRING {"100M-BaseTX", \ 373 "1G-BaseT", \ 374 "10G-BaseT", \ 375 "10G-KX", \ 376 "10G-KX4", \ 377 "10G-KR"} 378 379 /* Backplane multiplexing type Polaris/Sirius */ 380 #define _SHR_PORT_ABILITY_SFI 1 381 #define _SHR_PORT_ABILITY_DUAL_SFI 2 382 #define _SHR_PORT_ABILITY_SCI 3 383 #define _SHR_PORT_ABILITY_SFI_SCI 4 384 385 386 #endif /* !_SHR_PORTABILITY_H */