cmicx_link_defs.h (3774B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: cmicx_link_defs.h 8 * Purpose: Define layout of m0 linkscan shared memory. 9 */ 10 11 #ifndef CMICX_LINK_DEFS_H 12 #define CMICX_LINK_DEFS_H 13 /******************************************************************************* 14 * 15 * CMICX FW DEFINITIONS BEGIN HERE 16 */ 17 18 /******************************************************************************* 19 * REGISTER: FWLINKSCAN_CTRL 20 * BLOCKS: FWLINKSCAN 21 * SIZE: 32 22 */ 23 #define FWLINKSCAN_CTRLr_OFFSET 0x00000000 24 25 #define FWLINKSCAN_CTRLr_SIZE 4 26 27 /* 28 * This structure should be used to declare and program FWLINKSCAN_CTRL. 29 */ 30 typedef union FWLINKSCAN_CTRLr_s { 31 uint32 v[1]; 32 uint32 fwlinkscan_ctrl[1]; 33 uint32 _fwlinkscan_ctrl; 34 } FWLINKSCAN_CTRLr_t; 35 36 #define FWLINKSCAN_CTRLr_CLR(r) (r).fwlinkscan_ctrl[0] = 0 37 #define FWLINKSCAN_CTRLr_SET(r,d) (r).fwlinkscan_ctrl[0] = d 38 #define FWLINKSCAN_CTRLr_GET(r) (r).fwlinkscan_ctrl[0] 39 40 /* 41 * These macros can be used to access individual fields. 42 */ 43 #define FWLINKSCAN_CTRLr_PAUSEf_GET(r) (((r).fwlinkscan_ctrl[0]) & 0x1) 44 #define FWLINKSCAN_CTRLr_PAUSEf_SET(r,f) (r).fwlinkscan_ctrl[0]=(((r).fwlinkscan_ctrl[0] & ~((uint32)0x1)) | (((uint32)f) & 0x1)) 45 46 /* 47 * These macros can be used to access FWLINKSCAN_CTRL. 48 */ 49 #define READ_FWLINKSCAN_CTRLr(u,r) soc_iproc_m0ssq_shmem_read32(u,FWLINKSCAN_CTRLr_OFFSET,r._fwlinkscan_ctrl) 50 #define WRITE_FWLINKSCAN_CTRLr(u,r) soc_iproc_m0ssq_shmem_write32(u,FWLINKSCAN_CTRLr_OFFSET,r._fwlinkscan_ctrl) 51 52 /******************************************************************************* 53 * End of 'FWLINKSCAN_CTRLr' 54 */ 55 56 57 /******************************************************************************* 58 * REGISTER: FWLINKSCAN_STATUS 59 * BLOCKS: FWLINKSCAN 60 * SIZE: 32 61 */ 62 #define FWLINKSCAN_STATUSr_OFFSET 0x00000004 63 64 #define FWLINKSCAN_STATUSr_SIZE 4 65 66 /* 67 * This structure should be used to declare and program FWLINKSCAN_STATUS. 68 */ 69 typedef union FWLINKSCAN_STATUSr_s { 70 uint32 v[1]; 71 uint32 fwlinkscan_status[1]; 72 uint32 _fwlinkscan_status; 73 } FWLINKSCAN_STATUSr_t; 74 75 #define FWLINKSCAN_STATUSr_CLR(r) (r).fwlinkscan_status[0] = 0 76 #define FWLINKSCAN_STATUSr_SET(r,d) (r).fwlinkscan_status[0] = d 77 #define FWLINKSCAN_STATUSr_GET(r) (r).fwlinkscan_status[0] 78 79 /* 80 * These macros can be used to access individual fields. 81 */ 82 #define FWLINKSCAN_STATUSr_INITf_GET(r) (((r).fwlinkscan_status[0]) & 0x1) 83 #define FWLINKSCAN_STATUSr_INITf_SET(r,f) (r).fwlinkscan_status[0]=(((r).fwlinkscan_status[0] & ~((uint32)0x1)) | (((uint32)f) & 0x1)) 84 #define FWLINKSCAN_STATUSr_RUNf_GET(r) ((((r).fwlinkscan_status[0]) >> 1) & 0x1) 85 #define FWLINKSCAN_STATUSr_RUNf_SET(r,f) (r).fwlinkscan_status[0]=(((r).fwlinkscan_status[0] & ~((uint32)0x1 << 1)) | ((((uint32)f) & 0x1) << 1)) 86 #define FWLINKSCAN_STATUSr_ERRORf_GET(r) ((((r).fwlinkscan_status[0]) >> 2) & 0x3f) 87 #define FWLINKSCAN_STATUSr_ERRORf_SET(r,f) (r).fwlinkscan_status[0]=(((r).fwlinkscan_status[0] & ~((uint32)0x3f << 2)) | ((((uint32)f) & 0x3f) << 2)) 88 89 /******************************************************************************* 90 * REGISTER: FWLINKSCAN_STATUS 91 * BLOCKS: FWLINKSCAN 92 * SIZE: 32 93 */ 94 /* 95 * These macros can be used to access FWLINKSCAN_STATUS. 96 */ 97 #define READ_FWLINKSCAN_STATUSr(u,r) soc_iproc_m0ssq_shmem_read32(u,FWLINKSCAN_STATUSr_OFFSET,r._fwlinkscan_status) 98 #define WRITE_FWLINKSCAN_STATUSr(u,r) soc_iproc_m0ssq_shmem_write32(u,FWLINKSCAN_STATUSr_OFFSET,r._fwlinkscan_status) 99 100 /******************************************************************************* 101 * End of 'FWLINKSCAN_STATUSr' 102 */ 103 104 #endif /* CMICX_LINK_DEFS_H */