pci.h (6927B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * PCI Local Bus: constants, structures, and SAL procedure calls 8 */ 9 10 #ifndef _SAL_PCI_H 11 #define _SAL_PCI_H 12 13 #include <sal/types.h> 14 15 /* 16 * PCI config space registers 17 */ 18 #define PCI_CONF_VENDOR_ID 0x00 /* Word @ Offset 0x00 */ 19 #define PCI_CONF_DEVICE_ID 0x02 /* Word @ Offset 0x02 */ 20 21 #define PCI_CONF_COMMAND 0x04 /* Word @ Offset 0x04 */ 22 23 #define PCI_CONF_COMMAND_IO (1 << 0) 24 #define PCI_CONF_COMMAND_MS (1 << 1) 25 #define PCI_CONF_COMMAND_BM (1 << 2) 26 #define PCI_CONF_COMMAND_SC (1 << 3) 27 #define PCI_CONF_COMMAND_MWIE (1 << 4) 28 #define PCI_CONF_COMMAND_VGA_PS (1 << 5) 29 #define PCI_CONF_COMMAND_PERR (1 << 6) 30 #define PCI_CONF_COMMAND_WCC (1 << 7) 31 #define PCI_CONF_COMMAND_SERR (1 << 8) 32 #define PCI_CONF_COMMAND_FBBE (1 << 9) 33 34 #define PCI_CONF_STATUS 0x06 /* Word @ Offset 0x06 */ 35 36 #define PCI_CONF_STATUS_66MHZ (1 << 5) 37 #define PCI_CONF_STATUS_UDF (1 << 6) 38 #define PCI_CONF_STATUS_FBBC (1 << 7) 39 #define PCI_CONF_STATUS_DPED (1 << 8) 40 #define PCI_CONF_STATUS_DEVSEL (3 << 9) 41 #define PCI_CONF_STATUS_STA (1 << 11) 42 #define PCI_CONF_STATUS_RTA (1 << 12) 43 #define PCI_CONF_STATUS_RMA (1 << 13) 44 #define PCI_CONF_STATUS_SMA (1 << 14) 45 #define PCI_CONF_STATUS_DPE (1 << 15) 46 47 #define PCI_CONF_REVISION_ID 0x08 /* Byte @ Offset 0x08 */ 48 #define PCI_CONF_CC_RPI 0x09 /* Byte @ Offset 0x09 */ 49 #define PCI_CONF_CC_SUB 0x0A /* Byte @ Offset 0x0A */ 50 #define PCI_CONF_CC_BASE 0x0B /* Byte @ Offset 0x0B */ 51 52 #define PCI_CONF_CACHE_LINE_SIZE 0x0C /* Byte @ Offset 0x0C */ 53 #define PCI_CONF_LATENCY_TIMER 0x0D /* Byte @ Offset 0x0D */ 54 #define PCI_CONF_HDR_TYPE 0x0E /* Byte @ Offset 0x0E */ 55 #define PCI_CONF_BIST 0x0F /* Byte @ Offset 0x0F */ 56 57 #define PCI_CONF_BAR0 0x10 /* DWORD @ Offset 0x10 */ 58 #define PCI_CONF_BAR1 0x14 /* DWORD @ Offset 0x14 */ 59 #define PCI_CONF_BAR2 0x18 /* DWORD @ Offset 0x18 */ 60 #define PCI_CONF_BAR3 0x1C /* DWORD @ Offset 0x1C */ 61 #define PCI_CONF_BAR4 0x20 /* DWORD @ Offset 0x20 */ 62 #define PCI_CONF_BAR5 0x24 /* DWORD @ Offset 0x24 */ 63 64 #define PCI_CONF_BAR_IO_SPACE (1 << 0) 65 66 #define PCI_CONF_BAR_MASK 0xFFFFFFF0 67 #define PCI_CONF_BAR_TYPE_MASK (3 << 1) 68 #define PCI_CONF_BAR_TYPE_32B (0 << 1) 69 #define PCI_CONF_BAR_TYPE_1MB (1 << 1) 70 #define PCI_CONF_BAR_TYPE_64B (2 << 1) 71 #define PCI_CONF_BAR_TYPE_RSV (3 << 1) 72 73 #define PCI_CONF_BAR_PREFETCHABLE (1 << 3) 74 75 #define PCI_CONF_CB_CIS_PTR 0x28 /* DWORD @ Offset 0x28 */ 76 77 #define PCI_CONF_SUBSYS_VENDOR_ID 0x2C /* Word @ Offset 0x2C */ 78 #define PCI_CONF_SUBSYS_ID 0x2E /* Word @ Offset 0x2E */ 79 80 #define PCI_CONF_EXP_ROM 0x30 /* DWORD @ Offset 0x30 */ 81 82 #define PCI_CONF_CAPABILITY_PTR 0x34 /* DWORD @ Offset 0x34 */ 83 84 #define PCI_CONF_INTERRUPT_LINE 0x3C /* Byte @ Offset 0x3C */ 85 #define PCI_CONF_INTERRUPT_PIN 0x3D /* Byte @ Offset 0x3D */ 86 #define PCI_CONF_MIN_GRANT 0x3E /* Byte @ Offset 0x3E */ 87 #define PCI_CONF_MAX_LATENCY 0x3F /* Byte @ Offset 0x3F */ 88 89 #define PCI_CONF_TRDY_TO 0x40 /* Byte @ Offset 0x40 */ 90 #define PCI_CONF_RETRY_CNT 0x41 /* Byte @ Offset 0x41 */ 91 #define PCI_CONF_PLL_BYPASS 0x44 /* Byte @ Offset 0x42 */ 92 93 #define PCI_CONF_SOCCFG0 0x44 /* DWORD @ Offset 0x44 */ 94 #define PCI_CONF_SOCCFG1 0x48 /* DWORD @ Offset 0x48 */ 95 96 #define PCI_CONF_EXT_CAPABILITY_PTR 0x100 /* DWORD @ Offset 0x100 */ 97 98 /* 99 * PCI_CONF_INTERRUPT_PIN 100 */ 101 #define PCI_INTERRUPT_A 1 102 #define PCI_INTERRUPT_B 2 103 #define PCI_INTERRUPT_C 3 104 #define PCI_INTERRUPT_D 4 105 106 /* 107 * StrataSwitch SAL Definitions 108 */ 109 110 #define PCI_NETWORK_CLASS_ID 0x28000 111 112 #define PCI_SOC_MEM_WINSZ 0x10000 113 114 #ifdef MOUSSE 115 /* NOTE: Keep these in sync with config.h and sysLib.c in BSPs */ 116 # define PCI_SOC_MBAR0 0x81000000 117 # define PCI_SOC_INTLINE(unit) 2 /* MOUSSE_IRQ_CPCI */ 118 extern STATUS pciIntConnect 119 ( 120 VOIDFUNCPTR *vector, /* interrupt vector to attach to */ 121 VOIDFUNCPTR routine, /* routine to be called */ 122 int parameter /* parameter to be passed to routine */ 123 ); 124 #endif 125 126 #ifdef IDT438 127 # define PCI_SOC_MBAR0 0xe1000000 128 # define PCI_SOC_INTLINE(unit) 1 129 #endif 130 131 #ifdef IDTRP334 132 # define PCI_SOC_MBAR0 0x41000000 133 # define PCI_SOC_INTLINE(unit) 1 134 #endif 135 136 #ifdef MBZ 137 # define PCI_SOC_MBAR0 0xa8100000 138 # define PCI_SOC_INTLINE(unit) 4 139 #endif 140 141 #if defined(NSX) 142 # define PCI_SOC_MBAR0 0x41000000 143 # define PCI_SOC_INTLINE(unit) 0x38 /* 0x3a */ 144 #endif 145 146 #if defined(METROCORE) 147 # define PCI_SOC_MBAR0 0x41000000 148 # define PCI_SOC_INTLINE(unit) 0x38 /* 0x3a */ 149 #endif 150 151 #ifdef PLISIM 152 # define PCI_SOC_MBAR0 0xcd600000 /* Arbitrary value */ 153 # define PCI_SOC_INTLINE(unit) (unit) 154 #endif /* PLISIM */ 155 156 #ifdef MPC8548 157 #define PCI_SOC_MBAR0 0x50000000 158 #endif 159 160 /* Default PCI_SOC_MBAR() */ 161 #if !defined(PCI_SOC_MBAR) && defined(PCI_SOC_MBAR0) 162 #define PCI_SOC_MBAR(unit) (PCI_SOC_MBAR0 + (unit) * PCI_SOC_MEM_WINSZ) 163 #endif 164 165 166 typedef void (*pci_isr_t)(void *isr_data); 167 168 typedef struct pci_dev_s { 169 int busNo; 170 int devNo; 171 int funcNo; 172 } pci_dev_t; 173 174 extern int pci_config_putw(pci_dev_t *, uint32 addr, uint32 data); 175 extern uint32 pci_config_getw(pci_dev_t *, uint32 addr); 176 177 extern int pci_memory_putw(pci_dev_t *, uint32 addr, uint32 data); 178 extern uint32 pci_memory_getw(pci_dev_t *, uint32 addr); 179 180 extern int pci_device_iter(int (*rtn)(pci_dev_t *dev, 181 uint16 pciVenID, 182 uint16 pciDevID, 183 uint8 pciRevID)); 184 185 extern void pci_print_all(void); 186 187 extern void pci_print_config(pci_dev_t *); 188 189 extern int pci_int_connect(int intLine, pci_isr_t isr, void *isr_data); 190 191 #ifdef SINGLE_MODE 192 extern int local_config_putw(pci_dev_t *dev, uint32 addr, uint32 data); 193 extern uint32 local_config_getw(pci_dev_t *dev, uint32 addr); 194 195 extern int local_memory_putw(pci_dev_t *dev, uint32 addr, uint32 data); 196 extern uint32 local_memory_getw(pci_dev_t *dev, uint32 addr); 197 198 extern int local_int_connect(int intLine, pci_isr_t isr, void *isr_data); 199 #endif /* !SINGLE_MODE*/ 200 201 #endif /* !_SAL_PCI_H */