trident3.h (52485B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: trident3.h 8 * Purpose: Function declarations for Trident3 Internal functions. 9 */ 10 11 #ifndef _BCM_INT_TRIDENT3_H_ 12 #define _BCM_INT_TRIDENT3_H_ 13 14 #include <bcm_int/esw/mbcm.h> 15 #include <bcm_int/esw/cosq.h> 16 #include <bcm_int/esw/xgs5.h> 17 #include <bcm/oob.h> 18 #include <bcm_int/esw/pfc_deadlock.h> 19 #include <soc/profile_mem.h> 20 21 #if defined(INCLUDE_IFA) 22 #include <bcm/ifa.h> 23 #endif 24 25 #include <soc/esw/port.h> 26 #include <soc/trident3.h> 27 #include <bcm_int/esw/l2.h> 28 29 #ifdef INCLUDE_L3 30 #define BCM_TD3_L3_ECMP_MODE_SINGLE 0x0 31 #define BCM_TD3_L3_ECMP_MODE_HIERARCHICAL 0x1 32 #endif 33 34 #ifdef SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT 35 #include <soc/esw/ecmp.h> 36 #endif /* SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT */ 37 38 #if defined(BCM_TRIDENT3_SUPPORT) 39 40 #define _BCM_TD3X_L3_ERR_EXIT(_rv_) \ 41 if ((_rv_) < 0) { \ 42 goto exit; \ 43 } 44 45 #define BCM_ECMP_LB_MODE_ENHANCED_HASH 0x4 46 47 /* entries_per_profile comes from MAXIDX in PHB_MAPPING_TBL_1 48 * MAXIDX => 8703, #(136 ports x 64 profiles) */ 49 #define _BCM_TD3_PHB_MAP_TAB1_ENTRIES_PER_PROFILE (64) 50 51 #define _BCM_TD3_NUM_PIPE_PORTS _TD3_TDM_DEV_PORTS_PER_PIPE 52 53 /* Flex InPorts Opaque3/4 field size */ 54 #define _FP_FLEX_PBMP_SIZE 16 55 /* IFP_TCAM_WIDE IPBMf size */ 56 #define _FP_TD3_TCAM_IPBMP_SIZE 34 57 #define _BCM_TD3_OPAQUE3_ID 3 58 #define _BCM_TD3_OPAQUE4_ID 4 59 #define _BCM_TD3_OPAQUE_ID_MASK 0x7 60 61 /* HGOE functions */ 62 #define BCM_TD3_HGOE_HDR_TYPE 0x8787 63 extern int bcm_td3_tx_hgoe_list(int unit, bcm_pkt_t *pkt, 64 bcm_pkt_cb_f all_done_cb, void *cookie); 65 extern int bcm_td3_tx_hgoe_array(int unit, bcm_pkt_t **pkt_arr, int count, 66 bcm_pkt_cb_f all_done_cb, void *cookie); 67 extern int bcm_td3_tx_hgoe_pkt(int unit, bcm_pkt_t *pkt, 68 bcm_port_encap_config_t *encap_cfg, void *cookie, 69 bcm_tx_f tx_f); 70 extern int bcm_td3_port_hgoe_mode_set(int unit, bcm_port_t port); 71 extern int bcm_td3_port_hgoe_mode_get( 72 int unit, bcm_port_t port, uint8 *is_hgoe); 73 /* end HOGE declarations */ 74 75 extern int _bcm_td3_port_phb_map_tab1_default_entry_add 76 (int unit, soc_profile_mem_t *prof); 77 extern int bcm_td3_port_init(int unit); 78 79 extern int bcm_td3_port_ing_pri_cng_set(int unit, bcm_port_t port, 80 int untagged, int pkt_pri, int cfi, 81 int int_pri, bcm_color_t color); 82 extern int bcm_td3_port_ing_pri_cng_get(int unit, bcm_port_t port, 83 int untagged, int pkt_pri, int cfi, 84 int *int_pri, bcm_color_t *color); 85 86 extern int bcm_td3_port_cfg_init(int unit, bcm_port_t port, 87 bcm_vlan_data_t *vlan_data); 88 extern int bcm_td3_port_cfg_get(int, bcm_port_t, bcm_port_cfg_t *); 89 extern int 90 bcm_td3_port_cfg_set(int unit, bcm_port_t port, bcm_port_cfg_t *port_cfg); 91 92 extern int _bcm_td3_egr_port_tab_conv(int unit, soc_field_t *field, 93 soc_mem_t* mem); 94 extern int _bcm_td3_port_tab_conv(int unit, soc_field_t *field, soc_mem_t *mem); 95 96 extern int bcmi_td3_port_internal_loopback_set(int unit, bcm_port_t port, int value); 97 98 extern int bcm_td3_port_ipbm_opaque_get(int unit, int stm_idx, uint32* class); 99 extern int bcm_td3_port_ipbm_opaque_set(int unit, int stm_idx, uint32 class); 100 101 /* VLAN Module */ 102 extern int 103 _bcm_vlan_vfi_untag_profile_entry_op(int unit, void **entries, 104 int entries_per_set, int add, uint32 *index); 105 extern int 106 _bcm_vlan_vfi_untag_profile_mem_reference(int unit, int idx,int entries_per_set); 107 extern int 108 _bcm_vlan_vfi_untag_profile_ref_count(int unit, int index, int *ref_count); 109 extern int 110 bcm_td3_vlan_vfi_untag_init(int unit, bcm_vlan_t vid, pbmp_t pbmp); 111 extern int 112 _bcm_td3_vlan_vfi_profile_entry_get(int unit, bcm_vlan_t vlan_vfi, 113 void *entry_data); 114 extern int 115 _bcm_td3_vlan_vfi_profile_entry_set(int unit, bcm_vlan_t vlan_vfi, 116 void *entry_data); 117 extern int 118 bcm_td3_vlan_vfi_untag_add(int unit, bcm_vlan_t vid, pbmp_t pbmp, pbmp_t ubmp); 119 extern int 120 bcm_td3_vlan_vfi_untag_delete(int unit, bcm_vlan_t vid, pbmp_t pbmp); 121 extern int 122 bcm_td3_vlan_table_ut_port_get(int unit, bcm_vlan_t vid, pbmp_t *ut_pbmp); 123 extern int 124 bcm_td3_vlan_vfi_untag_destroy(int unit, bcm_vlan_t vlan); 125 extern int 126 _bcm_td3_vlan_shared_vlan_enable_get(int unit, int *enable); 127 extern int 128 _bcm_td3_vlan_shared_vlan_enable_set(int unit, int enable); 129 130 /* VLAN XLATE */ 131 extern int _bcm_td3_vlan_mac_action_add(int unit, bcm_mac_t mac, 132 bcm_vlan_action_set_t *action); 133 extern int 134 _bcm_td3_vlan_mac_action_get(int unit, bcm_mac_t mac, 135 bcm_vlan_action_set_t *action); 136 extern int 137 _bcm_td3_vlan_mac_delete(int unit, bcm_mac_t mac); 138 139 extern int 140 _bcm_td3_vlan_mac_delete_all(int unit); 141 142 extern int 143 _bcm_td3_vlan_mac_action_traverse(int unit, 144 bcm_vlan_mac_action_traverse_cb cb, 145 void *user_data); 146 /* COSQ Module */ 147 extern int 148 bcm_td3_cosq_init(int unit); 149 extern int 150 bcm_td3_cosq_detach(int unit, int software_state_only); 151 152 extern int 153 bcm_td3_cosq_config_get(int unit, int *numq); 154 155 extern int 156 bcm_td3_cosq_config_set(int unit, int numq); 157 158 extern int 159 bcm_td3_cosq_gport_attach(int unit, bcm_gport_t input_gport, 160 bcm_gport_t parent_gport, bcm_cos_queue_t cosq); 161 162 extern int 163 bcm_td3_cosq_gport_detach(int unit, bcm_gport_t input_gport, 164 bcm_gport_t parent_gport, bcm_cos_queue_t cosq); 165 166 extern int 167 bcm_td3_cosq_gport_attach_get(int unit, bcm_gport_t sched_gport, 168 bcm_gport_t *input_gport, bcm_cos_queue_t *cosq); 169 170 extern int 171 bcm_td3_cosq_gport_traverse(int unit, bcm_cosq_gport_traverse_cb cb, 172 void *user_data); 173 174 extern int 175 bcm_td3_cosq_gport_child_get(int unit, bcm_gport_t in_gport, 176 bcm_cos_queue_t cosq, bcm_gport_t *out_gport); 177 178 extern int 179 bcm_td3_cosq_gport_get(int unit, bcm_gport_t gport, bcm_gport_t *port, 180 int *numq, uint32 *flags); 181 182 typedef enum { 183 _BCM_TD3_COSQ_INDEX_STYLE_WRED_QUEUE, 184 _BCM_TD3_COSQ_INDEX_STYLE_WRED_PORT, 185 _BCM_TD3_COSQ_INDEX_STYLE_WRED_DEVICE, 186 _BCM_TD3_COSQ_INDEX_STYLE_UCAST_QUEUE, 187 _BCM_TD3_COSQ_INDEX_STYLE_MCAST_QUEUE, 188 _BCM_TD3_COSQ_INDEX_STYLE_EGR_POOL, 189 _BCM_TD3_COSQ_INDEX_STYLE_COS, 190 _BCM_TD3_COSQ_INDEX_STYLE_COUNT 191 } _bcm_td3_cosq_index_style_t; 192 193 extern int 194 _bcm_td3_cosq_port_resolve(int unit, bcm_gport_t gport, bcm_module_t *modid, 195 bcm_port_t *port, bcm_trunk_t *trunk_id, int *id, 196 int *qnum); 197 198 extern int 199 _bcm_td3_cosq_port_cos_resolve(int unit, bcm_port_t port, bcm_cos_t cos, 200 _bcm_td3_cosq_index_style_t style, 201 bcm_gport_t *gport); 202 203 extern int 204 bcm_td3_cosq_sched_weight_max_get(int unit, int mode, int *weight_max); 205 206 extern int 207 bcm_td3_cosq_gport_sched_get(int unit, bcm_gport_t gport, bcm_cos_queue_t cosq, 208 int *mode, int *weight); 209 210 extern int 211 bcm_td3_cosq_gport_sched_set(int unit, bcm_gport_t gport, bcm_cos_queue_t cosq, 212 int mode, int weight); 213 214 extern int 215 bcm_td3_cosq_port_sched_get(int unit, bcm_pbmp_t pbm, int *mode, int *weights, 216 int *delay); 217 218 extern int 219 bcm_td3_cosq_port_sched_set(int unit, bcm_pbmp_t pbm, int mode, const int 220 *weights, int delay); 221 222 extern int 223 bcm_td3_cosq_priority_mapping_get_all(int unit, bcm_gport_t gport, int index, 224 bcm_cosq_priority_mapping_t type, 225 int pri_max, int *pri_array, 226 int *pri_count); 227 228 extern int 229 bcm_td3_cosq_discard_set(int unit, uint32 flags); 230 231 extern int 232 bcm_td3_cosq_discard_get(int unit, uint32 *flags); 233 234 extern int 235 bcm_td3_cosq_discard_port_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 236 uint32 color, int drop_start, int drop_slope, 237 int average_time); 238 239 extern int 240 bcm_td3_cosq_discard_port_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 241 uint32 color, int *drop_start, int *drop_slope, 242 int *average_time); 243 244 extern int 245 bcm_td3_cosq_gport_discard_set(int unit, bcm_gport_t gport, 246 bcm_cos_queue_t cosq, 247 bcm_cosq_gport_discard_t *discard); 248 249 extern int 250 bcm_td3_cosq_gport_discard_get(int unit, bcm_gport_t gport, 251 bcm_cos_queue_t cosq, 252 bcm_cosq_gport_discard_t *discard); 253 254 extern int bcm_td3_cosq_wred_resolution_entry_create(int unit, int *index); 255 extern int bcm_td3_cosq_wred_resolution_entry_destroy(int unit, int index); 256 extern int bcm_td3_cosq_wred_resolution_set(int unit, int index, 257 bcm_cosq_discard_rule_t *rule); 258 extern int bcm_td3_cosq_wred_resolution_get(int unit, int index, int max, 259 bcm_cosq_discard_rule_t *rule, 260 int *count); 261 262 extern int 263 bcm_td3_cosq_gport_bandwidth_get(int unit, bcm_gport_t gport, 264 bcm_cos_queue_t cosq, uint32 *kbits_sec_min, 265 uint32 *kbits_sec_max, uint32 *flags); 266 267 extern int 268 bcm_td3_cosq_gport_bandwidth_set(int unit, bcm_gport_t gport, 269 bcm_cos_queue_t cosq, uint32 kbits_sec_min, 270 uint32 kbits_sec_max, uint32 flags); 271 272 extern int 273 bcm_td3_cosq_port_bandwidth_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 274 uint32 *min_quantum, uint32 *max_quantum, 275 uint32 *burst_quantum, uint32 *flags); 276 277 extern int 278 bcm_td3_cosq_port_bandwidth_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 279 uint32 min_quantum, uint32 max_quantum, 280 uint32 burst_quantum, uint32 flags); 281 282 extern int bcm_td3_cosq_port_attach(int unit, bcm_port_t port); 283 extern int bcm_td3_cosq_port_detach(int unit, bcm_port_t port); 284 285 extern int 286 bcm_td3_rx_queue_channel_set_test(int unit, bcm_cos_queue_t queue_id, 287 bcm_rx_chan_t chan_id); 288 289 extern int 290 bcm_td3_egr_mpls_combo_map_default(uint32 unit); 291 292 extern int 293 bcm_td3_egr_mpls_combo_map_create(uint32 unit, 294 int *egr_mpls_combo_map_created, 295 soc_profile_mem_t **egr_mpls_combo_map); 296 297 extern int 298 bcm_td3_egr_mpls_combo_dump(uint32 unit, 299 soc_profile_mem_t *profile); 300 301 extern void 302 bcm_td3_egr_mpls_combo_map_info_init(uint32 unit); 303 304 extern int 305 bcm_td3_qos_map_create(uint32 unit, uint32 *index, int entry_per_index); 306 307 extern int bcm_td3_cosq_control_set(int unit, bcm_gport_t gport, 308 bcm_cos_queue_t cosq, 309 bcm_cosq_control_t type, int arg); 310 extern int bcm_td3_cosq_control_get(int unit, bcm_gport_t gport, 311 bcm_cos_queue_t cosq, 312 bcm_cosq_control_t type, int *arg); 313 extern int 314 _bcm_td3_cosq_index_resolve(int unit, bcm_port_t port, 315 bcm_cos_queue_t cosq, _bcm_td3_cosq_index_style_t style, 316 bcm_port_t *local_port, int *index, int *count); 317 318 extern int 319 bcm_td3_cosq_bst_profile_set(int unit, 320 bcm_gport_t port, 321 bcm_cos_queue_t cosq, 322 bcm_bst_stat_id_t bid, 323 bcm_cosq_bst_profile_t *profile); 324 325 extern int 326 bcm_td3_cosq_bst_profile_get(int unit, 327 bcm_gport_t port, 328 bcm_cos_queue_t cosq, 329 bcm_bst_stat_id_t bid, 330 bcm_cosq_bst_profile_t *profile); 331 332 extern int 333 bcm_td3_cosq_bst_stat_get(int unit, 334 bcm_gport_t port, 335 bcm_cos_queue_t cosq, 336 bcm_bst_stat_id_t bid, 337 uint32 options, 338 uint64 *pvalue); 339 340 extern int 341 bcm_td3_cosq_bst_stat_multi_get(int unit, 342 bcm_gport_t port, 343 bcm_cos_queue_t cosq, 344 uint32 options, 345 int max_values, 346 bcm_bst_stat_id_t *id_list, 347 uint64 *pvalues); 348 349 extern int 350 bcm_td3_cosq_bst_stat_clear(int unit, bcm_gport_t port, 351 bcm_cos_queue_t cosq, bcm_bst_stat_id_t bid); 352 353 extern int bcm_td3_cosq_bst_stat_sync(int unit, bcm_bst_stat_id_t bid); 354 355 extern int 356 _bcm_td3_bst_hdrm_stat_clear(int unit, 357 bcm_gport_t gport, 358 bcm_cos_queue_t cosq); 359 extern int 360 bcm_td3_cosq_buffer_id_multi_get(int unit, bcm_gport_t gport, 361 bcm_cos_queue_t cosq, bcm_cosq_dir_t direction, 362 int array_max, bcm_cosq_buffer_id_t *buf_id_array, 363 int *array_count); 364 365 #if defined (INCLUDE_TCB) && defined (BCM_TCB_SUPPORT) 366 extern int bcm_td3_cosq_tcb_config_get(int unit, bcm_cosq_buffer_id_t buffer_id, 367 bcm_cosq_tcb_config_t *config); 368 extern int bcm_td3_cosq_tcb_config_set(int unit, bcm_cosq_buffer_id_t buffer_id, 369 bcm_cosq_tcb_config_t *config); 370 extern int bcm_td3_cosq_tcb_gport_threshold_mapping_get(int unit, 371 bcm_gport_t gport, bcm_cos_queue_t cosq, 372 bcm_cosq_buffer_id_t buffer_id, int *index); 373 extern int bcm_td3_cosq_tcb_gport_threshold_mapping_set(int unit, 374 bcm_gport_t gport, bcm_cos_queue_t cosq, 375 bcm_cosq_buffer_id_t buffer_id, 376 int index); 377 extern int bcm_td3_cosq_tcb_enable(int unit, bcm_cosq_buffer_id_t buffer_id, 378 int enable); 379 extern int bcm_td3_cosq_tcb_freeze(int unit, bcm_cosq_buffer_id_t buffer_id, 380 int enable); 381 extern int bcm_td3_cosq_tcb_init(int unit); 382 extern int _bcm_td3_cosq_tcb_deinit(int unit); 383 extern int bcm_td3_cosq_tcb_uc_queue_resolve(int unit, bcm_cosq_buffer_id_t buffer_id, 384 int queue, bcm_gport_t *uc_gport); 385 #ifdef BCM_WARM_BOOT_SUPPORT 386 extern int bcm_td3_cosq_tcb_reinit(int unit); 387 #endif 388 #endif 389 390 extern int 391 _bcm_td3_cosq_bst_hdrm_stat_get(int unit, 392 bcm_gport_t gport, 393 bcm_cos_queue_t cosq, 394 uint32 options, 395 uint64 *pvalue); 396 397 extern int 398 bcm_td3_cosq_mapping_set(int unit, bcm_port_t gport, bcm_cos_t priority, 399 bcm_cos_queue_t cosq); 400 401 extern int 402 bcm_td3_cosq_mapping_get(int unit, bcm_port_t gport, bcm_cos_t priority, 403 bcm_cos_queue_t *cosq); 404 405 extern int 406 bcm_td3_cosq_gport_mapping_set(int unit, bcm_port_t ing_port, 407 bcm_cos_t int_pri, uint32 flags, 408 bcm_gport_t gport, bcm_cos_queue_t cosq); 409 410 extern int 411 bcm_td3_cosq_gport_mapping_get(int unit, bcm_port_t ing_port, 412 bcm_cos_t int_pri, uint32 flags, 413 bcm_gport_t *gport, bcm_cos_queue_t *cosq); 414 415 extern int 416 bcm_td3_cosq_port_pfc_op(int unit, bcm_port_t port, 417 bcm_switch_control_t sctype, _bcm_cosq_op_t op, 418 bcm_gport_t *gport, int gport_count); 419 420 extern int 421 bcm_td3_cosq_port_pfc_get(int unit, bcm_port_t port, 422 bcm_switch_control_t sctype, 423 bcm_gport_t *gport, int gport_count, 424 int *actual_gport_count); 425 426 extern int 427 bcm_td3_cosq_pfc_class_mapping_set(int unit, bcm_gport_t port, 428 int array_count, 429 bcm_cosq_pfc_class_mapping_t *mapping_array); 430 431 extern int 432 bcm_td3_cosq_pfc_class_mapping_get(int unit, bcm_gport_t port, 433 int array_max, 434 bcm_cosq_pfc_class_mapping_t *mapping_array, 435 int *array_count); 436 437 extern int 438 _bcm_td3_port_enqueue_set(int unit, bcm_port_t gport, int enable); 439 extern int 440 _bcm_td3_port_enqueue_get(int unit, bcm_port_t gport, int *enable); 441 /* OOB support */ 442 /* OOB FC Tx side global configuration API */ 443 extern int bcm_td3_oob_fc_tx_config_set( 444 int unit, 445 bcm_oob_fc_tx_config_t *config); 446 447 /* OOB FC Tx side global configuration get API */ 448 extern int bcm_td3_oob_fc_tx_config_get( 449 int unit, 450 bcm_oob_fc_tx_config_t *config); 451 452 extern int 453 _bcm_td3_oob_fc_tx_port_control_set(int unit, bcm_port_t port, 454 int status, int dir); 455 extern int 456 _bcm_td3_oob_fc_tx_port_control_get(int unit, bcm_port_t port, 457 int *status, int dir); 458 459 /* OOB FC Tx side global info get API */ 460 extern int bcm_td3_oob_fc_tx_info_get( 461 int unit, 462 bcm_oob_fc_tx_info_t *info); 463 464 /* 465 * OOB FC Rx Interface side Traffic Class to Priority Mapping Multi Set 466 * API 467 */ 468 extern int bcm_td3_oob_fc_rx_port_tc_mapping_multi_set( 469 int unit, 470 bcm_oob_fc_rx_intf_id_t intf_id, 471 bcm_gport_t gport, 472 int array_count, 473 uint32 *tc, 474 uint32 *pri_bmp); 475 476 /* 477 * OOB FC Rx Interface side Traffic Class to Priority Mapping Multi Get 478 * API 479 */ 480 extern int bcm_td3_oob_fc_rx_port_tc_mapping_multi_get( 481 int unit, 482 bcm_oob_fc_rx_intf_id_t intf_id, 483 bcm_gport_t gport, 484 int array_max, 485 uint32 *tc, 486 uint32 *pri_bmp, 487 int *array_count); 488 489 /* OOB FC Rx Interface side Traffic Class to Priority Mapping set API */ 490 extern int bcm_td3_oob_fc_rx_port_tc_mapping_set( 491 int unit, 492 bcm_oob_fc_rx_intf_id_t intf_id, 493 bcm_gport_t gport, 494 uint32 tc, 495 uint32 pri_bmp); 496 497 /* OOB FC Rx Interface side Traffic Class to Priority Mapping get API */ 498 extern int bcm_td3_oob_fc_rx_port_tc_mapping_get( 499 int unit, 500 bcm_oob_fc_rx_intf_id_t intf_id, 501 bcm_gport_t gport, 502 uint32 tc, 503 uint32 *pri_bmp); 504 505 /* OOB FC Rx Interface side Configuration set API */ 506 extern int bcm_td3_oob_fc_rx_config_set( 507 int unit, 508 bcm_oob_fc_rx_intf_id_t intf_id, 509 bcm_oob_fc_rx_config_t *config, 510 int array_count, 511 bcm_gport_t *gport_array); 512 513 /* OOB FC Rx Interface side Configuration get API */ 514 extern int bcm_td3_oob_fc_rx_config_get( 515 int unit, 516 bcm_oob_fc_rx_intf_id_t intf_id, 517 bcm_oob_fc_rx_config_t *config, 518 int array_max, 519 bcm_gport_t *gport_array, 520 int *array_count); 521 522 /* OOB FC Rx Interface side Channel offset value for a port */ 523 extern int bcm_td3_oob_fc_rx_port_offset_get( 524 int unit, 525 bcm_oob_fc_rx_intf_id_t intf_id, 526 bcm_gport_t gport, 527 uint32 *offset); 528 529 /* OOB STATS global configuration set API */ 530 extern int bcm_td3_oob_stats_config_set( 531 int unit, 532 bcm_oob_stats_config_t *config); 533 534 /* OOB STATS global configuration get API */ 535 extern int bcm_td3_oob_stats_config_get( 536 int unit, 537 bcm_oob_stats_config_t *config); 538 539 540 /* OOB STATS configuration of service pool list multi set API */ 541 extern int bcm_td3_oob_stats_pool_mapping_multi_set( 542 int unit, 543 int array_count, 544 int *offset_array, 545 uint8 *dir_array, 546 bcm_service_pool_id_t *pool_array); 547 548 /* OOB STATS configuration of service pool list multi get API */ 549 extern int bcm_td3_oob_stats_pool_mapping_multi_get( 550 int unit, 551 int array_max, 552 int *offset_array, 553 uint8 *dir_array, 554 bcm_service_pool_id_t *pool_array, 555 int *array_count); 556 557 /* OOB STATS configuration of service pool list set API */ 558 extern int bcm_td3_oob_stats_pool_mapping_set( 559 int unit, 560 int offset, 561 uint8 dir, 562 bcm_service_pool_id_t pool); 563 564 /* OOB STATS configuration of service pool list get API */ 565 extern int bcm_td3_oob_stats_pool_mapping_get( 566 int unit, 567 int offset, 568 uint8 *dir, 569 bcm_service_pool_id_t *pool); 570 571 /* OOB STATS configuration of Queue list set API */ 572 extern int bcm_td3_oob_stats_queue_mapping_multi_set( 573 int unit, 574 int array_count, 575 int *offset_array, 576 bcm_gport_t *gport_array); 577 578 /* OOB STATS configuration of Queue list get API */ 579 extern int bcm_td3_oob_stats_queue_mapping_multi_get( 580 int unit, 581 int array_max, 582 int *offset_array, 583 bcm_gport_t *gport_array, 584 int *array_count); 585 586 /* OOB STATS configuration of Queue list set API */ 587 extern int bcm_td3_oob_stats_queue_mapping_set( 588 int unit, 589 int offset, 590 bcm_gport_t gport); 591 592 /* OOB STATS configuration of Queue list get API */ 593 extern int bcm_td3_oob_stats_queue_mapping_get( 594 int unit, 595 int offset, 596 bcm_gport_t *gport); 597 598 599 600 /* 601 * 8 Priority Groups supported. 602 */ 603 #define TD3_PRIOROTY_GROUP_ID_MIN 0 604 #define TD3_PRIOROTY_GROUP_ID_MAX 7 605 /* 606 * Inpur priority range. 607 * PFC : 0-7 608 * SAFC : 0-15 609 */ 610 #define TD3_PFC_INPUT_PRIORITY_MIN 0 611 #define TD3_PFC_INPUT_PRIORITY_MAX 7 612 #define TD3_SAFC_INPUT_PRIORITY_MIN TD3_PFC_INPUT_PRIORITY_MIN 613 #define TD3_SAFC_INPUT_PRIORITY_MAX 15 614 615 extern int 616 bcm_td3_port_priority_group_mapping_set(int unit, bcm_gport_t gport, 617 int prio, int priority_group); 618 extern int 619 bcm_td3_port_priority_group_mapping_get(int unit, bcm_gport_t gport, 620 int prio, int *priority_group); 621 extern int 622 bcm_td3_port_priority_group_config_set(int unit, bcm_gport_t gport, 623 int priority_group, bcm_port_priority_group_config_t *prigrp_config); 624 extern int 625 bcm_td3_port_priority_group_config_get(int unit, bcm_gport_t gport, 626 int priority_group, bcm_port_priority_group_config_t *prigrp_config); 627 extern int 628 _bcm_td3_cosq_inv_mapping_get(int unit, bcm_gport_t gport, 629 bcm_cos_queue_t cosq, 630 uint32 flags, bcm_port_t *ing_port, 631 bcm_cos_t *priority); 632 633 /* pfc deadlock */ 634 #define TD3_PFC_DEADLOCK_MAX_COS 10 635 636 /* Below structure to contain register/field name specific to chip */ 637 typedef struct _bcm_td3_pfc_hw_resorces_s { 638 soc_reg_t timer_count[TD3_PFC_DEADLOCK_MAX_COS]; 639 soc_reg_t timer_status[TD3_PFC_DEADLOCK_MAX_COS]; 640 soc_reg_t timer_mask[TD3_PFC_DEADLOCK_MAX_COS]; 641 soc_reg_t timer_en[TD3_PFC_DEADLOCK_MAX_COS]; 642 soc_reg_t chip_config[3]; 643 soc_reg_t port_config; 644 soc_field_t cos_field[TD3_PFC_DEADLOCK_MAX_COS]; 645 soc_field_t time_init_val[TD3_PFC_DEADLOCK_MAX_COS]; 646 soc_field_t time_unit_field; 647 soc_field_t recovery_action_field; 648 soc_field_t deadlock_status_field; 649 } _bcm_td3_pfc_hw_resorces_t; 650 651 typedef struct _bcm_td3_pfc_deadlock_control_s { 652 uint8 pfc_deadlock_cos_max; /* Max COS supported for PFC Deadlock 653 * Detection and Recovery */ 654 uint8 pfc_deadlock_cos_used; /* Total COS configured for PFC Deadlock 655 * Detection and Recovery */ 656 uint8 hw_cos_idx_inuse[TD3_PFC_DEADLOCK_MAX_COS]; /* Boolean for used Cos indices */ 657 uint8 cb_enabled; /* Indicator if CB is enabled */ 658 bcm_switch_pfc_deadlock_detection_interval_t time_unit; /* 0 - 100ms, 659 * 1 - 10ms */ 660 uint32 cb_interval; /* CB interval duration */ 661 bcm_cos_t pfc_pri2cos[TD3_PFC_DEADLOCK_MAX_COS]; /* Mapping to reduce run-time 662 * computation */ 663 bcm_cos_t pfc_cos2pri[TD3_PFC_DEADLOCK_MAX_COS]; /* Mapping to reduce run-time 664 * computation */ 665 _bcm_pfc_deadlock_config_t cos_config[TD3_PFC_DEADLOCK_MAX_COS]; 666 _bcm_td3_pfc_hw_resorces_t hw_regs_fields; 667 bcm_switch_pfc_deadlock_action_t recovery_action; 668 uint32 cb_count; /* Debug ctr to keep track of #times CB fn is called */ 669 _bcm_cosq_inv_mapping_get_f cosq_inv_mapping_get; /* Function to retrieve 670 * Port/Priority from a 671 * given Gport */ 672 } _bcm_td3_pfc_deadlock_control_t; 673 674 #define _BCM_TD3_PFC_DEADLOCK_HW_RES_INIT(deadlock_hw) \ 675 do { \ 676 int i = 0; \ 677 for (i = 0; i < TD3_PFC_DEADLOCK_MAX_COS; i++) { \ 678 (deadlock_hw)->timer_count[i] = (INVALIDr); \ 679 (deadlock_hw)->timer_status[i] = (INVALIDr); \ 680 (deadlock_hw)->timer_mask[i] = (INVALIDr); \ 681 (deadlock_hw)->timer_en[i] = (INVALIDr); \ 682 (deadlock_hw)->cos_field[i] = (INVALIDf); \ 683 (deadlock_hw)->time_init_val[i] = (INVALIDf); \ 684 } \ 685 (deadlock_hw)->port_config = (INVALIDr); \ 686 (deadlock_hw)->chip_config[0] = (INVALIDr); \ 687 (deadlock_hw)->chip_config[1] = (INVALIDr); \ 688 (deadlock_hw)->time_unit_field = (INVALIDf); \ 689 (deadlock_hw)->recovery_action_field = (INVALIDf); \ 690 (deadlock_hw)->deadlock_status_field = (INVALIDf); \ 691 } while(0); 692 693 #define _BCM_TD3_UNIT_PFC_DEADLOCK_CONTROL(u) _bcm_td3_pfc_deadlock_control[(u)] 694 #define _BCM_TD3_PFC_DEADLOCK_CONFIG(u,cos) \ 695 (&((_bcm_td3_pfc_deadlock_control[(u)])->cos_config[(cos)])) 696 #define _BCM_TD3_PFC_DEADLOCK_COS_ENABLED(u,cos) \ 697 ((((_bcm_td3_pfc_deadlock_control[(u)])->cos_config[(cos)].flags) & \ 698 _BCM_PFC_DEADLOCK_F_ENABLE) ? TRUE : FALSE) 699 #define _BCM_TD3_PFC_DEADLOCK_CB_INTERVAL(u) \ 700 ((_bcm_td3_pfc_deadlock_control[(u)])->cb_interval) 701 #define _BCM_TD3_PFC_DEADLOCK_CB_ENABLED(u) \ 702 (((_bcm_td3_pfc_deadlock_control[(u)])->cb_enabled) ? (TRUE) :(FALSE)) 703 #define _BCM_TD3_PFC_DEADLOCK_CB_COUNT(u) \ 704 ((_bcm_td3_pfc_deadlock_control[(u)])->cb_count) 705 #define _BCM_TD3_PFC_DEADLOCK_TIME_UNIT(u) \ 706 ((_bcm_td3_pfc_deadlock_control[(u)])->time_unit) 707 #define _BCM_TD3_PFC_DEADLOCK_RECOVERY_ACTION(u) \ 708 ((_bcm_td3_pfc_deadlock_control[(u)])->recovery_action) 709 710 extern _bcm_td3_pfc_deadlock_control_t *_bcm_td3_pfc_deadlock_control[BCM_MAX_NUM_UNITS]; 711 712 extern int _bcm_td3_pfc_deadlock_recovery_reset(int unit); 713 714 extern int 715 _bcm_td3_pfc_deadlock_control_set(int unit, bcm_switch_control_t type, int arg); 716 717 extern int 718 _bcm_td3_pfc_deadlock_control_get(int unit, bcm_switch_control_t type, int *arg); 719 720 extern int _bcm_td3_pfc_deadlock_init(int unit); 721 extern int _bcm_td3_pfc_deadlock_hw_res_init(int unit); 722 extern int bcm_td3_pfc_deadlock_recovery_start(int unit, 723 bcm_port_t port, int pri); 724 extern int bcm_td3_pfc_deadlock_recovery_exit(int unit, 725 bcm_port_t port, int pri); 726 727 extern int _bcm_td3_pfc_deadlock_deinit(int unit); 728 extern int _bcm_td3_pfc_deadlock_reinit(int unit); 729 730 extern int 731 _bcm_td3_pfc_deadlock_hw_cos_index_get(int unit, 732 bcm_cos_t priority, 733 int *hw_cos_index); 734 extern int 735 _bcm_td3_pfc_deadlock_hw_cos_index_set(int unit, 736 bcm_cos_t priority, 737 int *hw_cos_index); 738 extern int 739 _bcm_td3_pfc_deadlock_chip_config_get(int unit, 740 bcm_cos_t priority, 741 soc_reg_t* chip_config); 742 extern int 743 _bcm_td3_pfc_deadlock_hw_oper(int unit, 744 _bcm_pfc_deadlock_oper_t operation, 745 bcm_cos_t priority, 746 _bcm_pfc_deadlock_config_t *config); 747 extern int 748 _bcm_td3_pfc_deadlock_q_config_helper(int unit, 749 _bcm_pfc_deadlock_oper_t operation, 750 bcm_gport_t gport, 751 bcm_cosq_pfc_deadlock_queue_config_t *config, 752 uint8 *enable_status); 753 extern int 754 bcm_td3_pfc_deadlock_ignore_pfc_xoff_gen(int unit, int priority, 755 bcm_port_t port, uint32 *rval32); 756 extern int 757 _bcm_td3_pfc_deadlock_recovery_end(int unit, int cos, bcm_port_t port); 758 extern int 759 _bcm_td3_pfc_deadlock_monitor(int unit); 760 761 extern int 762 bcm_td3_cosq_port_pps_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 763 int pps); 764 765 extern int 766 bcm_td3_cosq_port_pps_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 767 int *pps); 768 769 extern int 770 bcm_td3_cosq_port_burst_set(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 771 int burst); 772 773 extern int 774 bcm_td3_cosq_port_burst_get(int unit, bcm_port_t port, bcm_cos_queue_t cosq, 775 int *burst); 776 777 extern int 778 bcm_td3_port_rate_egress_set(int unit, bcm_port_t port, uint32 bandwidth, 779 uint32 burst, uint32 mode); 780 781 extern int 782 bcm_td3_port_rate_egress_get(int unit, bcm_port_t port, uint32 *bandwidth, 783 uint32 *burst, uint32 *mode); 784 785 extern int 786 bcm_td3_port_drain_cells(int unit, int port); 787 788 extern int 789 bcm_td3_cosq_cpu_cosq_enable_set(int unit, bcm_cos_queue_t cosq, int enable); 790 791 extern int 792 bcm_td3_cosq_cpu_cosq_enable_get(int unit, bcm_cos_queue_t cosq, 793 int *enable); 794 795 extern int 796 bcm_td3_cosq_field_classifier_get(int unit, int classifier_id, 797 bcm_cosq_classifier_t *classifier); 798 799 extern int 800 bcm_td3_cosq_field_classifier_id_create(int unit, bcm_cosq_classifier_t 801 *classifier, int *classifier_id); 802 803 extern int 804 bcm_td3_cosq_field_classifier_id_destroy(int unit, int classifier_id); 805 806 extern int 807 bcm_td3_cosq_field_classifier_map_set(int unit, int classifier_id, int count, 808 bcm_cos_t *priority_array, bcm_cos_queue_t *cosq_array); 809 810 extern int 811 bcm_td3_cosq_field_classifier_map_get(int unit, int classifier_id,int array_max, 812 bcm_cos_t *priority_array, bcm_cos_queue_t *cosq_array, int *array_count); 813 814 extern int 815 bcm_td3_cosq_field_classifier_map_clear(int unit, int classifier_id); 816 817 extern int 818 bcm_td3_cosq_safc_class_mapping_set(int unit, bcm_gport_t port, int array_count, 819 bcm_cosq_safc_class_mapping_t *mapping_array); 820 821 extern int 822 bcm_td3_cosq_safc_class_mapping_get(int unit, bcm_gport_t port, int array_max, 823 bcm_cosq_safc_class_mapping_t *mapping_array, 824 int *array_count); 825 826 /* Subport functions */ 827 extern int bcm_td3_subport_coe_init(int unit); 828 #if defined(INCLUDE_L3) 829 /* L3 ECMP DLB */ 830 extern void _bcm_td3_ecmp_dlb_deinit(int unit); 831 extern int _bcm_td3_ecmp_dlb_init(int unit); 832 extern int bcm_td3_l3_egress_dlb_attr_set(int unit, int nh_index, 833 bcm_l3_egress_t *egr); 834 extern int bcm_td3_l3_egress_dlb_attr_destroy(int unit, int nh_index); 835 extern int bcm_td3_l3_egress_dlb_attr_get(int unit, int nh_index, 836 bcm_l3_egress_t *egr); 837 extern int bcm_td3_l3_egress_ecmp_dlb_create(int unit, 838 bcm_l3_egress_ecmp_t *ecmp, int intf_count, bcm_if_t *intf_array); 839 extern int bcm_td3_l3_egress_ecmp_dlb_destroy(int unit, 840 bcm_if_t mpintf); 841 extern int bcm_td3_l3_egress_ecmp_dlb_get(int unit, 842 bcm_l3_egress_ecmp_t *ecmp); 843 extern int bcm_td3_l3_egress_dlb_attr_get(int unit, int nh_index, bcm_l3_egress_t *egr); 844 extern int bcm_td3_l3_egress_ecmp_dlb_ethertype_set( 845 int unit, uint32 flags, int ethertype_count, int *ethertype_array); 846 847 extern int bcm_td3_l3_egress_ecmp_dlb_ethertype_get(int unit, 848 uint32 *flags, int ethertype_max, int *ethertype_array, int *ethertype_count); 849 850 extern int _bcm_td3_ecmp_dlb_config_set(int unit, bcm_switch_control_t type, 851 int arg); 852 extern int _bcm_td3_ecmp_dlb_config_get(int unit, bcm_switch_control_t type, 853 int *arg); 854 extern void bcm_td3_ecmp_dlb_sw_dump(int unit); 855 extern int 856 bcm_td3_l3_conflict_get(int unit, bcm_l3_key_t *ipkey, bcm_l3_key_t *cf_array, 857 int cf_max, int *cf_count); 858 extern int 859 bcm_td3_ipmc_egr_nh_mac_da_profile_entry_delete(int unit, int nh_idx); 860 861 #ifdef SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT 862 extern int 863 bcm_td3x_l3_ecmp_protected_grp_get(int unit, 864 int ecmp_grp, 865 int ecmp_group_size, 866 int *nh_idx); 867 extern int 868 bcm_td3x_l3_ecmp_protected_grp_add(int unit, 869 int ecmp_grp, 870 void *buf, 871 void *info); 872 extern int 873 bcm_td3x_l3_ecmp_protected_grp_del(int unit, 874 int ecmp_grp, 875 void *info); 876 877 extern int 878 bcm_td3x_l3_ecmp_free_idx_get(int unit, 879 soc_esw_ecmp_bank_lkup_level_t level, 880 int count, 881 int *free_idx); 882 #endif /* SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT */ 883 884 extern int 885 bcm_td3_failover_alloc(int unit); 886 extern int 887 bcm_td3_failover_reinit(int unit); 888 extern int 889 bcm_td3_failover_sync(int unit); 890 /* TD3 v6 reserved multicast */ 891 extern int 892 _bcm_td3_ipv6_reserved_multicast_addr_multi_set(int unit, 893 int inner, 894 int index, 895 bcm_ip6_t ip6_addr, 896 bcm_ip6_t ip6_mask); 897 extern int 898 _bcm_td3_ipv6_reserved_multicast_addr_multi_get(int unit, 899 int inner, 900 int index, 901 bcm_ip6_t *ip6_addr, 902 bcm_ip6_t *ip6_mask); 903 #endif /* INCLUDE_L3 */ 904 905 #if defined(INCLUDE_L3) 906 extern int _bcm_td3_flow_port_resolve( 907 int unit, 908 bcm_gport_t flow_port_id, 909 bcm_if_t encap_id, 910 bcm_module_t *modid, 911 bcm_port_t *port, 912 bcm_trunk_t *trunk_id, 913 int *id); 914 915 extern int _bcm_td3_l3_flex_nh_add( 916 int unit, 917 int idx, 918 bcm_l3_egress_t *nh_entry, 919 uint32 *egr_nh, 920 int ipmc); 921 922 extern int _bcm_td3_l3_flex_nh_entry_parse( 923 int unit, 924 uint32 *egr_entry_ptr, 925 uint32 index, 926 bcm_l3_egress_t *nh_entry); 927 928 extern int _bcm_td3_flow_next_hop_set( 929 int unit, 930 int nh_index, 931 uint32 flags, 932 int vp, 933 int drop); 934 935 extern int _bcm_td3_flow_egress_reset( 936 int unit, 937 int nh_index); 938 939 extern int _bcm_td3_flow_egress_get( 940 int unit, 941 bcm_l3_egress_t *egr, 942 int nh_index); 943 944 extern int _bcm_td3_l3_flex_intf_add( 945 int unit, 946 _bcm_l3_intf_cfg_t *intf_info, 947 uint32 *l3_if_entry_p); 948 949 extern int _bcm_td3_l3_flex_intf_profile_delete( 950 int unit, 951 int ifindex); 952 953 extern int _bcm_td3_l3_flex_intf_get( 954 int unit, 955 _bcm_l3_intf_cfg_t *intf_info, 956 uint32 *l3_if_entry_p); 957 958 extern int _bcm_td3_l3_flex_entry_get( 959 int unit, 960 _bcm_l3_cfg_t *l3cfg, 961 int *nh_idx, 962 int *embd); 963 964 extern int _bcm_td3_l3_flex_ent_parse( 965 int unit, 966 soc_mem_t mem, 967 _bcm_l3_cfg_t *l3cfg, 968 int *nh_idx, 969 void *l3x_entry); 970 971 extern int _bcm_td3_l3_flex_entry_add( 972 int unit, 973 _bcm_l3_cfg_t *l3cfg, 974 int nh_idx); 975 976 extern int _bcm_td3_l3_flex_entry_del( 977 int unit, 978 _bcm_l3_cfg_t *l3cfg); 979 980 extern int _bcm_td3_l3_flex_entry_flags_cmp( 981 int unit, 982 int req_flags, 983 int ent_flags, 984 int *idx); 985 986 extern int _bcm_td3_lpm_flex_ent_init( 987 int unit, 988 _bcm_defip_cfg_t *lpm_cfg, 989 uint32 *lpm_entry); 990 991 extern int _bcm_td3_lpm_prepare_flex_defip_entry( 992 int unit, 993 _bcm_defip_cfg_t *lpm_cfg, 994 int nh_ecmp_idx, 995 uint32 *lpm_entry); 996 997 extern int _bcm_td3_lpm_flex_ent_get_key( 998 int unit, 999 _bcm_defip_cfg_t *lpm_cfg, 1000 uint32 *lpm_entry, 1001 uint32 key_type); 1002 1003 extern int _bcm_td3_lpm_flex_ent_parse( 1004 int unit, 1005 uint32 *lpm_entry, 1006 uint32 key_type, 1007 soc_mem_t mem, 1008 _bcm_defip_cfg_t *lpm_cfg, 1009 int *nh_idx); 1010 1011 extern int _bcm_defip_pair128_flex_get_key( 1012 int unit, 1013 uint32 *hw_entry, 1014 _bcm_defip_cfg_t *lpm_cfg, 1015 uint32 key_type); 1016 1017 extern int _bcm_l3_defip_pair128_flex_add( 1018 int unit, 1019 _bcm_defip_cfg_t *lpm_cfg, 1020 int nh_ecmp_idx, 1021 uint32 *hw_entry); 1022 1023 extern int _bcm_td3_mpls_gre_label_add( 1024 int unit, 1025 bcm_l3_egress_t *egr, 1026 int nh_index, 1027 uint32 flags); 1028 1029 extern int _bcm_td3_mpls_gre_label_get( 1030 int unit, 1031 int vc_swap_index, 1032 bcm_l3_egress_t *egr); 1033 1034 extern int _bcm_td3_mpls_gre_label_delete( 1035 int unit, 1036 int index, 1037 soc_mem_t view_id); 1038 1039 #ifdef BCM_WARM_BOOT_SUPPORT 1040 extern int _bcm_td3_l3_repl_l3_intf_recover( 1041 int unit); 1042 #endif 1043 1044 #endif /* INCLUDE_L3 */ 1045 1046 extern int _bcm_td3_flex_l2_from_l2x( 1047 int unit, 1048 bcm_l2_addr_t *l2addr, 1049 l2x_entry_t *l2x_entry, 1050 int *mb_index); 1051 1052 extern int _bcm_td3_flex_l2_to_l2x( 1053 int unit, 1054 l2x_entry_t *l2x_entry, 1055 bcm_l2_addr_t *l2addr, 1056 int key_only); 1057 1058 extern int _bcm_td3_flex_l2_replace_data_mask_setup( 1059 int unit, 1060 _bcm_l2_replace_t *rep); 1061 1062 extern int _bcm_td3_flex_l2_bulk_replace_modport( 1063 int unit, 1064 _bcm_l2_replace_t *rep_st); 1065 1066 extern int 1067 bcm_td3_cosq_stat_set(int unit, bcm_gport_t port, 1068 bcm_cos_queue_t cosq, 1069 bcm_cosq_stat_t stat, uint64 value); 1070 extern int 1071 bcm_td3_cosq_stat_get(int unit, bcm_gport_t port, 1072 bcm_cos_queue_t cosq, 1073 bcm_cosq_stat_t stat, int sync_mode, 1074 uint64 *value); 1075 extern int bcmi_td3_port_fn_drv_init(int unit); 1076 extern int bcmi_td3_port_soc_resource_init(int unit, int nport, 1077 bcm_port_resource_t *resource, 1078 soc_port_resource_t *soc_resource); 1079 extern int bcmi_td3_port_resource_validate(int unit, 1080 soc_port_schedule_state_t *port_schedule_state); 1081 extern int bcmi_td3_pre_flexport_tdm(int unit, 1082 soc_port_schedule_state_t *port_schedule_state); 1083 extern int bcmi_td3_post_flexport_tdm(int unit, 1084 soc_port_schedule_state_t *port_schedule_state); 1085 1086 extern int bcmi_td3_port_cosmap_update(int unit, pbmp_t pbmp, int enable); 1087 1088 extern int bcmi_td3_clport_update(int unit, 1089 soc_port_schedule_state_t *port_schedule_state); 1090 extern int bcmi_td3_port_attach_mmu(int unit, int port); 1091 extern int bcmi_td3_port_detach_asf(int unit, bcm_port_t port); 1092 extern int bcmi_td3_port_enable(int unit, 1093 soc_port_schedule_state_t *port_schedule_state); 1094 extern int bcmi_td3_port_disable(int unit, 1095 soc_port_schedule_state_t *port_schedule_state); 1096 extern int bcmi_td3_port_speed_1g_update(int unit, bcm_port_t port, int speed); 1097 extern int bcmi_td3_speed_ability_get(int unit, bcm_port_t port, 1098 bcm_port_abil_t *mask); 1099 extern int bcmi_td3_speed_mix_validate(int unit, uint32 speed_mask); 1100 extern void bcm_td3_pstats_deinit(int unit); 1101 extern int bcm_td3_pstats_init(int unit); 1102 extern int bcmi_td3_port_detach_stack(int unit, bcm_port_t port); 1103 extern int bcmi_td3_port_attach_stack(int unit, bcm_port_t port); 1104 extern void _bcmi_td3_init_condition_set(int unit, 1105 bcmi_xgs5_dev_info_t *dev_info); 1106 extern int bcmi_td3_port_attach_l3(int unit, bcm_port_t port); 1107 extern int bcmi_td3_port_detach_l3(int unit, bcm_port_t port); 1108 1109 extern void bcm_td3_cosq_sw_dump(int unit); 1110 #ifdef BCM_WARM_BOOT_SUPPORT 1111 extern int bcm_td3_cosq_sync(int unit); 1112 #endif /* BCM_WARM_BOOT_SUPPORT */ 1113 1114 /* RIOT related defines */ 1115 1116 #ifdef BCM_RIOT_SUPPORT 1117 1118 1119 /* TD3 : EGR_L3_NEXT_HOP-KEY_TYPEf */ 1120 #define BCMI_TD3_L3_EGR_NH_MCAST_ENTRY_TYPE 7 1121 #define BCMI_TD3_L3_EGR_NH_SD_TAG_ENTRY_TYPE 2 1122 1123 1124 /* L3 interface banks values */ 1125 #define BCMI_TD3_L3_INTF_ENT_PER_BANK 2048 1126 #define BCMI_TD3_L3_INTF_BANKS_MAX 8 1127 1128 /* L3 next hop banks values */ 1129 #define BCMI_TD3_L3_NH_ENT_PER_BANK 4096 1130 #define BCMI_TD3_L3_NH_BANKS_MAX 16 1131 1132 1133 /* NH destination encodings, masks and macros */ 1134 #define BCMI_TD3_L3_NH_DEST_DGLP_SHIFT 16 1135 #define BCMI_TD3_L3_NH_DEST_DGLP_MASK 0xFFFF /* 15 bits value */ 1136 #define BCMI_TD3_L3_NH_DEST_DGLP_EN_MASK 0x3 /* 2 bits value */ 1137 #define BCMI_TD3_L3_NH_DEST_DGLP_ENCODING 0x0 /* 15 bits value */ 1138 #define BCMI_TD3_L3_NH_DEST_DVP_SHIFT 16 /* 14 bits value */ 1139 #define BCMI_TD3_L3_NH_DEST_DVP_MASK 0xFFFF /* 14 bits value */ 1140 #define BCMI_TD3_L3_NH_DEST_DVP_EN_MASK 0x3 /* 4 bits value */ 1141 #define BCMI_TD3_L3_NH_DEST_DVP_ENCODING 0x1 /* 15 bits value */ 1142 #define BCMI_TD3_L3_NH_DEST_LAG_SHIFT 13 /* 14 bits value */ 1143 #define BCMI_TD3_L3_NH_DEST_LAG_MASK 0x1FFF /* 14 bits value */ 1144 #define BCMI_TD3_L3_NH_DEST_LAG_EN_MASK 0xF /* 4 bits value */ 1145 #define BCMI_TD3_L3_NH_DEST_LAG_ENCODING 0x1 /* 15 bits value */ 1146 1147 1148 #define BCMI_TD3_L3_NH_DEST_DVP_GET(gport) \ 1149 ((BCMI_TD3_L3_NH_DEST_DVP_ENCODING << BCMI_TD3_L3_NH_DEST_DVP_SHIFT) | \ 1150 (gport & BCMI_TD3_L3_NH_DEST_DVP_MASK)) 1151 1152 #define BCMI_TD3_L3_NH_DEST_LAG_GET(gport) \ 1153 ((BCMI_TD3_L3_NH_DEST_LAG_ENCODING << BCMI_TD3_L3_NH_DEST_LAG_SHIFT) | \ 1154 (gport & BCMI_TD3_L3_NH_DEST_LAG_MASK)) 1155 1156 #define BCMI_TD3_L3_NH_DEST_DGLP_GET(gport) \ 1157 ((BCMI_TD3_L3_NH_DEST_DGLP_ENCODING << BCMI_TD3_L3_NH_DEST_DGLP_SHIFT) | \ 1158 (gport & BCMI_TD3_L3_NH_DEST_DGLP_MASK)) 1159 1160 #define BCMI_TD3_L3_NH_DEST_IS_DGLP(_dest) \ 1161 ((((_dest) >> BCMI_TD3_L3_NH_DEST_DGLP_SHIFT) & BCMI_TD3_L3_NH_DEST_DGLP_EN_MASK) == \ 1162 BCMI_TD3_L3_NH_DEST_DGLP_ENCODING) 1163 #define BCMI_TD3_L3_NH_PORT_DGLP_GET(_dest) \ 1164 (((_dest) & BCMI_TD3_L3_NH_DEST_DGLP_MASK)) 1165 1166 #define BCMI_TD3_L3_NH_DEST_IS_LAG(_dest) \ 1167 (BCMI_TD3_L3_NH_DEST_IS_DGLP(_dest) && ((((_dest) >> BCMI_TD3_L3_NH_DEST_LAG_SHIFT) & BCMI_TD3_L3_NH_DEST_LAG_EN_MASK) == \ 1168 BCMI_TD3_L3_NH_DEST_LAG_ENCODING)) 1169 1170 #define BCMI_TD3_L3_NH_PORT_LAG_GET(_dest) \ 1171 (((_dest) & BCMI_TD3_L3_NH_DEST_LAG_MASK)) 1172 1173 #define BCMI_TD3_L3_NH_DEST_IS_DVP(_dest) \ 1174 ((((_dest) >> BCMI_TD3_L3_NH_DEST_DVP_SHIFT) & BCMI_TD3_L3_NH_DEST_DVP_EN_MASK) == \ 1175 BCMI_TD3_L3_NH_DEST_DVP_ENCODING) 1176 1177 #define BCMI_TD3_L3_NH_PORT_DVP_GET(_dest) \ 1178 (((_dest) & BCMI_TD3_L3_NH_DEST_DVP_MASK)) 1179 1180 /* Td3 : EGR_L3_NEXT_HOP-NEXT_PTR field types */ 1181 #define BCMI_TD3_L3_NH_EGR_NEXT_PTR_TYPE_DVP 1 1182 #define BCMI_TD3_L3_NH_EGR_NEXT_PTR_TYPE_NH 2 1183 #define BCMI_TD3_L3_NH_EGR_NEXT_PTR_TYPE_VC_SWAP 3 1184 #define BCMI_TD3_L3_NH_EGR_NEXT_PTR_TYPE_DVP_AND_VC_SWAP 4 1185 1186 #define BCMI_TD3_L3_NH_IFA_DST_PORT_SHIFT 7 1187 #define BCMI_TD3_L3_NH_IFA_DST_PORT_MASK 0x7f 1188 1189 /* RioT Overlay validity checks */ 1190 #define BCMI_RIOT_IS_ENABLED(_u) \ 1191 ((&_bcm_l3_bk_info[_u])->riot_enable) 1192 1193 #define BCMI_L3_NH_OVERLAY_VALID(_u) \ 1194 ((BCMI_RIOT_IS_ENABLED(_u)) && \ 1195 (((&_bcm_l3_bk_info[_u])->l3_nh_overlay_entries) > 0)) 1196 1197 #define BCMI_L3_INTF_OVERLAY_VALID(_u) \ 1198 ((BCMI_RIOT_IS_ENABLED(_u)) && \ 1199 (((&_bcm_l3_bk_info[_u])->l3_intf_overlay_entries) > 0)) 1200 1201 #define BCMI_RIOT_VPN_VFI_IS_SET(_u, _vid) \ 1202 ((BCMI_RIOT_IS_ENABLED(_u)) && (_BCM_VPN_VFI_IS_SET((_vid)))) 1203 1204 #define BCMI_RIOT_VPN_VFI_IS_NOT_SET(_u, _vid) \ 1205 ((!BCMI_RIOT_IS_ENABLED(_u)) || (!(_BCM_VPN_VFI_IS_SET((_vid))))) 1206 1207 #define BCMI_GPORT_TYPE_GET(_gport) \ 1208 (((_gport) >> _SHR_GPORT_TYPE_SHIFT) & _SHR_GPORT_TYPE_MASK) 1209 1210 #define BCMI_L3_NH_FLEX_VIEW(ent_type) ((ent_type >= 9) && (ent_type != 21)) 1211 #define BCMI_LPM_FLEX_VIEW(ent_type) (ent_type > 1) 1212 1213 /* DESTINATION_FORMAT DEST_TYPE encodings */ 1214 #define BCMI_TD3_DEST_TYPE_INVALID 0 1215 #define BCMI_TD3_DEST_TYPE0_DVP 1 1216 #define BCMI_TD3_DEST_TYPE0_DGPP 2 1217 #define BCMI_TD3_DEST_TYPE0_NH 3 1218 #define BCMI_TD3_DEST_TYPE1_ECMP 1 1219 #define BCMI_TD3_DEST_TYPE1_L2MC 2 1220 #define BCMI_TD3_DEST_TYPE1_IPMC 3 1221 #define BCMI_TD3_DEST_TYPE2_LAG 1 1222 1223 #define BCMI_TD3_EGR_L3_NEXTHOP_WIDTH 169 1224 1225 1226 /* TD3 specific routines */ 1227 extern int bcmi_td3_get_port_from_destination(int unit, 1228 uint32 dest, bcm_l3_egress_t *nh); 1229 1230 extern int bcmi_td3_l3_nh_dest_set(int unit, bcm_l3_egress_t *nh_entry, uint32 *nh_dest); 1231 #endif /* BCM_RIOT_SUPPORT */ 1232 1233 #define _BCM_TD3_TPID_ACTION_NONE 0 1234 #define _BCM_TD3_TPID_ACTION_LEGACY 1 1235 #define _BCM_TD3_TPID_ACTION_FROM_TAG 2 1236 #define _BCM_TD3_TPID_ACTION_PRESSERVE 6 1237 1238 #define _BCM_TD3_TPID_ACTION_ENCODE(_action_) \ 1239 ((_action_) == bcmVlanTpidActionNone ? _BCM_TD3_TPID_ACTION_NONE : \ 1240 (_action_) == bcmVlanTpidActionModify ? _BCM_TD3_TPID_ACTION_FROM_TAG : \ 1241 _BCM_TD3_TPID_ACTION_NONE) 1242 1243 #define _BCM_TD3_TPID_ACTION_DECODE(_hw_action_) \ 1244 ((_hw_action_) == _BCM_TD3_TPID_ACTION_NONE ? bcmVlanTpidActionNone : \ 1245 (_hw_action_) == _BCM_TD3_TPID_ACTION_FROM_TAG ? bcmVlanTpidActionModify :\ 1246 bcmVlanTpidActionNone) 1247 1248 #ifdef BCM_SPECIAL_LABEL_SUPPORT 1249 1250 /************************* MPLS related Changes **********************/ 1251 1252 #define BCMI_MPLS_LABEL_ID_MAX (0xfffff) 1253 #define BCMI_MPLS_LABEL_ID_VALID(_label_) \ 1254 ((_label_) <= BCMI_MPLS_LABEL_ID_MAX) 1255 1256 #define BCMI_MPLS_LABEL_MASK_MAX (0xfffff) 1257 #define BCMI_MPLS_LABEL_MASK_VALID(_mask_) \ 1258 (((_mask__) >= 0) && \ 1259 ((_mask_) <= BCMI_MPLS_LABEL_MASK_MAX)) 1260 1261 #define BCMI_MPLS_EXP_MAX (0x7) 1262 #define BCMI_MPLS_EXP_VALID(exp) \ 1263 ((exp) <= BCMI_MPLS_EXP_MAX) 1264 1265 #define BCMI_MPLS_EXP_MASK_MAX (0x7) 1266 #define BCMI_MPLS_EXP_MASK_VALID(_mask_) \ 1267 (((_mask_) >= 0) && \ 1268 ((_mask_) <= BCMI_MPLS_EXP_MASK_MAX)) 1269 1270 #define BCMI_MPLS_TTL_MAX (0xFF) 1271 #define BCMI_MPLS_TTL_VALID(ttl) \ 1272 ((ttl) <= BCMI_MPLS_TTL_MAX) 1273 1274 #define BCMI_MPLS_TTL_MASK_MAX (0xff) 1275 #define BCMI_MPLS_TTL_MASK_VALID(_mask_) \ 1276 (((_mask_) >= 0) && \ 1277 ((_mask_) <= BCMI_MPLS_TTL_MASK_MAX)) 1278 1279 #define BCMI_MPLS_CONSTRUCT_LABEL(val, exp, ttl, bos) \ 1280 (((val) << 12) | ((exp) << 9) | \ 1281 ((bos) << 8) | (ttl)) 1282 1283 #define BCMI_MPLS_LABEL_VAL_FROM_LABEL_GET(mpls_label)\ 1284 (((mpls_label) >> 12) & 0xFFFFF) 1285 1286 #define BCMI_MPLS_EXP_FROM_LABEL_GET(mpls_label) \ 1287 (((mpls_label) >> 9) & 0x7) 1288 1289 #define BCMI_MPLS_BOS_FROM_LABEL_GET(mpls_label) \ 1290 (((mpls_label) >> 8) & 0x1) 1291 1292 #define BCMI_MPLS_TTL_FROM_LABEL_GET(mpls_label) \ 1293 ((mpls_label) & 0xFF) 1294 1295 /***************** Function Decalarations *********************/ 1296 extern int bcmi_mpls_special_label_init(int unit); 1297 extern void bcmi_mpls_special_label_deinit(int unit); 1298 1299 extern int bcmi_mpls_special_label_identifier_add(int unit, 1300 bcm_mpls_special_label_type_t label_type, 1301 bcm_mpls_special_label_t label_info); 1302 extern int bcmi_mpls_special_label_identifier_get(int unit, 1303 bcm_mpls_special_label_type_t label_type, 1304 bcm_mpls_special_label_t *label_info); 1305 extern int bcmi_mpls_special_label_identifier_delete(int unit, 1306 bcm_mpls_special_label_type_t label_type, 1307 bcm_mpls_special_label_t label_info); 1308 extern int bcmi_mpls_special_label_identifier_delete_all(int unit); 1309 extern int bcmi_mpls_special_label_identifier_traverse(int unit, 1310 bcm_mpls_special_label_identifier_traverse_cb cb, 1311 void *user_data); 1312 1313 1314 extern int bcmi_mpls_special_label_egress_add(int unit, 1315 bcm_mpls_special_label_type_t label_type, 1316 bcm_mpls_special_label_t label_info); 1317 extern int bcmi_mpls_special_label_egress_get(int unit, 1318 bcm_mpls_special_label_type_t label_type, 1319 bcm_mpls_special_label_t *label_info); 1320 extern int bcmi_mpls_special_label_egress_delete(int unit, 1321 bcm_mpls_special_label_type_t label_type, 1322 bcm_mpls_special_label_t label_info); 1323 extern int bcmi_mpls_special_label_egress_delete_all(int unit); 1324 extern int bcmi_mpls_special_label_egress_traverse(int unit, 1325 bcm_mpls_special_label_egress_traverse_cb cb, 1326 void *user_data); 1327 1328 extern int bcmi_mpls_special_label_push_action_set(int unit, 1329 bcm_mpls_special_label_push_element_t *element, 1330 bcm_mpls_special_label_push_type_t push_type); 1331 1332 extern int bcmi_mpls_special_label_push_action_get(int unit, 1333 bcm_mpls_special_label_push_element_t *element, 1334 bcm_mpls_special_label_push_type_t *push_type); 1335 1336 extern int _bcm_td3_def_vfi_profile_add(int unit, 1337 int is_eline, uint32 *profile_index); 1338 1339 extern int _bcm_td3_sd_tag_action_profile_get(int unit, 1340 int sd_tag_action_present, int sd_tag_action_not_present, 1341 uint32 *index); 1342 1343 extern int _bcm_td3_sd_tag_action_get(int unit, uint32 index, 1344 int *sd_tag_action_present, 1345 int *sd_tag_action_not_present); 1346 extern int _bcm_td3_def_vlan_profile_get( int unit, uint32 *index); 1347 1348 /***************** Structure Decalarations *********************/ 1349 1350 typedef struct bcmi_mpls_special_label_control_s { 1351 uint32 label_value; 1352 uint32 label_mask; 1353 int label_type; 1354 int valid; 1355 int ref_count; 1356 int cancun_added; 1357 }bcmi_mpls_special_label_control_t; 1358 1359 1360 typedef struct bcmi_mpls_special_label_egress_s { 1361 uint32 entropy_label_ref_count; 1362 uint32 special_label_ref_count; 1363 } bcmi_mpls_special_label_egress_t; 1364 1365 1366 1367 extern bcmi_mpls_special_label_control_t *bcmi_special_label_precedence_state[BCM_MAX_NUM_UNITS]; 1368 extern bcmi_mpls_special_label_egress_t bcmi_special_label_egress_state[BCM_MAX_NUM_UNITS]; 1369 1370 1371 /***************************************************************/ 1372 #endif /*BCM_SPECIAL_LABEL_SUPPORT*/ 1373 1374 extern int bcm_td3_cosq_burst_monitor_dma_config_set(int unit, 1375 uint32 host_mem_size, 1376 uint32 **host_mem_add); 1377 extern int bcm_td3_cosq_burst_monitor_dma_config_get(int unit, 1378 uint32 *host_mem_size, 1379 uint32 **host_mem_add); 1380 extern int bcm_td3_cosq_burst_monitor_set(int unit, int num_gports, 1381 bcm_gport_t *gport_list); 1382 extern int bcm_td3_cosq_burst_monitor_get(int unit, int max_gports, 1383 bcm_gport_t *gport_list, 1384 int *num_gports); 1385 extern int bcm_td3_cosq_burst_monitor_dma_config_reset(int unit); 1386 1387 extern int bcm_td3_qos_reinit(int unit); 1388 1389 #if defined(INCLUDE_IFA) 1390 /* IFA module APIs */ 1391 extern int _bcm_td3_ifa_init(int unit); 1392 extern int _bcm_td3_ifa_detach(int unit); 1393 extern int _bcm_td3_ifa_collector_set(int unit, 1394 uint32 options, 1395 bcm_ifa_collector_info_t *collector_info); 1396 extern int _bcm_td3_ifa_collector_get(int unit, 1397 bcm_ifa_collector_info_t *collector_info); 1398 extern int _bcm_td3_ifa_config_set(int unit, 1399 uint32 options, 1400 bcm_ifa_config_info_t *ifa_config_info); 1401 extern int _bcm_td3_ifa_config_get(int unit, 1402 bcm_ifa_config_info_t *ifa_config_info); 1403 extern int _bcm_td3_ifa_stat_get(int unit, 1404 bcm_ifa_stat_info_t *stat_data); 1405 extern int _bcm_td3_ifa_stat_set(int unit, 1406 bcm_ifa_stat_info_t *stat_data); 1407 extern int _bcm_td3_ifa_sync(int unit); 1408 #endif /* INCLUDE_IFA */ 1409 1410 extern int _bcm_td3_field_inports_flex_config_init(int unit, int port); 1411 #endif /* BCM_TRIDENT3_SUPPORT */ 1412 1413 #endif /* !_BCM_INT_TRIDENT3_H_ */