gdpll.h (11184B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated. 10 * Edits to this file will be lost when it is regenerated. 11 */ 12 13 #ifndef __BCM_GDPLL_H__ 14 #define __BCM_GDPLL_H__ 15 16 #if defined(INCLUDE_GDPLL) 17 18 #include <bcm/types.h> 19 20 /* GDPLL Macros */ 21 #define BCM_GDPLL_NUM_CHANNELS 128 /* Supported number of GDPLL 22 channels */ 23 #define BCM_GDPLL_NUM_PORTS 64 /* GDPLL supports 64 ports */ 24 #define BCM_GDPLL_NUM_CPRI_PORTS 32 /* GDPLL supports 32 CPRI ports */ 25 #define BCM_GDPLL_NUM_STATES 3 /* GDPLL number of states */ 26 27 /* GDPLL Flags for channel create */ 28 #define BCM_GDPLL_CONF_DPLL 0x1 /* Configure DPLL */ 29 #define BCM_GDPLL_EVENT_CONFIG_REF 0x2 /* Configure channel reference */ 30 #define BCM_GDPLL_EVENT_CONFIG_FB 0x4 /* Configure channel feedback */ 31 #define BCM_GDPLL_CHAN_ALLOC 0x8 /* Channel alloc */ 32 #define BCM_GDPLL_CHAN_SET_PRIORITY 0x10 /* Set channel priority */ 33 #define BCM_GDPLL_CHAN_OUTPUT_CONF 0x20 /* Configure channel output */ 34 35 /* GDPLL Generic callback Types */ 36 #define BCM_GDPLL_CB_RSVD1 0x1 /* Callback for the RSVD1 message 37 interrupt */ 38 39 /* GDPLL Input Events */ 40 typedef enum bcm_gdpll_input_event_e { 41 bcmGdpllInputEventCpu = 0, /* CPU generated input event type */ 42 bcmGdpllInputEventBS0HB = 1, /* Broadsync0 heartbeat input event type */ 43 bcmGdpllInputEventBS1HB = 2, /* Broadsync1 heartbeat input event type */ 44 bcmGdpllInputEventGPIO0 = 3, /* GPIO0 input event type */ 45 bcmGdpllInputEventGPIO1 = 4, /* GPIO1 input event type */ 46 bcmGdpllInputEventGPIO2 = 5, /* GPIO2 input event type */ 47 bcmGdpllInputEventGPIO3 = 6, /* GPIO3 input event type */ 48 bcmGdpllInputEventGPIO4 = 7, /* GPIO4 input event type */ 49 bcmGdpllInputEventGPIO5 = 8, /* GPIO5 input event type */ 50 bcmGdpllInputEventIPDM0 = 9, /* IPDM0 input event type */ 51 bcmGdpllInputEventIPDM1 = 10, /* IPDM1 input event type */ 52 bcmGdpllInputEventTS1TS = 11, /* TS1 counter timestamp event type */ 53 bcmGdpllInputEventBS0PLL = 12, /* Broadsync0 PLL input event type */ 54 bcmGdpllInputEventBS1PLL = 13, /* Broadsync1 PLL input event type */ 55 bcmGdpllInputEventRSVD1IF = 14, /* RSVD1 interface input event type */ 56 bcmGdpllInputEventRSVD1RF = 15, /* BCN counter input event type */ 57 bcmGdpllInputEventBS0ConvTC = 16, /* Broadsync0 converted timecode input 58 type */ 59 bcmGdpllInputEventBS1ConvTC = 17, /* Broadsync1 converted timecode input 60 type */ 61 bcmGdpllInputEventLCPLL0 = 18, /* Serdes LCPLL0 input event type */ 62 bcmGdpllInputEventLCPLL1 = 19, /* Serdes LCPLL1 input event type */ 63 bcmGdpllInputEventLCPLL2 = 20, /* Serdes LCPLL2 input event type */ 64 bcmGdpllInputEventLCPLL3 = 21, /* Serdes LCPLL3 input event type */ 65 bcmGdpllInputEventPORT = 22, /* Input event from port type */ 66 bcmGdpllInputEventR5 = 23, /* Input event from R5 core */ 67 bcmGdpllInputEventMax = 24 /* Input event max value */ 68 } bcm_gdpll_input_event_t; 69 70 /* GDPLL port events */ 71 typedef enum bcm_gdpll_port_event_e { 72 bcmGdpllPortEventRXSOF = 0, /* CPRI port recieve SOF input event */ 73 bcmGdpllPortEventTXSOF = 1, /* CPRI port transmit SOF input event */ 74 bcmGdpllPortEventROE = 2, /* CPRI ROE timestamp event */ 75 bcmGdpllPortEventRXCDR = 3, /* Port recieve CDR event */ 76 bcmGdpllPortEventTXPI = 4 /* Port TXPI event */ 77 } bcm_gdpll_port_event_t; 78 79 /* GDPLL event destination */ 80 typedef enum bcm_gdpll_event_dest_e { 81 bcmGdpllEventDestCPU = 0, /* Event forward to CPU FIFO */ 82 bcmGdpllEventDestM7 = 1, /* Event forward to GDPLL IA */ 83 bcmGdpllEventDestALL = 2 /* Event forward to both */ 84 } bcm_gdpll_event_dest_t; 85 86 /* GDPLL channel output NCO control types */ 87 typedef enum bcm_gdpll_output_event_e { 88 bcmGdpllOutputEventBSPLL0 = 0, /* NCO out for Broadsync0 PLL */ 89 bcmGdpllOutputEventBSPLL1 = 1, /* NCO out for Broadsync1 PLL */ 90 bcmGdpllOutputEventLCPLL0 = 2, /* NCO out for serdes LCPLL0 */ 91 bcmGdpllOutputEventLCPLL1 = 3, /* NCO out for serdes LCPLL1 */ 92 bcmGdpllOutputEventLCPLL2 = 4, /* NCO out for serdes LCPLL2 */ 93 bcmGdpllOutputEventLCPLL3 = 5, /* NCO out for serdes LCPLL3 */ 94 bcmGdpllOutputEventTS0 = 6, /* NCO out for TS0 counter */ 95 bcmGdpllOutputEventTS1 = 7, /* NCO out for TS1 counter */ 96 bcmGdpllOutputEventTXPI = 8, /* NCO out for TXPI on a given port */ 97 bcmGdpllOutputEventBCN = 9 /* NCO out for BCN counter */ 98 } bcm_gdpll_output_event_t; 99 100 /* GDPLL Channel prioritization */ 101 typedef enum bcm_gdpll_chan_priority_e { 102 bcmGdpllChanPriority0 = 0, /* Highest priority */ 103 bcmGdpllChanPriority1 = 1, 104 bcmGdpllChanPriority2 = 2, 105 bcmGdpllChanPriority3 = 3 /* Lowest priority */ 106 } bcm_gdpll_chan_priority_t; 107 108 /* GDPLL Debug modes */ 109 typedef enum bcm_gdpll_debug_mode_e { 110 bcmGdpllDebugMode1 = 0, /* To enable debug Mode-1 */ 111 bcmGdpllDebugMode2 = 1, /* To enable debug Mode-2 */ 112 bcmGdpllDebugCount = 2 /* Channel debug mode count */ 113 } bcm_gdpll_debug_mode_t; 114 115 /* TS Pair forwarding */ 116 typedef enum bcm_gdpll_debug_dest_e { 117 bcmGdpllDebugDestCPU = 0, /* TS-Pair forward to CPU-FIFO */ 118 bcmGdpllDebugDestM7 = 1, /* TS-Pair forward to M7 */ 119 bcmGdpllDebugDestALL = 2 /* TS-Pair forward to both M7 and CPU */ 120 } bcm_gdpll_debug_dest_t; 121 122 /* GDPLL Channel input structure. */ 123 typedef struct bcm_gdpll_chan_input_s { 124 bcm_gdpll_input_event_t input_event; /* Input event type for the channel */ 125 bcm_port_t port; /* Event input from the port */ 126 bcm_gdpll_port_event_t port_event_type; /* Event input type from the port */ 127 uint32 event_divisor; /* Divisor value for an input event */ 128 bcm_gdpll_event_dest_t event_dest; /* Input event forwarding destination 129 type */ 130 int ts_counter; /* 0: TS0, 1:TS1 */ 131 int ppm_check_enable; /* PPM check enable flag, boolean */ 132 uint16 ppm_value; /* PPM value */ 133 uint16 event_frequency; /* Event frequency for PPM check 134 configuration */ 135 } bcm_gdpll_chan_input_t; 136 137 /* DPLL Config structure. */ 138 typedef struct bcm_gdpll_chan_dpll_config_s { 139 int32 k1[BCM_GDPLL_NUM_STATES]; /* DPLL config parameter */ 140 uint8 k1Shift[BCM_GDPLL_NUM_STATES]; /* left or right sight, 48 places max */ 141 int32 k1k2[BCM_GDPLL_NUM_STATES]; 142 uint8 k1k2Shift[BCM_GDPLL_NUM_STATES]; 143 uint32 lockDetThres[BCM_GDPLL_NUM_STATES]; 144 uint32 lockIndicatorThresholdLo; /* Lock Indicator threshold */ 145 uint32 lockIndicatorThresholdLHi; /* Lock Indicator threshold */ 146 uint16 dwell_count[BCM_GDPLL_NUM_STATES]; 147 uint64 phase_error_limiter_thres[BCM_GDPLL_NUM_STATES]; 148 uint8 nco_bits; 149 uint8 phase_counter_ref; /* Boolean */ 150 uint8 dpll_num_states; 151 uint16 idump_mod[BCM_GDPLL_NUM_STATES]; 152 uint8 phase_error_shift; 153 uint64 nominal_loop_filter; 154 uint8 invert_phase_error; 155 uint8 norm_phase_error; 156 uint32 norm_phase_error_thres0; 157 uint32 norm_phase_error_thres1; 158 } bcm_gdpll_chan_dpll_config_t; 159 160 /* Per DPLL state variables stored in state memory. */ 161 typedef struct bcm_gdpll_chan_dpll_state_s { 162 uint8 dpll_state; /* Software DPLL state */ 163 int64 loop_filter; /* filter parameter */ 164 uint32 dwell_counter; /* filter dwell counter */ 165 uint32 lockDetFilter; /* Filter parameter */ 166 int64 offset; 167 uint8 init_flag; /* Initialize to TRUE */ 168 uint8 init_offset_flag; /* Initialize to FALSE */ 169 uint64 phase_counter; /* Phase counter value, unsigned 52 */ 170 uint64 phaseCounterDelta; 171 uint16 phaseCounterN; 172 uint16 phaseCounterM; 173 uint16 phaseCounterFrac; 174 uint16 idumpCounter; 175 int64 accumPhaseError; 176 uint8 lockIndicator; 177 uint8 lossOfLockIndicator; 178 } bcm_gdpll_chan_dpll_state_t; 179 180 /* GDPLL Channel configuration */ 181 typedef struct bcm_gdpll_chan_s { 182 bcm_gdpll_chan_input_t event_ref; /* Channel input reference */ 183 bcm_gdpll_chan_input_t event_fb; /* Channel input feedback */ 184 bcm_gdpll_chan_priority_t chan_prio; /* Channel priority configurations */ 185 bcm_gdpll_chan_dpll_config_t chan_dpll_config; /* Channel DPLL configuration */ 186 bcm_gdpll_chan_dpll_state_t chan_dpll_state; /* Channel DPLL state */ 187 bcm_gdpll_output_event_t out_event; /* Channel output configuration for NCO 188 control */ 189 bcm_port_t port; /* Output port for TXPI controls */ 190 bcm_gdpll_debug_dest_t ts_pair_dest; /* Debug Configurations to forward 191 timestamp pairs */ 192 } bcm_gdpll_chan_t; 193 194 #ifndef BCM_HIDE_DISPATCHABLE 195 196 /* Create the GDPLL channel */ 197 extern int bcm_gdpll_chan_create( 198 int unit, 199 uint32 flags, 200 bcm_gdpll_chan_t *gdpll_chan, 201 int *pChan); 202 203 /* Destroy the GDPLL channel */ 204 extern int bcm_gdpll_chan_destroy( 205 int unit, 206 int chan); 207 208 /* Set enable for GDPLL channel */ 209 extern int bcm_gdpll_chan_enable( 210 int unit, 211 int chan, 212 int enable); 213 214 /* Get the state of the GDPLL channel */ 215 extern int bcm_gdpll_chan_state_get( 216 int unit, 217 int chan, 218 uint32 *dpllState); 219 220 /* Enable debug on a given GDPLL channel */ 221 extern int bcm_gdpll_chan_debug_enable( 222 int unit, 223 int chan, 224 bcm_gdpll_debug_mode_t debug_mode, 225 int enable); 226 227 /* Enable global GDPLL debug feature */ 228 extern int bcm_gdpll_debug( 229 int unit, 230 int enable); 231 232 /* Flush the GDPLL pipeline */ 233 extern int bcm_gdpll_flush( 234 int unit); 235 236 #endif /* BCM_HIDE_DISPATCHABLE */ 237 238 /* GDPLL debug buffer recieve callback */ 239 typedef int (*bcm_gdpll_debug_cb)( 240 int unit, 241 void *user_data, 242 uint32 debug_buff, 243 uint32 debug_buf_size); 244 245 #ifndef BCM_HIDE_DISPATCHABLE 246 247 /* Register callback function for debug buffer */ 248 extern int bcm_gdpll_debug_cb_register( 249 int unit, 250 bcm_gdpll_debug_cb cb, 251 void *user_data); 252 253 #endif /* BCM_HIDE_DISPATCHABLE */ 254 255 /* GDPLL generic callback */ 256 typedef int (*bcm_gdpll_cb)( 257 int unit, 258 void *user_data, 259 uint32 *cb_data, 260 int cb_type); 261 262 #ifndef BCM_HIDE_DISPATCHABLE 263 264 /* Register callback function for a given type */ 265 extern int bcm_gdpll_cb_register( 266 int unit, 267 int cb_type, 268 bcm_gdpll_cb cb, 269 void *user_data); 270 271 /* Un-register callback function for a given type */ 272 extern int bcm_gdpll_cb_unregister( 273 int unit, 274 int cb_type); 275 276 #endif /* defined(INCLUDE_GDPLL) */ 277 278 #endif /* BCM_HIDE_DISPATCHABLE */ 279 280 #endif /* __BCM_GDPLL_H__ */